commit cf667be17b479fe276fd606b8fd72ccfa3065bb8
author Owen Anderson <resistor@mac.com> Tue Nov 02 01:24:55 2010 +0000
committer Owen Anderson <resistor@mac.com> Tue Nov 02 01:24:55 2010 +0000
tree 6ecd9c507048d5a1856cb671d8aa2216c41919bb
parent 4053e63a4b2f54446e29ef5bdad64e43b3bf52d6

Add correct NEON encodings for vld2, vld3, and vld4 basic variants.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117997 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMMCCodeEmitter.cpp

diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp
index 6f32ce7..fcf10ff 100644
--- a/lib/Target/ARM/ARMMCCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp
@@ -100,6 +100,7 @@
 
   unsigned getRegisterListOpValue(const MCInst &MI, unsigned Op) const;
   unsigned getAddrMode6RegisterOperand(const MCInst &MI, unsigned Op) const;
+  unsigned getAddrMode6OffsetOperand(const MCInst &MI, unsigned Op) const;
 
   unsigned getNumFixupKinds() const {
     assert(0 && "ARMMCCodeEmitter::getNumFixupKinds() not yet implemented.");
@@ -312,6 +313,14 @@
   return RegNo | (Align << 4);
 }
 
+unsigned ARMMCCodeEmitter::getAddrMode6OffsetOperand(const MCInst &MI,
+                                                     unsigned Op) const {
+  const MCOperand &regno = MI.getOperand(Op);
+  if (regno.getReg() == 0) return 0x0D;
+  return regno.getReg();
+}
+
+
 void ARMMCCodeEmitter::
 EncodeInstruction(const MCInst &MI, raw_ostream &OS,
                   SmallVectorImpl<MCFixup> &Fixups) const {