More renamings of Target/Machine*Info to Target/Target*Info
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5204 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/RegAlloc/RegClass.h b/lib/CodeGen/RegAlloc/RegClass.h
index 99a84c0..7e2103c 100644
--- a/lib/CodeGen/RegAlloc/RegClass.h
+++ b/lib/CodeGen/RegAlloc/RegClass.h
@@ -9,9 +9,9 @@
#define REG_CLASS_H
#include "llvm/CodeGen/InterferenceGraph.h"
-#include "llvm/Target/MachineRegInfo.h"
+#include "llvm/Target/TargetRegInfo.h"
#include <stack>
-class MachineRegClassInfo;
+class TargetRegClassInfo;
typedef std::vector<unsigned> ReservedColorListType;
@@ -24,7 +24,7 @@
// This is the class that contains all data structures and common algos
// for coloring a particular register class (e.g., int class, fp class).
// This class is hardware independent. This class accepts a hardware
-// dependent description of machine registers (MachineRegInfo class) to
+// dependent description of machine registers (TargetRegInfo class) to
// get hardware specific info and to color an individual IG node.
//
// This class contains the InterferenceGraph (IG).
@@ -35,7 +35,7 @@
//-----------------------------------------------------------------------------
class RegClass {
const Function *const Meth; // Function we are working on
- const MachineRegClassInfo *const MRC; // corresponding MRC
+ const TargetRegClassInfo *const MRC; // corresponding MRC
const unsigned RegClassID; // my int ID
InterferenceGraph IG; // Interference graph - constructed by
@@ -69,7 +69,7 @@
public:
RegClass(const Function *M,
- const MachineRegClassInfo *MRC,
+ const TargetRegClassInfo *MRC,
const ReservedColorListType *RCL = 0);
inline void createInterferenceGraph() { IG.createGraph(); }