commit d271d8b61f3747846a4ac40f9c49a9b9ca71bc67
author Anton Korobeynikov <asl@math.spbu.ru> Fri Nov 06 23:45:15 2009 +0000
committer Anton Korobeynikov <asl@math.spbu.ru> Fri Nov 06 23:45:15 2009 +0000
tree 142fc5c2c03683d94fe705894afa5a4abef14bc1
parent 6a14a00bb348755ff7974c56ff8df9845deb68f3

Honour subreg machine operands during asmprinting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86303 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp

diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
index 6a0c898..a3f52cd 100644
--- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
@@ -347,6 +347,9 @@
                                                &ARM::DPR_VFP2RegClass);
       O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
     } else {
+      if (unsigned SubReg = MO.getSubReg())
+        Reg = TRI->getSubReg(Reg, SubReg);
+
       O << getRegisterName(Reg);
     }
     break;