Do not move any values into registers for a void return (there isn't anything).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14413 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PowerPCISelSimple.cpp b/lib/Target/PowerPC/PowerPCISelSimple.cpp
index a75a4b0..4302beb 100644
--- a/lib/Target/PowerPC/PowerPCISelSimple.cpp
+++ b/lib/Target/PowerPC/PowerPCISelSimple.cpp
@@ -1062,26 +1062,29 @@
/// visitReturnInst - implemented with BLR
///
void ISel::visitReturnInst(ReturnInst &I) {
- Value *RetVal = I.getOperand(0);
- switch (getClassB(RetVal->getType())) {
- case cByte: // integral return values: extend or move into r3 and return
- case cShort:
- case cInt:
- promote32(PPC32::R3, ValueRecord(RetVal));
- break;
- case cFP: { // Floats & Doubles: Return in f1
- unsigned RetReg = getReg(RetVal);
- BuildMI(BB, PPC32::FMR, 1, PPC32::F1).addReg(RetReg);
- break;
- }
- case cLong: {
- unsigned RetReg = getReg(RetVal);
- BuildMI(BB, PPC32::OR, 2, PPC32::R3).addReg(RetReg).addReg(RetReg);
- BuildMI(BB, PPC32::OR, 2, PPC32::R4).addReg(RetReg+1).addReg(RetReg+1);
- break;
- }
- default:
- visitInstruction(I);
+ // Only do the processing if this is a non-void return
+ if (I.getNumOperands() > 0) {
+ Value *RetVal = I.getOperand(0);
+ switch (getClassB(RetVal->getType())) {
+ case cByte: // integral return values: extend or move into r3 and return
+ case cShort:
+ case cInt:
+ promote32(PPC32::R3, ValueRecord(RetVal));
+ break;
+ case cFP: { // Floats & Doubles: Return in f1
+ unsigned RetReg = getReg(RetVal);
+ BuildMI(BB, PPC32::FMR, 1, PPC32::F1).addReg(RetReg);
+ break;
+ }
+ case cLong: {
+ unsigned RetReg = getReg(RetVal);
+ BuildMI(BB, PPC32::OR, 2, PPC32::R3).addReg(RetReg).addReg(RetReg);
+ BuildMI(BB, PPC32::OR, 2, PPC32::R4).addReg(RetReg+1).addReg(RetReg+1);
+ break;
+ }
+ default:
+ visitInstruction(I);
+ }
}
BuildMI(BB, PPC32::BLR, 1).addImm(0);
}