Added class MachineOptInfo as interface to target-specific
routines supporting machine code optimization.
Also added method MachineInstrInfo::getNOPOpCode().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3845 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/Target/MachineInstrInfo.h b/include/llvm/Target/MachineInstrInfo.h
index 24d1363..f7780d0 100644
--- a/include/llvm/Target/MachineInstrInfo.h
+++ b/include/llvm/Target/MachineInstrInfo.h
@@ -191,7 +191,7 @@
bool isPseudoInstr(const MachineOpCode opCode) const {
return getDescriptor(opCode).iclass & M_PSEUDO_FLAG;
}
-
+
// Check if an instruction can be issued before its operands are ready,
// or if a subsequent instruction that uses its result can be issued
// before the results are ready.
@@ -265,7 +265,12 @@
//-------------------------------------------------------------------------
// Code generation support for creating individual machine instructions
//-------------------------------------------------------------------------
-
+
+ // Get certain common op codes for the current target. this and all the
+ // Create* methods below should be moved to a machine code generation class
+ //
+ virtual MachineOpCode getNOPOpCode() const = 0;
+
// Create an instruction sequence to put the constant `val' into
// the virtual register `dest'. `val' may be a Constant or a
// GlobalValue, viz., the constant address of a global variable or function.
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 24d1363..f7780d0 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -191,7 +191,7 @@
bool isPseudoInstr(const MachineOpCode opCode) const {
return getDescriptor(opCode).iclass & M_PSEUDO_FLAG;
}
-
+
// Check if an instruction can be issued before its operands are ready,
// or if a subsequent instruction that uses its result can be issued
// before the results are ready.
@@ -265,7 +265,12 @@
//-------------------------------------------------------------------------
// Code generation support for creating individual machine instructions
//-------------------------------------------------------------------------
-
+
+ // Get certain common op codes for the current target. this and all the
+ // Create* methods below should be moved to a machine code generation class
+ //
+ virtual MachineOpCode getNOPOpCode() const = 0;
+
// Create an instruction sequence to put the constant `val' into
// the virtual register `dest'. `val' may be a Constant or a
// GlobalValue, viz., the constant address of a global variable or function.
diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index 1a2abff..13c7a02 100644
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -16,6 +16,7 @@
class MachineRegInfo;
class MachineFrameInfo;
class MachineCacheInfo;
+class MachineOptInfo;
class PassManager;
class Pass;
@@ -56,13 +57,17 @@
// -- Instruction opcode and operand information
// -- Pipelines and scheduling information
// -- Register information
+ // -- Stack frame information
+ // -- Cache hierarchy information
+ // -- Machine-level optimization information (peephole only)
//
virtual const MachineInstrInfo& getInstrInfo() const = 0;
virtual const MachineSchedInfo& getSchedInfo() const = 0;
virtual const MachineRegInfo& getRegInfo() const = 0;
virtual const MachineFrameInfo& getFrameInfo() const = 0;
virtual const MachineCacheInfo& getCacheInfo() const = 0;
-
+ virtual const MachineOptInfo& getOptInfo() const = 0;
+
// Data storage information
//
virtual unsigned int findOptimalStorageSize (const Type* ty) const;
diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index 4ff6064..01315ba 100644
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -13,6 +13,7 @@
#include "llvm/Target/MachineFrameInfo.h"
#include "llvm/Target/MachineCacheInfo.h"
#include "llvm/Target/MachineRegInfo.h"
+#include "llvm/Target/MachineOptInfo.h"
#include "llvm/Type.h"
#include <sys/types.h>
@@ -125,7 +126,12 @@
//-------------------------------------------------------------------------
// Code generation support for creating individual machine instructions
//-------------------------------------------------------------------------
-
+
+ // Get certain common op codes for the current target. This and all the
+ // Create* methods below should be moved to a machine code generation class
+ //
+ virtual MachineOpCode getNOPOpCode() const { return NOP; }
+
// Create an instruction sequence to put the constant `val' into
// the virtual register `dest'. `val' may be a Constant or a
// GlobalValue, viz., the constant address of a global variable or function.
@@ -691,6 +697,21 @@
//---------------------------------------------------------------------------
+// class UltraSparcOptInfo
+//
+// Purpose:
+// Interface to machine-level optimization routines for the UltraSPARC.
+//---------------------------------------------------------------------------
+
+class UltraSparcOptInfo: public MachineOptInfo {
+public:
+ UltraSparcOptInfo(const TargetMachine &T) : MachineOptInfo(T) {}
+
+ virtual bool IsUselessCopy (const MachineInstr* MI) const;
+};
+
+
+//---------------------------------------------------------------------------
// class UltraSparcMachine
//
// Purpose:
@@ -707,14 +728,16 @@
UltraSparcRegInfo regInfo;
UltraSparcFrameInfo frameInfo;
UltraSparcCacheInfo cacheInfo;
+ UltraSparcOptInfo optInfo;
public:
UltraSparc();
-
+
virtual const MachineInstrInfo &getInstrInfo() const { return instrInfo; }
virtual const MachineSchedInfo &getSchedInfo() const { return schedInfo; }
virtual const MachineRegInfo &getRegInfo() const { return regInfo; }
virtual const MachineFrameInfo &getFrameInfo() const { return frameInfo; }
virtual const MachineCacheInfo &getCacheInfo() const { return cacheInfo; }
+ virtual const MachineOptInfo &getOptInfo() const { return optInfo; }
// getPrologEpilogCodeInserter - Inserts prolog/epilog code.
virtual Pass* getPrologEpilogInsertionPass();
diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
index 98c0131..28b9734 100644
--- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp
+++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp
@@ -108,7 +108,8 @@
schedInfo(*this),
regInfo(*this),
frameInfo(*this),
- cacheInfo(*this)
+ cacheInfo(*this),
+ optInfo(*this)
{
optSizeForSubWordData = 4;
minMemOpWordSize = 8;