Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index ef1fca0..801bd1b 100644
--- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -1179,11 +1179,11 @@
   
   // Count the number of register definitions.
   unsigned NumDefs = 0;
-  for (; MI->getOperand(NumDefs).isRegister() && MI->getOperand(NumDefs).isDef();
+  for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef();
        ++NumDefs)
     assert(NumDefs != NumOperands-1 && "No asm string?");
   
-  assert(MI->getOperand(NumDefs).isExternalSymbol() && "No asm string?");
+  assert(MI->getOperand(NumDefs).isSymbol() && "No asm string?");
 
   // Disassemble the AsmStr, printing out the literal pieces, the operands, etc.
   const char *AsmStr = MI->getOperand(NumDefs).getSymbolName();
diff --git a/lib/CodeGen/AsmPrinter/DwarfWriter.cpp b/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
index 0628221..168b36c 100644
--- a/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
@@ -1050,15 +1050,15 @@
       }
 
       // If advancing cfa.
-      if (Dst.isRegister() && Dst.getRegister() == MachineLocation::VirtualFP) {
-        if (!Src.isRegister()) {
-          if (Src.getRegister() == MachineLocation::VirtualFP) {
+      if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
+        if (!Src.isReg()) {
+          if (Src.getReg() == MachineLocation::VirtualFP) {
             Asm->EmitInt8(DW_CFA_def_cfa_offset);
             Asm->EOL("DW_CFA_def_cfa_offset");
           } else {
             Asm->EmitInt8(DW_CFA_def_cfa);
             Asm->EOL("DW_CFA_def_cfa");
-            Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Src.getRegister(), isEH));
+            Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Src.getReg(), isEH));
             Asm->EOL("Register");
           }
 
@@ -1069,18 +1069,18 @@
         } else {
           assert(0 && "Machine move no supported yet.");
         }
-      } else if (Src.isRegister() &&
-        Src.getRegister() == MachineLocation::VirtualFP) {
-        if (Dst.isRegister()) {
+      } else if (Src.isReg() &&
+        Src.getReg() == MachineLocation::VirtualFP) {
+        if (Dst.isReg()) {
           Asm->EmitInt8(DW_CFA_def_cfa_register);
           Asm->EOL("DW_CFA_def_cfa_register");
-          Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getRegister(), isEH));
+          Asm->EmitULEB128Bytes(RI->getDwarfRegNum(Dst.getReg(), isEH));
           Asm->EOL("Register");
         } else {
           assert(0 && "Machine move no supported yet.");
         }
       } else {
-        unsigned Reg = RI->getDwarfRegNum(Src.getRegister(), isEH);
+        unsigned Reg = RI->getDwarfRegNum(Src.getReg(), isEH);
         int Offset = Dst.getOffset() / stackGrowth;
 
         if (Offset < 0) {
@@ -1409,10 +1409,10 @@
   /// provided.
   void AddAddress(DIE *Die, unsigned Attribute,
                             const MachineLocation &Location) {
-    unsigned Reg = RI->getDwarfRegNum(Location.getRegister(), false);
+    unsigned Reg = RI->getDwarfRegNum(Location.getReg(), false);
     DIEBlock *Block = new DIEBlock();
 
-    if (Location.isRegister()) {
+    if (Location.isReg()) {
       if (Reg < 32) {
         AddUInt(Block, 0, DW_FORM_data1, DW_OP_reg0 + Reg);
       } else {