Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Sparc/SparcAsmPrinter.cpp b/lib/Target/Sparc/SparcAsmPrinter.cpp
index 6e8c68b..f6e3f66 100644
--- a/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -141,11 +141,11 @@
   const MachineOperand &MO = MI->getOperand (opNum);
   const TargetRegisterInfo &RI = *TM.getRegisterInfo();
   bool CloseParen = false;
-  if (MI->getOpcode() == SP::SETHIi && !MO.isRegister() && !MO.isImmediate()) {
+  if (MI->getOpcode() == SP::SETHIi && !MO.isReg() && !MO.isImm()) {
     O << "%hi(";
     CloseParen = true;
-  } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri)
-             && !MO.isRegister() && !MO.isImmediate()) {
+  } else if ((MI->getOpcode() == SP::ORri || MI->getOpcode() == SP::ADDri) &&
+             !MO.isReg() && !MO.isImm()) {
     O << "%lo(";
     CloseParen = true;
   }
@@ -190,16 +190,16 @@
     return;
   }
 
-  if (MI->getOperand(opNum+1).isRegister() &&
+  if (MI->getOperand(opNum+1).isReg() &&
       MI->getOperand(opNum+1).getReg() == SP::G0)
     return;   // don't print "+%g0"
-  if (MI->getOperand(opNum+1).isImmediate() &&
+  if (MI->getOperand(opNum+1).isImm() &&
       MI->getOperand(opNum+1).getImm() == 0)
     return;   // don't print "+0"
 
   O << "+";
-  if (MI->getOperand(opNum+1).isGlobalAddress() ||
-      MI->getOperand(opNum+1).isConstantPoolIndex()) {
+  if (MI->getOperand(opNum+1).isGlobal() ||
+      MI->getOperand(opNum+1).isCPI()) {
     O << "%lo(";
     printOperand(MI, opNum+1);
     O << ")";