fix PR6605, X86ISD::CMP always returns i32 (EFLAGS), not
the operand type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98507 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 7af4f4c..9c541dd 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -6197,7 +6197,7 @@
N2C && N2C->isNullValue() &&
RHSC && RHSC->isNullValue()) {
SDValue CmpOp0 = Cmp.getOperand(0);
- Cmp = DAG.getNode(X86ISD::CMP, dl, CmpOp0.getValueType(),
+ Cmp = DAG.getNode(X86ISD::CMP, dl, MVT::i32,
CmpOp0, DAG.getConstant(1, CmpOp0.getValueType()));
return DAG.getNode(X86ISD::SETCC_CARRY, dl, Op.getValueType(),
DAG.getConstant(X86::COND_B, MVT::i8), Cmp);
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index be57416..ede998d 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -21,6 +21,7 @@
[SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>,
SDTCisInt<0>, SDTCisInt<3>]>;
+// FIXME: Should be modelled as returning i32
def SDTX86CmpTest : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
def SDTX86Cmov : SDTypeProfile<1, 4,
@@ -83,7 +84,6 @@
def X86shrd : SDNode<"X86ISD::SHRD", SDTIntShiftDOp>;
def X86cmp : SDNode<"X86ISD::CMP" , SDTX86CmpTest>;
-
def X86bt : SDNode<"X86ISD::BT", SDTX86CmpTest>;
def X86cmov : SDNode<"X86ISD::CMOV", SDTX86Cmov>;
diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll
index 08f59ad..b75d265 100644
--- a/test/CodeGen/X86/crash.ll
+++ b/test/CodeGen/X86/crash.ll
@@ -37,7 +37,7 @@
; PR6577
%pair = type { i64, double }
-define void @on4() {
+define void @test3() {
dependentGraph243.exit:
%subject19 = load %pair* undef ; <%1> [#uses=1]
%0 = extractvalue %pair %subject19, 1 ; <double> [#uses=2]
@@ -47,3 +47,27 @@
store %pair %3, %pair* undef
ret void
}
+
+; PR6605
+define i64 @test4(i8* %P) nounwind ssp {
+entry:
+ %tmp1 = load i8* %P ; <i8> [#uses=3]
+ %tobool = icmp eq i8 %tmp1, 0 ; <i1> [#uses=1]
+ %tmp58 = sext i1 %tobool to i8 ; <i8> [#uses=1]
+ %mul.i = and i8 %tmp58, %tmp1 ; <i8> [#uses=1]
+ %conv6 = zext i8 %mul.i to i32 ; <i32> [#uses=1]
+ %cmp = icmp ne i8 %tmp1, 1 ; <i1> [#uses=1]
+ %conv11 = zext i1 %cmp to i32 ; <i32> [#uses=1]
+ %call12 = tail call i32 @safe(i32 %conv11) nounwind ; <i32> [#uses=1]
+ %and = and i32 %conv6, %call12 ; <i32> [#uses=1]
+ %tobool13 = icmp eq i32 %and, 0 ; <i1> [#uses=1]
+ br i1 %tobool13, label %if.else, label %return
+
+if.else: ; preds = %entry
+ br label %return
+
+return: ; preds = %if.else, %entry
+ ret i64 undef
+}
+
+declare i32 @safe(i32)