commit da721e74f87c3098bdb1373a7a1c7aef4cf7d574
author Nate Begeman <natebegeman@mac.com> Mon Sep 27 05:08:17 2004 +0000
committer Nate Begeman <natebegeman@mac.com> Mon Sep 27 05:08:17 2004 +0000
tree f0062b5b3b60507970f86ad93d3d4a51078f4936
parent c6e743049983dca1c6904610fa3cb78bda39d67c

Correct some BuildMI arguments for the upcoming simple scheduler


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16519 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPC32ISelSimple.cpp

diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 057615d..c8fde63 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -557,7 +557,7 @@
     MachineBasicBlock::iterator MBBI = FirstMBB.begin();
     GlobalBaseReg = makeAnotherReg(Type::IntTy);
     BuildMI(FirstMBB, MBBI, PPC::MovePCtoLR, 0, PPC::LR);
-    BuildMI(FirstMBB, MBBI, PPC::MFLR, 0, GlobalBaseReg).addReg(PPC::LR);
+    BuildMI(FirstMBB, MBBI, PPC::MFLR, 1, GlobalBaseReg).addReg(PPC::LR);
     GlobalBaseInitialized = true;
   }
   // Emit our copy of GlobalBaseReg to the destination register in the