commit dac237e18209b697a8ba122d0ddd9cad4dfba1f8
author Torok Edwin <edwintorok@gmail.com> Wed Jul 08 20:53:28 2009 +0000
committer Torok Edwin <edwintorok@gmail.com> Wed Jul 08 20:53:28 2009 +0000
tree 84addd27fd1610e6e8b5a9a82162914726abab4c
parent d1fbd142945f5ef0c273c3d756431f8cb9d25ded

Implement changes from Chris's feedback.
Finish converting lib/Target.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75043 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCInstrInfo.cpp

diff --git a/lib/Target/PowerPC/PPCInstrInfo.cpp b/lib/Target/PowerPC/PPCInstrInfo.cpp
index 87c612a..63adf32 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -20,6 +20,8 @@
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/Support/CommandLine.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
 #include "llvm/Target/TargetAsmInfo.h"
 using namespace llvm;
 
@@ -485,8 +487,7 @@
                      .addReg(PPC::R0)
                      .addReg(PPC::R0));
   } else {
-    assert(0 && "Unknown regclass!");
-    abort();
+    LLVM_UNREACHABLE("Unknown regclass!");
   }
 
   return false;
@@ -537,8 +538,7 @@
   } else if (RC == PPC::VRRCRegisterClass) {
     Opc = PPC::STVX;
   } else {
-    assert(0 && "Unknown regclass!");
-    abort();
+    LLVM_UNREACHABLE("Unknown regclass!");
   }
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc))
     .addReg(SrcReg, getKillRegState(isKill));
@@ -634,8 +634,7 @@
     NewMIs.push_back(BuildMI(MF, DL, get(PPC::LVX),DestReg).addReg(PPC::R0)
                      .addReg(PPC::R0));
   } else {
-    assert(0 && "Unknown regclass!");
-    abort();
+    LLVM_UNREACHABLE("Unknown regclass!");
   }
 }
 
@@ -677,8 +676,7 @@
   } else if (RC == PPC::VRRCRegisterClass) {
     Opc = PPC::LVX;
   } else {
-    assert(0 && "Unknown regclass!");
-    abort();
+    LLVM_UNREACHABLE("Unknown regclass!");
   }
   DebugLoc DL = DebugLoc::getUnknownLoc();
   MachineInstrBuilder MIB = BuildMI(MF, DL, get(Opc), DestReg);