Provide set of reserved registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70704 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp
index 625df96..7577a53 100644
--- a/lib/Target/MSP430/MSP430ISelLowering.cpp
+++ b/lib/Target/MSP430/MSP430ISelLowering.cpp
@@ -80,8 +80,8 @@
/// generate load operations for arguments places on the stack.
// FIXME: struct return stuff
// FIXME: varargs
-SDValue MSP430TargetLowering:: LowerCCCArguments(SDValue Op,
- SelectionDAG &DAG) {
+SDValue MSP430TargetLowering::LowerCCCArguments(SDValue Op,
+ SelectionDAG &DAG) {
MachineFunction &MF = DAG.getMachineFunction();
MachineFrameInfo *MFI = MF.getFrameInfo();
MachineRegisterInfo &RegInfo = MF.getRegInfo();
@@ -193,8 +193,8 @@
Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
Op.getOperand(i*2+1), Flag);
- // guarantee that all emitted copies are
- // stuck together, avoiding something bad
+ // Guarantee that all emitted copies are stuck together,
+ // avoiding something bad.
Flag = Chain.getValue(1);
}