commit dd32ba337aab88c215108ca8bf4a0267fce1e773
author Jim Grosbach <grosbach@apple.com> Thu Aug 11 22:05:09 2011 +0000
committer Jim Grosbach <grosbach@apple.com> Thu Aug 11 22:05:09 2011 +0000
tree f2858088a87277196f868b08b361581510c887af
parent 4c7324d032adec5dcd4a6d638e70cfae03742d7c

ARM load shifted register pre-index fix shift value asm parser encoding.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137367 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 39f873c..07570ae 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -830,7 +830,7 @@
       // For register offset, we encode the shift type and negation flag
       // here.
       Val = ARM_AM::getAM2Opc(Mem.isNegative ? ARM_AM::sub : ARM_AM::add,
-                              0, Mem.ShiftType);
+                              Mem.ShiftImm, Mem.ShiftType);
     }
     Inst.addOperand(MCOperand::CreateReg(Mem.BaseRegNum));
     Inst.addOperand(MCOperand::CreateReg(Mem.OffsetRegNum));