Define generic 1, 2 and 4 byte pc relative relocations. They are common
and at least the 4 byte one will be needed to implement the .cfi_* directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120240 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/MBlaze/MBlazeAsmBackend.cpp b/lib/Target/MBlaze/MBlazeAsmBackend.cpp
index 7de3cf8..56c0419 100644
--- a/lib/Target/MBlaze/MBlazeAsmBackend.cpp
+++ b/lib/Target/MBlaze/MBlazeAsmBackend.cpp
@@ -10,7 +10,6 @@
#include "llvm/Target/TargetAsmBackend.h"
#include "MBlaze.h"
#include "MBlazeELFWriterInfo.h"
-#include "MBlazeFixupKinds.h"
#include "llvm/ADT/Twine.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCAsmLayout.h"
@@ -32,9 +31,9 @@
switch (Kind) {
default: assert(0 && "invalid fixup kind!");
case FK_Data_1: return 1;
- case MBlaze::reloc_pcrel_2byte:
+ case FK_PCRel_2:
case FK_Data_2: return 2;
- case MBlaze::reloc_pcrel_4byte:
+ case FK_PCRel_4:
case FK_Data_4: return 4;
case FK_Data_8: return 8;
}
diff --git a/lib/Target/MBlaze/MBlazeFixupKinds.h b/lib/Target/MBlaze/MBlazeFixupKinds.h
deleted file mode 100644
index 72466ca..0000000
--- a/lib/Target/MBlaze/MBlazeFixupKinds.h
+++ /dev/null
@@ -1,24 +0,0 @@
-//===-- MBlaze/MBlazeFixupKinds.h - MBlaze Fixup Entries --------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_MBLAZE_MBLAZEFIXUPKINDS_H
-#define LLVM_MBLAZE_MBLAZEFIXUPKINDS_H
-
-#include "llvm/MC/MCFixup.h"
-
-namespace llvm {
-namespace MBlaze {
-enum Fixups {
- reloc_pcrel_4byte = FirstTargetFixupKind, // 32-bit pcrel, e.g. a brlid
- reloc_pcrel_2byte // 16-bit pcrel, e.g. beqid
-};
-}
-}
-
-#endif
diff --git a/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp b/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
index 625c73f..e7fb788 100644
--- a/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
+++ b/lib/Target/MBlaze/MBlazeMCCodeEmitter.cpp
@@ -14,7 +14,6 @@
#define DEBUG_TYPE "mccodeemitter"
#include "MBlaze.h"
#include "MBlazeInstrInfo.h"
-#include "MBlazeFixupKinds.h"
#include "llvm/MC/MCCodeEmitter.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
@@ -56,22 +55,6 @@
return 2;
}
- const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
- const static MCFixupKindInfo Infos[] = {
- // name offset bits flags
- { "reloc_pcrel_4byte", 2, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
- { "reloc_pcrel_2byte", 2, 2 * 8, MCFixupKindInfo::FKF_IsPCRel } };
-
- if (Kind < FirstTargetFixupKind)
- return MCCodeEmitter::getFixupKindInfo(Kind);
-
- if (unsigned(Kind-FirstTargetFixupKind) < getNumFixupKinds())
- return Infos[Kind - FirstTargetFixupKind];
-
- assert(0 && "Invalid fixup kind.");
- return Infos[0];
- }
-
static unsigned GetMBlazeRegNum(const MCOperand &MO) {
// FIXME: getMBlazeRegisterNumbering() is sufficient?
assert(0 && "MBlazeMCCodeEmitter::GetMBlazeRegNum() not yet implemented.");
@@ -181,13 +164,13 @@
MCFixupKind FixupKind;
switch (MI.getOpcode()) {
default:
- FixupKind = pcrel ? MCFixupKind(MBlaze::reloc_pcrel_2byte) : FK_Data_2;
+ FixupKind = pcrel ? FK_PCRel_2 : FK_Data_2;
Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
break;
case MBlaze::ORI32:
case MBlaze::ADDI32:
case MBlaze::BRLID32:
- FixupKind = pcrel ? MCFixupKind(MBlaze::reloc_pcrel_4byte) : FK_Data_4;
+ FixupKind = pcrel ? FK_PCRel_4 : FK_Data_4;
Fixups.push_back(MCFixup::Create(0,oper.getExpr(),FixupKind));
break;
}
diff --git a/lib/Target/X86/X86AsmBackend.cpp b/lib/Target/X86/X86AsmBackend.cpp
index f27cd03..48467c8 100644
--- a/lib/Target/X86/X86AsmBackend.cpp
+++ b/lib/Target/X86/X86AsmBackend.cpp
@@ -29,11 +29,11 @@
static unsigned getFixupKindLog2Size(unsigned Kind) {
switch (Kind) {
default: assert(0 && "invalid fixup kind!");
- case X86::reloc_pcrel_1byte:
+ case FK_PCRel_1:
case FK_Data_1: return 0;
- case X86::reloc_pcrel_2byte:
+ case FK_PCRel_2:
case FK_Data_2: return 1;
- case X86::reloc_pcrel_4byte:
+ case FK_PCRel_4:
case X86::reloc_riprel_4byte:
case X86::reloc_riprel_4byte_movq_load:
case X86::reloc_signed_4byte:
diff --git a/lib/Target/X86/X86FixupKinds.h b/lib/Target/X86/X86FixupKinds.h
index 64ee3eb..9507759 100644
--- a/lib/Target/X86/X86FixupKinds.h
+++ b/lib/Target/X86/X86FixupKinds.h
@@ -15,10 +15,7 @@
namespace llvm {
namespace X86 {
enum Fixups {
- reloc_pcrel_4byte = FirstTargetFixupKind, // 32-bit pcrel, e.g. a branch.
- reloc_pcrel_1byte, // 8-bit pcrel, e.g. branch_1
- reloc_pcrel_2byte, // 16-bit pcrel, e.g. callw
- reloc_riprel_4byte, // 32-bit rip-relative
+ reloc_riprel_4byte = FirstTargetFixupKind, // 32-bit rip-relative
reloc_riprel_4byte_movq_load, // 32-bit rip-relative in movq
reloc_signed_4byte, // 32-bit signed. Unlike FK_Data_4
// this will be sign extended at
diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp
index 586216d..bd37999 100644
--- a/lib/Target/X86/X86MCCodeEmitter.cpp
+++ b/lib/Target/X86/X86MCCodeEmitter.cpp
@@ -44,9 +44,6 @@
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
const static MCFixupKindInfo Infos[] = {
- { "reloc_pcrel_4byte", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
- { "reloc_pcrel_1byte", 0, 1 * 8, MCFixupKindInfo::FKF_IsPCRel },
- { "reloc_pcrel_2byte", 0, 2 * 8, MCFixupKindInfo::FKF_IsPCRel },
{ "reloc_riprel_4byte", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
{ "reloc_riprel_4byte_movq_load", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
{ "reloc_signed_4byte", 0, 4 * 8, 0},
@@ -173,13 +170,7 @@
unsigned Size = X86II::getSizeOfImm(TSFlags);
bool isPCRel = X86II::isImmPCRel(TSFlags);
- switch (Size) {
- default: assert(0 && "Unknown immediate size");
- case 1: return isPCRel ? MCFixupKind(X86::reloc_pcrel_1byte) : FK_Data_1;
- case 2: return isPCRel ? MCFixupKind(X86::reloc_pcrel_2byte) : FK_Data_2;
- case 4: return isPCRel ? MCFixupKind(X86::reloc_pcrel_4byte) : FK_Data_4;
- case 8: assert(!isPCRel); return FK_Data_8;
- }
+ return MCFixup::getKindForSize(Size, isPCRel);
}
/// Is32BitMemOperand - Return true if the specified instruction with a memory
@@ -222,9 +213,9 @@
if (DispOp.isImm()) {
// If this is a simple integer displacement that doesn't require a relocation,
// emit it now.
- if (FixupKind != MCFixupKind(X86::reloc_pcrel_1byte) &&
- FixupKind != MCFixupKind(X86::reloc_pcrel_2byte) &&
- FixupKind != MCFixupKind(X86::reloc_pcrel_4byte)) {
+ if (FixupKind != FK_PCRel_1 &&
+ FixupKind != FK_PCRel_2 &&
+ FixupKind != FK_PCRel_4) {
EmitConstant(DispOp.getImm()+ImmOffset, Size, CurByte, OS);
return;
}
@@ -243,13 +234,13 @@
// If the fixup is pc-relative, we need to bias the value to be relative to
// the start of the field, not the end of the field.
- if (FixupKind == MCFixupKind(X86::reloc_pcrel_4byte) ||
+ if (FixupKind == FK_PCRel_4 ||
FixupKind == MCFixupKind(X86::reloc_riprel_4byte) ||
FixupKind == MCFixupKind(X86::reloc_riprel_4byte_movq_load))
ImmOffset -= 4;
- if (FixupKind == MCFixupKind(X86::reloc_pcrel_2byte))
+ if (FixupKind == FK_PCRel_2)
ImmOffset -= 2;
- if (FixupKind == MCFixupKind(X86::reloc_pcrel_1byte))
+ if (FixupKind == FK_PCRel_1)
ImmOffset -= 1;
if (ImmOffset)