Instead of using isDummyPhiInstr, we just compare the opcode with V9::PHI.
Also, squash a use of TargetInstrInfo::isNop().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15905 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp
index 13b629c..fc4d6a7 100644
--- a/lib/CodeGen/InstrSched/InstrScheduling.cpp
+++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp
@@ -19,6 +19,7 @@
#include "llvm/Target/TargetMachine.h"
#include "../../Target/SparcV9/MachineCodeForInstruction.h"
#include "../../Target/SparcV9/LiveVar/FunctionLiveVarInfo.h"
+#include "../../Target/SparcV9/SparcV9InstrInfo.h"
#include "Support/CommandLine.h"
#include <algorithm>
#include <iostream>
@@ -633,8 +634,7 @@
// some NOPs from delay slots. Also, PHIs are not included in the schedule.
unsigned numInstr = 0;
for (MachineBasicBlock::iterator I=MBB.begin(); I != MBB.end(); ++I)
- if (! mii.isNop(I->getOpcode()) &&
- ! mii.isDummyPhiInstr(I->getOpcode()))
+ if (!(I->getOpcode() == V9::NOP || I->getOpcode() == V9::PHI))
++numInstr;
assert(S.isched.getNumInstructions() >= numInstr &&
"Lost some non-NOP instructions during scheduling!");
@@ -645,7 +645,7 @@
// First find the dummy instructions at the start of the basic block
MachineBasicBlock::iterator I = MBB.begin();
for ( ; I != MBB.end(); ++I)
- if (! mii.isDummyPhiInstr(I->getOpcode()))
+ if (I->getOpcode() != V9::PHI)
break;
// Remove all except the dummy PHI instructions from MBB, and