- Expand tabs to spaces.
- select_bits.ll now fully functional now that PR1993 is closed. It was
previously broken by refactoring in SPUInstrInfo.td and using multiclasses.
- Same for eqv.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47972 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/CellSPU/intrinsics_branch.ll b/test/CodeGen/CellSPU/intrinsics_branch.ll
index ead235b..87ad182 100644
--- a/test/CodeGen/CellSPU/intrinsics_branch.ll
+++ b/test/CodeGen/CellSPU/intrinsics_branch.ll
@@ -36,115 +36,115 @@
define <4 x i32> @test(<4 x i32> %A) {
- call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3)
- %Y = bitcast <4 x i32> %1 to <4 x i32>
- ret <4 x i32> %Y
+ call <4 x i32> @llvm.spu.si.shli(<4 x i32> %A, i8 3)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
}
define <4 x i32> @ceqtest(<4 x i32> %A, <4 x i32> %B) {
- call <4 x i32> @llvm.spu.si.ceq(<4 x i32> %A, <4 x i32> %B)
- %Y = bitcast <4 x i32> %1 to <4 x i32>
- ret <4 x i32> %Y
+ call <4 x i32> @llvm.spu.si.ceq(<4 x i32> %A, <4 x i32> %B)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
}
define <8 x i16> @ceqhtest(<8 x i16> %A, <8 x i16> %B) {
- call <8 x i16> @llvm.spu.si.ceqh(<8 x i16> %A, <8 x i16> %B)
- %Y = bitcast <8 x i16> %1 to <8 x i16>
- ret <8 x i16> %Y
+ call <8 x i16> @llvm.spu.si.ceqh(<8 x i16> %A, <8 x i16> %B)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
}
define <16 x i8> @ceqbtest(<16 x i8> %A, <16 x i8> %B) {
- call <16 x i8> @llvm.spu.si.ceqb(<16 x i8> %A, <16 x i8> %B)
- %Y = bitcast <16 x i8> %1 to <16 x i8>
- ret <16 x i8> %Y
+ call <16 x i8> @llvm.spu.si.ceqb(<16 x i8> %A, <16 x i8> %B)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
}
define <4 x i32> @ceqitest(<4 x i32> %A) {
- call <4 x i32> @llvm.spu.si.ceqi(<4 x i32> %A, i16 65)
- %Y = bitcast <4 x i32> %1 to <4 x i32>
- ret <4 x i32> %Y
+ call <4 x i32> @llvm.spu.si.ceqi(<4 x i32> %A, i16 65)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
}
define <8 x i16> @ceqhitest(<8 x i16> %A) {
- call <8 x i16> @llvm.spu.si.ceqhi(<8 x i16> %A, i16 65)
- %Y = bitcast <8 x i16> %1 to <8 x i16>
- ret <8 x i16> %Y
+ call <8 x i16> @llvm.spu.si.ceqhi(<8 x i16> %A, i16 65)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
}
define <16 x i8> @ceqbitest(<16 x i8> %A) {
- call <16 x i8> @llvm.spu.si.ceqbi(<16 x i8> %A, i8 65)
- %Y = bitcast <16 x i8> %1 to <16 x i8>
- ret <16 x i8> %Y
+ call <16 x i8> @llvm.spu.si.ceqbi(<16 x i8> %A, i8 65)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
}
define <4 x i32> @cgttest(<4 x i32> %A, <4 x i32> %B) {
- call <4 x i32> @llvm.spu.si.cgt(<4 x i32> %A, <4 x i32> %B)
- %Y = bitcast <4 x i32> %1 to <4 x i32>
- ret <4 x i32> %Y
+ call <4 x i32> @llvm.spu.si.cgt(<4 x i32> %A, <4 x i32> %B)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
}
define <8 x i16> @cgthtest(<8 x i16> %A, <8 x i16> %B) {
- call <8 x i16> @llvm.spu.si.cgth(<8 x i16> %A, <8 x i16> %B)
- %Y = bitcast <8 x i16> %1 to <8 x i16>
- ret <8 x i16> %Y
+ call <8 x i16> @llvm.spu.si.cgth(<8 x i16> %A, <8 x i16> %B)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
}
define <16 x i8> @cgtbtest(<16 x i8> %A, <16 x i8> %B) {
- call <16 x i8> @llvm.spu.si.cgtb(<16 x i8> %A, <16 x i8> %B)
- %Y = bitcast <16 x i8> %1 to <16 x i8>
- ret <16 x i8> %Y
+ call <16 x i8> @llvm.spu.si.cgtb(<16 x i8> %A, <16 x i8> %B)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
}
define <4 x i32> @cgtitest(<4 x i32> %A) {
- call <4 x i32> @llvm.spu.si.cgti(<4 x i32> %A, i16 65)
- %Y = bitcast <4 x i32> %1 to <4 x i32>
- ret <4 x i32> %Y
+ call <4 x i32> @llvm.spu.si.cgti(<4 x i32> %A, i16 65)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
}
define <8 x i16> @cgthitest(<8 x i16> %A) {
- call <8 x i16> @llvm.spu.si.cgthi(<8 x i16> %A, i16 65)
- %Y = bitcast <8 x i16> %1 to <8 x i16>
- ret <8 x i16> %Y
+ call <8 x i16> @llvm.spu.si.cgthi(<8 x i16> %A, i16 65)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
}
define <16 x i8> @cgtbitest(<16 x i8> %A) {
- call <16 x i8> @llvm.spu.si.cgtbi(<16 x i8> %A, i8 65)
- %Y = bitcast <16 x i8> %1 to <16 x i8>
- ret <16 x i8> %Y
+ call <16 x i8> @llvm.spu.si.cgtbi(<16 x i8> %A, i8 65)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
}
define <4 x i32> @clgttest(<4 x i32> %A, <4 x i32> %B) {
- call <4 x i32> @llvm.spu.si.clgt(<4 x i32> %A, <4 x i32> %B)
- %Y = bitcast <4 x i32> %1 to <4 x i32>
- ret <4 x i32> %Y
+ call <4 x i32> @llvm.spu.si.clgt(<4 x i32> %A, <4 x i32> %B)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
}
define <8 x i16> @clgthtest(<8 x i16> %A, <8 x i16> %B) {
- call <8 x i16> @llvm.spu.si.clgth(<8 x i16> %A, <8 x i16> %B)
- %Y = bitcast <8 x i16> %1 to <8 x i16>
- ret <8 x i16> %Y
+ call <8 x i16> @llvm.spu.si.clgth(<8 x i16> %A, <8 x i16> %B)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
}
define <16 x i8> @clgtbtest(<16 x i8> %A, <16 x i8> %B) {
- call <16 x i8> @llvm.spu.si.clgtb(<16 x i8> %A, <16 x i8> %B)
- %Y = bitcast <16 x i8> %1 to <16 x i8>
- ret <16 x i8> %Y
+ call <16 x i8> @llvm.spu.si.clgtb(<16 x i8> %A, <16 x i8> %B)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
}
define <4 x i32> @clgtitest(<4 x i32> %A) {
- call <4 x i32> @llvm.spu.si.clgti(<4 x i32> %A, i16 65)
- %Y = bitcast <4 x i32> %1 to <4 x i32>
- ret <4 x i32> %Y
+ call <4 x i32> @llvm.spu.si.clgti(<4 x i32> %A, i16 65)
+ %Y = bitcast <4 x i32> %1 to <4 x i32>
+ ret <4 x i32> %Y
}
define <8 x i16> @clgthitest(<8 x i16> %A) {
- call <8 x i16> @llvm.spu.si.clgthi(<8 x i16> %A, i16 65)
- %Y = bitcast <8 x i16> %1 to <8 x i16>
- ret <8 x i16> %Y
+ call <8 x i16> @llvm.spu.si.clgthi(<8 x i16> %A, i16 65)
+ %Y = bitcast <8 x i16> %1 to <8 x i16>
+ ret <8 x i16> %Y
}
define <16 x i8> @clgtbitest(<16 x i8> %A) {
- call <16 x i8> @llvm.spu.si.clgtbi(<16 x i8> %A, i8 65)
- %Y = bitcast <16 x i8> %1 to <16 x i8>
- ret <16 x i8> %Y
+ call <16 x i8> @llvm.spu.si.clgtbi(<16 x i8> %A, i8 65)
+ %Y = bitcast <16 x i8> %1 to <16 x i8>
+ ret <16 x i8> %Y
}