Do not try to rematerialize a value from a partial definition.
I don't currently have a good testcase for this; will try to get one
tomorrow. <rdar://problem/10032939>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138794 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/InlineSpiller.cpp b/lib/CodeGen/InlineSpiller.cpp
index f0f6987..5992a3a 100644
--- a/lib/CodeGen/InlineSpiller.cpp
+++ b/lib/CodeGen/InlineSpiller.cpp
@@ -189,6 +189,20 @@
return 0;
}
+/// isFullDefOf - Return true if MI defines the full contents of a register.
+/// Since this is in the context of spilling, it does not do anything special
+/// for physical registers.
+static bool isFullDefOf(const MachineInstr *MI, unsigned Reg) {
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+ const MachineOperand &MO = MI->getOperand(i);
+ if (!MO.isReg() || !MO.isDef() || MO.getSubReg())
+ continue;
+ if (MO.getReg() == Reg)
+ return true;
+ }
+ return false;
+}
+
/// isSnippet - Identify if a live interval is a snippet that should be spilled.
/// It is assumed that SnipLI is a virtual register with the same original as
/// Edit->getReg().
@@ -306,6 +320,7 @@
MachineBasicBlock *SpillMBB = UseMBB;
unsigned SpillDepth = Loops.getLoopDepth(SpillMBB);
bool SeenOrigPHI = false; // Original PHI met.
+ bool SeenNonReloadDef = false;
do {
unsigned Reg;
@@ -407,12 +422,18 @@
}
// Potential remat candidate.
+ SeenNonReloadDef = true;
+ if (!isFullDefOf(MI, Reg)) {
+ DEBUG(dbgs() << " partial def " << PrintReg(Reg) << ':'
+ << VNI->id << '@' << VNI->def << '\t' << *MI);
+ continue;
+ }
DEBUG(dbgs() << " def " << PrintReg(Reg) << ':'
<< VNI->id << '@' << VNI->def << '\t' << *MI);
SVI.DefMI = MI;
} while (!WorkList.empty());
- if (SeenOrigPHI || SVI.DefMI)
+ if (SeenOrigPHI || SeenNonReloadDef)
SVI.AllDefsAreReloads = false;
DEBUG({