commit e4d093c356c7853f7acfd2228dda2ab7c7b3db00
author Misha Brukman <brukman+llvm@gmail.com> Thu Aug 12 03:28:47 2004 +0000
committer Misha Brukman <brukman+llvm@gmail.com> Thu Aug 12 03:28:47 2004 +0000
tree 63c20c4e35811da337d3342a6d030aaa4dea1abb
parent b519efbafedb356a30a04a32c15a6b406779a997

* Print out full names for non-GPR or -FPR registers
* BuildMI() really *does* handle 0 params!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15680 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPC64AsmPrinter.cpp

diff --git a/lib/Target/PowerPC/PPC64AsmPrinter.cpp b/lib/Target/PowerPC/PPC64AsmPrinter.cpp
index 02f316c..515fe33 100644
--- a/lib/Target/PowerPC/PPC64AsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPC64AsmPrinter.cpp
@@ -451,9 +451,12 @@
     // FALLTHROUGH
   case MachineOperand::MO_MachineRegister:
   case MachineOperand::MO_CCRegister: {
-    // On AIX, do not print out the 'r' in register names
+    // On AIX, do not print out the 'R' (GPR) or 'F' (FPR) in reg names
     const char *regName = RI.get(MO.getReg()).Name;
-    O << &regName[1];
+    if (regName[0] == 'R' || regName[0] == 'F')
+      O << &regName[1];
+    else
+      O << regName;
     return;
   }
 
@@ -571,7 +574,6 @@
 
   O << TII.getName(Opcode) << " ";
   if (Opcode == PPC::BLR || Opcode == PPC::NOP) {
-    // FIXME: BuildMI() should handle 0 params
     O << "\n";
   } else if (ArgCount == 3 && 
              (ArgType[1] == PPCII::Disimm16 || ArgType[1] == PPCII::Disimm14)) {