Added Thumb IT instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75198 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index fb7453a..5642710 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -66,6 +66,11 @@
return CurDAG->getTargetConstant(V, MVT::i32);
}]>;
+// IT block condition mask
+def it_mask : Operand<i32> {
+ let PrintMethod = "printThumbITMask";
+}
+
// Define Thumb specific addressing modes.
// t_addrmode_rr := reg + reg
@@ -207,6 +212,10 @@
def tBcc : T1I<(outs), (ins brtarget:$target, pred:$cc), "b$cc $target",
[/*(ARMbrcond bb:$target, imm:$cc)*/]>;
+// IT block
+def tIT : TI<(outs), (ins pred:$cc, it_mask:$mask),
+ "it$mask $cc", []>;
+
//===----------------------------------------------------------------------===//
// Load Store Instructions.
//
diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
index 6844c6d..5559a5e 100644
--- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
+++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
@@ -111,6 +111,7 @@
const char *Modifier = 0);
void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
+ void printThumbITMask(const MachineInstr *MI, int OpNum);
void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
unsigned Scale);
@@ -636,6 +637,21 @@
//===--------------------------------------------------------------------===//
void
+ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) {
+ // (3 - the number of trailing zeros) is the number of then / else.
+ unsigned Mask = MI->getOperand(Op).getImm();
+ unsigned NumTZ = CountTrailingZeros_32(Mask);
+ assert(NumTZ <= 3 && "Invalid IT mask!");
+ for (unsigned Pos = 3, e = NumTZ; Pos >= e; --Pos) {
+ bool T = (Mask & (1 << Pos)) != 0;
+ if (T)
+ O << 't';
+ else
+ O << 'e';
+ }
+}
+
+void
ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
const MachineOperand &MO1 = MI->getOperand(Op);
const MachineOperand &MO2 = MI->getOperand(Op+1);