commit eb291f58235612fdda1deaa59d00403f6e9533cb
author Dan Gohman <gohman@apple.com> Sat Apr 12 02:35:39 2008 +0000
committer Dan Gohman <gohman@apple.com> Sat Apr 12 02:35:39 2008 +0000
tree 39ea81835a3c49c8acf003fa37c70099db54fa87
parent b52948971c43f83d88347513396a0424d55c1920

Fix a bug that prevented x86-64 from using rep.movsq for
8-byte-aligned data.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49571 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 1ab2727..66384f9 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4621,7 +4621,7 @@
         ValReg = X86::EAX;
         Val = (Val << 8)  | Val;
         Val = (Val << 16) | Val;
-        if (Subtarget->is64Bit() && ((Align & 0xF) == 0)) {  // QWORD aligned
+        if (Subtarget->is64Bit() && ((Align & 0x7) == 0)) {  // QWORD aligned
           AVT = MVT::i64;
           ValReg = X86::RAX;
           Val = (Val << 32) | Val;
@@ -4740,7 +4740,7 @@
       break;
     case 0:  // DWORD aligned
       AVT = MVT::i32;
-      if (Subtarget->is64Bit() && ((Align & 0xF) == 0))  // QWORD aligned
+      if (Subtarget->is64Bit() && ((Align & 0x7) == 0))  // QWORD aligned
         AVT = MVT::i64;
       break;
     default:  // Byte aligned