remove all but one reference to TargetRegisterDesc::AsmName.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81714 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp b/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
index 9592fcc..13f01c6 100644
--- a/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
+++ b/lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
@@ -80,14 +80,13 @@
unsigned RegNo = MO.getReg();
assert(TargetRegisterInfo::isPhysicalRegister(RegNo) &&
"Not physreg??");
- O << TM.getRegisterInfo()->get(RegNo).AsmName;
+ O << getRegisterName(RegNo);
}
void printOperand(const MachineInstr *MI, unsigned OpNo) {
const MachineOperand &MO = MI->getOperand(OpNo);
if (MO.isReg()) {
- assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
- O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
+ O << getRegisterName(MO.getReg());
} else if (MO.isImm()) {
O << MO.getImm();
} else {
@@ -154,8 +153,7 @@
// the value contained in the register. For this reason, the darwin
// assembler requires that we print r0 as 0 (no r) when used as the base.
const MachineOperand &MO = MI->getOperand(OpNo);
- O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
- O << ", ";
+ O << getRegisterName(MO.getReg()) << ", ";
printOperand(MI, OpNo+1);
}