commit f0a95356d649dc0fb65691c4acebee450f3529b4
author Evan Cheng <evan.cheng@apple.com> Thu Jan 12 18:27:52 2012 +0000
committer Evan Cheng <evan.cheng@apple.com> Thu Jan 12 18:27:52 2012 +0000
tree c9118d780c29e453a38401330f4b022dc8f9bdb7
parent dd929fc704054fa79cc1171354f95d91a5b62de2

Allow targets to select source order pre-RA scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148033 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index bfb6dfa..9f39699 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -218,7 +218,8 @@
                                              CodeGenOpt::Level OptLevel) {
     const TargetLowering &TLI = IS->getTargetLowering();
 
-    if (OptLevel == CodeGenOpt::None)
+    if (OptLevel == CodeGenOpt::None ||
+        TLI.getSchedulingPreference() == Sched::Source)
       return createSourceListDAGScheduler(IS, OptLevel);
     if (TLI.getSchedulingPreference() == Sched::RegPressure)
       return createBURRListDAGScheduler(IS, OptLevel);