commit f19a5926cb1fcd145a61116b7dd2b18312e76fd7
author Jakob Stoklund Olesen <stoklund@2pi.dk> Thu Feb 23 01:22:15 2012 +0000
committer Jakob Stoklund Olesen <stoklund@2pi.dk> Thu Feb 23 01:22:15 2012 +0000
tree 5e44f8e95eda066bd2c15d3896ef54cefbae3ea9
parent c892aeb26601cc5109490d30c7e170cb07f84428

Handle regmasks in FixupKills.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151226 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/PostRASchedulerList.cpp

diff --git a/lib/CodeGen/PostRASchedulerList.cpp b/lib/CodeGen/PostRASchedulerList.cpp
index 1f7833c..88d20dc 100644
--- a/lib/CodeGen/PostRASchedulerList.cpp
+++ b/lib/CodeGen/PostRASchedulerList.cpp
@@ -461,6 +461,10 @@
     // are completely defined.
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
       MachineOperand &MO = MI->getOperand(i);
+      if (MO.isRegMask())
+        for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i)
+          if (MO.clobbersPhysReg(i))
+            KillIndices[i] = ~0u;
       if (!MO.isReg()) continue;
       unsigned Reg = MO.getReg();
       if (Reg == 0) continue;