Correct writeback handling of duplicating VLD instructions. Discovered by randomized testing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138251 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index ebcb798..725a8a2 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -1992,7 +1992,7 @@
if (regs == 2) {
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+1)%32, Address, Decoder));
}
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
@@ -2023,7 +2023,7 @@
CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
@@ -2052,7 +2052,7 @@
CHECK(S, DecodeDPRRegisterClass(Inst, Rd, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}
@@ -2097,7 +2097,7 @@
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+2*inc)%32, Address, Decoder));
CHECK(S, DecodeDPRRegisterClass(Inst, (Rd+3*inc)%32, Address, Decoder));
- if (Rm == 0xD) {
+ if (Rm != 0xF) {
CHECK(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder));
}