For PR1553:
Change the keywords for the zext and sext parameter attributes to be
zeroext and signext so they don't conflict with the keywords for the
instructions of the same name. This gets around the ambiguity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40069 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/ARM/uxt_rot.ll b/test/CodeGen/ARM/uxt_rot.ll
index d15c650..66275ea 100644
--- a/test/CodeGen/ARM/uxt_rot.ll
+++ b/test/CodeGen/ARM/uxt_rot.ll
@@ -2,19 +2,19 @@
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxtab | wc -l | grep 1
; RUN: llvm-as < %s | llc -march=arm -mattr=+v6 | grep uxth | wc -l | grep 1
-define i8 @test1(i32 %A.u) zext {
+define i8 @test1(i32 %A.u) zeroext {
%B.u = trunc i32 %A.u to i8
ret i8 %B.u
}
-define i32 @test2(i32 %A.u, i32 %B.u) zext {
+define i32 @test2(i32 %A.u, i32 %B.u) zeroext {
%C.u = trunc i32 %B.u to i8
%D.u = zext i8 %C.u to i32
%E.u = add i32 %A.u, %D.u
ret i32 %E.u
}
-define i32 @test3(i32 %A.u) zext {
+define i32 @test3(i32 %A.u) zeroext {
%B.u = lshr i32 %A.u, 8
%C.u = shl i32 %A.u, 24
%D.u = or i32 %B.u, %C.u