teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.
Teach ScheduleDAG how to handle CopyToReg with different src/dst
reg classes.
This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 01a7cd4..3c12fa1 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -1465,7 +1465,7 @@
}
}
- // Moving ST(0) to/from a register turns into FpGET_ST0_32 etc.
+ // Moving from ST(0) turns into FpGET_ST0_32 etc.
if (SrcRC == &X86::RSTRegClass) {
// Copying from ST(0). FIXME: handle ST(1) also
assert(SrcReg == X86::ST0 && "Can only copy from TOS right now");
@@ -1481,6 +1481,23 @@
BuildMI(MBB, MI, get(Opc), DestReg);
return;
}
+
+ // Moving to ST(0) turns into FpSET_ST0_32 etc.
+ if (DestRC == &X86::RSTRegClass) {
+ // Copying to ST(0). FIXME: handle ST(1) also
+ assert(DestReg == X86::ST0 && "Can only copy to TOS right now");
+ unsigned Opc;
+ if (SrcRC == &X86::RFP32RegClass)
+ Opc = X86::FpSET_ST0_32;
+ else if (SrcRC == &X86::RFP64RegClass)
+ Opc = X86::FpSET_ST0_64;
+ else {
+ assert(SrcRC == &X86::RFP80RegClass);
+ Opc = X86::FpSET_ST0_80;
+ }
+ BuildMI(MBB, MI, get(Opc)).addReg(SrcReg);
+ return;
+ }
cerr << "Not yet supported!";
abort();