Remove the isTwoAddress property from the CodeGenInstruction class. It should
not be used for anything other than backwards compat constraint handling.
Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter. Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31769 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index bc415fc..c64b5f4 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -125,7 +125,8 @@
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();
-
+ CodeGenInstruction &CGI = Target.getInstruction(InstName);
+
// Loop over all of the fields in the instruction, determining which are the
// operands to the instruction.
unsigned op = 0;
@@ -154,16 +155,15 @@
}
if (!gotOp) {
+ /// If this operand is not supposed to be emitted by the generated
+ /// emitter, skip it.
+ while (CGI.isFlatOperandNotEmitted(op))
+ ++op;
+
Case += " // op: " + VarName + "\n"
+ " op = getMachineOpValue(MI, MI.getOperand("
- + utostr(op++)
- + "));\n";
+ + utostr(op++) + "));\n";
gotOp = true;
-
- // If this is a two-address instruction and we just got the dest
- // op, skip the src op.
- if (op == 1 && Target.getInstruction(InstName).isTwoAddress)
- ++op;
}
unsigned opMask = (1 << N) - 1;
@@ -185,7 +185,7 @@
}
}
- std::vector<std::string> &InstList = CaseMap[Case];
+ std::vector<std::string> &InstList = CaseMap[Case];
InstList.push_back(InstName);
}