Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75937 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
index 025119c..20814d0 100644
--- a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
+++ b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
@@ -208,10 +208,10 @@
void SystemZAsmPrinter::printRRIAddrOperand(const MachineInstr *MI, int OpNum,
const char* Modifier) {
const MachineOperand &Base = MI->getOperand(OpNum);
- const MachineOperand &Index = MI->getOperand(OpNum+1);
+ const MachineOperand &Index = MI->getOperand(OpNum+2);
// Print displacement operand.
- printOperand(MI, OpNum+2);
+ printOperand(MI, OpNum+1);
// Print base operand (if any)
if (Base.getReg()) {
@@ -219,7 +219,7 @@
printOperand(MI, OpNum);
if (Index.getReg()) {
O << ',';
- printOperand(MI, OpNum+1);
+ printOperand(MI, OpNum+2);
}
O << ')';
} else
diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
index 84081b4..3e1cc3c 100644
--- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
@@ -105,14 +105,14 @@
#include "SystemZGenDAGISel.inc"
private:
- bool SelectAddrRRI(SDValue Op, SDValue Addr,
- SDValue &Base, SDValue &Index, SDValue &Disp);
- bool SelectLAAddr(SDValue Op, SDValue Addr,
- SDValue &Base, SDValue &Index, SDValue &Disp);
-
- SDNode *Select(SDValue Op);
bool SelectAddrRI(const SDValue& Op, SDValue& Addr,
SDValue &Base, SDValue &Disp);
+ bool SelectAddrRRI(SDValue Op, SDValue Addr,
+ SDValue &Base, SDValue &Disp, SDValue &Index);
+ bool SelectLAAddr(SDValue Op, SDValue Addr,
+ SDValue &Base, SDValue &Disp, SDValue &Index);
+
+ SDNode *Select(SDValue Op);
bool MatchAddress(SDValue N, SystemZRRIAddressMode &AM, unsigned Depth = 0);
bool MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM);
@@ -368,7 +368,7 @@
/// Returns true if the address can be represented by a base register plus
/// index register plus a signed 20-bit displacement [base + idx + imm].
bool SystemZDAGToDAGISel::SelectAddrRRI(SDValue Op, SDValue Addr,
- SDValue &Base, SDValue &Index, SDValue &Disp) {
+ SDValue &Base, SDValue &Disp, SDValue &Index) {
SystemZRRIAddressMode AM;
bool Done = false;
@@ -417,7 +417,7 @@
/// SelectLAAddr - it calls SelectAddr and determines if the maximal addressing
/// mode it matches can be cost effectively emitted as an LA/LAY instruction.
bool SystemZDAGToDAGISel::SelectLAAddr(SDValue Op, SDValue Addr,
- SDValue &Base, SDValue &Index, SDValue &Disp) {
+ SDValue &Base, SDValue &Disp, SDValue &Index) {
SystemZRRIAddressMode AM;
if (MatchAddress(Addr, AM))
diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index 9ca4be1..978562e 100644
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -164,12 +164,12 @@
def rriaddr : Operand<i64>,
ComplexPattern<i64, 3, "SelectAddrRRI", [], []> {
let PrintMethod = "printRRIAddrOperand";
- let MIOperandInfo = (ops ADDR64:$base, ADDR64:$index, i64imm:$disp);
+ let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp, ADDR64:$index);
}
def laaddr : Operand<i64>,
ComplexPattern<i64, 3, "SelectLAAddr", [add, sub, or, frameindex], []> {
let PrintMethod = "printRRIAddrOperand";
- let MIOperandInfo = (ops ADDR64:$base, ADDR64:$index, i64imm:$disp);
+ let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp, ADDR64:$index);
}