Convert VLD1 and VLD2 instructions to use pseudo-instructions until
after regalloc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112825 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/ARM/reg_sequence.ll b/test/CodeGen/ARM/reg_sequence.ll
index 729d570..2e4f10d 100644
--- a/test/CodeGen/ARM/reg_sequence.ll
+++ b/test/CodeGen/ARM/reg_sequence.ll
@@ -45,10 +45,10 @@
 entry:
 ; CHECK:        t2:
 ; CHECK:        vld1.16
-; CHECK:        vmul.i16
 ; CHECK-NOT:    vmov
 ; CHECK:        vld1.16
 ; CHECK:        vmul.i16
+; CHECK:        vmul.i16
 ; CHECK-NOT:    vmov
 ; CHECK:        vst1.16
 ; CHECK:        vst1.16