Chris Lattner | f379997 | 2005-10-14 23:40:39 +0000 | [diff] [blame] | 1 | //===- PPCInstrInfo.td - The PowerPC Instruction Set -------*- tablegen -*-===// |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
Misha Brukman | 4ad7d1b | 2004-08-09 17:24:04 +0000 | [diff] [blame] | 10 | // This file describes the subset of the 32-bit PowerPC instruction set, as used |
| 11 | // by the PowerPC instruction selector. |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
Chris Lattner | f379997 | 2005-10-14 23:40:39 +0000 | [diff] [blame] | 15 | include "PPCInstrFormats.td" |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 16 | |
Chris Lattner | e6115b3 | 2005-10-25 20:41:46 +0000 | [diff] [blame] | 17 | //===----------------------------------------------------------------------===// |
Chris Lattner | 5126984 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 18 | // PowerPC specific type constraints. |
| 19 | // |
| 20 | def SDT_PPCstfiwx : SDTypeProfile<0, 2, [ // stfiwx |
| 21 | SDTCisVT<0, f64>, SDTCisPtrTy<1> |
| 22 | ]>; |
Bill Wendling | c69107c | 2007-11-13 09:19:02 +0000 | [diff] [blame] | 23 | def SDT_PPCCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>; |
| 24 | def SDT_PPCCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>, |
| 25 | SDTCisVT<1, i32> ]>; |
Chris Lattner | f1d0b2b | 2006-03-20 01:53:53 +0000 | [diff] [blame] | 26 | def SDT_PPCvperm : SDTypeProfile<1, 3, [ |
| 27 | SDTCisVT<3, v16i8>, SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2> |
| 28 | ]>; |
| 29 | |
Chris Lattner | a17b155 | 2006-03-31 05:13:27 +0000 | [diff] [blame] | 30 | def SDT_PPCvcmp : SDTypeProfile<1, 3, [ |
Chris Lattner | 6d92cad | 2006-03-26 10:06:40 +0000 | [diff] [blame] | 31 | SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisVT<3, i32> |
| 32 | ]>; |
| 33 | |
Chris Lattner | 90564f2 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 34 | def SDT_PPCcondbr : SDTypeProfile<0, 3, [ |
Chris Lattner | 18258c6 | 2006-11-17 22:37:34 +0000 | [diff] [blame] | 35 | SDTCisVT<0, i32>, SDTCisVT<2, OtherVT> |
Chris Lattner | 90564f2 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 36 | ]>; |
| 37 | |
Chris Lattner | d998938 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 38 | def SDT_PPClbrx : SDTypeProfile<1, 3, [ |
| 39 | SDTCisVT<0, i32>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT> |
| 40 | ]>; |
| 41 | def SDT_PPCstbrx : SDTypeProfile<0, 4, [ |
| 42 | SDTCisVT<0, i32>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>, SDTCisVT<3, OtherVT> |
| 43 | ]>; |
| 44 | |
Evan Cheng | 5330192 | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 45 | def SDT_PPClarx : SDTypeProfile<1, 1, [ |
| 46 | SDTCisInt<0>, SDTCisPtrTy<1> |
Evan Cheng | 54fc97d | 2008-04-19 01:30:48 +0000 | [diff] [blame] | 47 | ]>; |
Evan Cheng | 5330192 | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 48 | def SDT_PPCstcx : SDTypeProfile<0, 2, [ |
| 49 | SDTCisInt<0>, SDTCisPtrTy<1> |
Evan Cheng | 54fc97d | 2008-04-19 01:30:48 +0000 | [diff] [blame] | 50 | ]>; |
| 51 | |
Arnold Schwaighofer | 30e62c0 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 52 | def SDT_PPCTC_ret : SDTypeProfile<0, 2, [ |
| 53 | SDTCisPtrTy<0>, SDTCisVT<1, i32> |
| 54 | ]>; |
| 55 | |
Chris Lattner | 5126984 | 2006-03-01 05:50:56 +0000 | [diff] [blame] | 56 | //===----------------------------------------------------------------------===// |
Chris Lattner | e6115b3 | 2005-10-25 20:41:46 +0000 | [diff] [blame] | 57 | // PowerPC specific DAG Nodes. |
| 58 | // |
| 59 | |
| 60 | def PPCfcfid : SDNode<"PPCISD::FCFID" , SDTFPUnaryOp, []>; |
| 61 | def PPCfctidz : SDNode<"PPCISD::FCTIDZ", SDTFPUnaryOp, []>; |
| 62 | def PPCfctiwz : SDNode<"PPCISD::FCTIWZ", SDTFPUnaryOp, []>; |
Chris Lattner | c8478d8 | 2008-01-06 06:44:58 +0000 | [diff] [blame] | 63 | def PPCstfiwx : SDNode<"PPCISD::STFIWX", SDT_PPCstfiwx, |
| 64 | [SDNPHasChain, SDNPMayStore]>; |
Chris Lattner | e6115b3 | 2005-10-25 20:41:46 +0000 | [diff] [blame] | 65 | |
Dale Johannesen | 6eaeff2 | 2007-10-10 01:01:31 +0000 | [diff] [blame] | 66 | // This sequence is used for long double->int conversions. It changes the |
| 67 | // bits in the FPSCR which is not modelled. |
| 68 | def PPCmffs : SDNode<"PPCISD::MFFS", SDTypeProfile<1, 0, [SDTCisVT<0, f64>]>, |
| 69 | [SDNPOutFlag]>; |
| 70 | def PPCmtfsb0 : SDNode<"PPCISD::MTFSB0", SDTypeProfile<0, 1, [SDTCisInt<0>]>, |
| 71 | [SDNPInFlag, SDNPOutFlag]>; |
| 72 | def PPCmtfsb1 : SDNode<"PPCISD::MTFSB1", SDTypeProfile<0, 1, [SDTCisInt<0>]>, |
| 73 | [SDNPInFlag, SDNPOutFlag]>; |
| 74 | def PPCfaddrtz: SDNode<"PPCISD::FADDRTZ", SDTFPBinOp, |
| 75 | [SDNPInFlag, SDNPOutFlag]>; |
| 76 | def PPCmtfsf : SDNode<"PPCISD::MTFSF", SDTypeProfile<1, 3, |
| 77 | [SDTCisVT<0, f64>, SDTCisInt<1>, SDTCisVT<2, f64>, |
| 78 | SDTCisVT<3, f64>]>, |
| 79 | [SDNPInFlag]>; |
| 80 | |
Chris Lattner | 9c73f09 | 2005-10-25 20:55:47 +0000 | [diff] [blame] | 81 | def PPCfsel : SDNode<"PPCISD::FSEL", |
| 82 | // Type constraint for fsel. |
| 83 | SDTypeProfile<1, 3, [SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, |
| 84 | SDTCisFP<0>, SDTCisVT<1, f64>]>, []>; |
Chris Lattner | 47f01f1 | 2005-09-08 19:50:41 +0000 | [diff] [blame] | 85 | |
Nate Begeman | 993aeb2 | 2005-12-13 22:55:22 +0000 | [diff] [blame] | 86 | def PPChi : SDNode<"PPCISD::Hi", SDTIntBinOp, []>; |
| 87 | def PPClo : SDNode<"PPCISD::Lo", SDTIntBinOp, []>; |
| 88 | def PPCvmaddfp : SDNode<"PPCISD::VMADDFP", SDTFPTernaryOp, []>; |
| 89 | def PPCvnmsubfp : SDNode<"PPCISD::VNMSUBFP", SDTFPTernaryOp, []>; |
Chris Lattner | 860e886 | 2005-11-17 07:30:41 +0000 | [diff] [blame] | 90 | |
Chris Lattner | f1d0b2b | 2006-03-20 01:53:53 +0000 | [diff] [blame] | 91 | def PPCvperm : SDNode<"PPCISD::VPERM", SDT_PPCvperm, []>; |
Chris Lattner | b2177b9 | 2006-03-19 06:55:52 +0000 | [diff] [blame] | 92 | |
Chris Lattner | 4172b10 | 2005-12-06 02:10:38 +0000 | [diff] [blame] | 93 | // These nodes represent the 32-bit PPC shifts that operate on 6-bit shift |
| 94 | // amounts. These nodes are generated by the multi-precision shift code. |
Chris Lattner | af8ee84 | 2008-03-07 20:18:24 +0000 | [diff] [blame] | 95 | def PPCsrl : SDNode<"PPCISD::SRL" , SDTIntShiftOp>; |
| 96 | def PPCsra : SDNode<"PPCISD::SRA" , SDTIntShiftOp>; |
| 97 | def PPCshl : SDNode<"PPCISD::SHL" , SDTIntShiftOp>; |
Chris Lattner | 4172b10 | 2005-12-06 02:10:38 +0000 | [diff] [blame] | 98 | |
Chris Lattner | ecfe55e | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 99 | def PPCextsw_32 : SDNode<"PPCISD::EXTSW_32" , SDTIntUnaryOp>; |
Chris Lattner | c8478d8 | 2008-01-06 06:44:58 +0000 | [diff] [blame] | 100 | def PPCstd_32 : SDNode<"PPCISD::STD_32" , SDTStore, |
| 101 | [SDNPHasChain, SDNPMayStore]>; |
Chris Lattner | ecfe55e | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 102 | |
Chris Lattner | 937a79d | 2005-12-04 19:01:59 +0000 | [diff] [blame] | 103 | // These are target-independent nodes, but have target-specific formats. |
Bill Wendling | c69107c | 2007-11-13 09:19:02 +0000 | [diff] [blame] | 104 | def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_PPCCallSeqStart, |
Evan Cheng | bb7b844 | 2006-08-11 09:03:33 +0000 | [diff] [blame] | 105 | [SDNPHasChain, SDNPOutFlag]>; |
Bill Wendling | c69107c | 2007-11-13 09:19:02 +0000 | [diff] [blame] | 106 | def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_PPCCallSeqEnd, |
Bill Wendling | 0f8d9c0 | 2007-11-13 00:44:25 +0000 | [diff] [blame] | 107 | [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; |
Chris Lattner | 937a79d | 2005-12-04 19:01:59 +0000 | [diff] [blame] | 108 | |
Chris Lattner | 2e6b77d | 2006-06-27 18:36:44 +0000 | [diff] [blame] | 109 | def SDT_PPCCall : SDTypeProfile<0, -1, [SDTCisInt<0>]>; |
Nicolas Geoffray | 63f8fb1 | 2007-02-27 13:01:19 +0000 | [diff] [blame] | 110 | def PPCcall_Macho : SDNode<"PPCISD::CALL_Macho", SDT_PPCCall, |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 111 | [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; |
Nicolas Geoffray | 63f8fb1 | 2007-02-27 13:01:19 +0000 | [diff] [blame] | 112 | def PPCcall_ELF : SDNode<"PPCISD::CALL_ELF", SDT_PPCCall, |
Chris Lattner | 9a2a497 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 113 | [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; |
Chris Lattner | c703a8f | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 114 | def PPCmtctr : SDNode<"PPCISD::MTCTR", SDT_PPCCall, |
| 115 | [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; |
Chris Lattner | 48be23c | 2008-01-15 22:02:54 +0000 | [diff] [blame] | 116 | def PPCbctrl_Macho : SDNode<"PPCISD::BCTRL_Macho", SDTNone, |
Bill Wendling | 6ef781f | 2008-02-27 06:33:05 +0000 | [diff] [blame] | 117 | [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 118 | |
Chris Lattner | 48be23c | 2008-01-15 22:02:54 +0000 | [diff] [blame] | 119 | def PPCbctrl_ELF : SDNode<"PPCISD::BCTRL_ELF", SDTNone, |
Bill Wendling | 6ef781f | 2008-02-27 06:33:05 +0000 | [diff] [blame] | 120 | [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; |
Chris Lattner | 9a2a497 | 2006-05-17 06:01:33 +0000 | [diff] [blame] | 121 | |
Chris Lattner | 48be23c | 2008-01-15 22:02:54 +0000 | [diff] [blame] | 122 | def retflag : SDNode<"PPCISD::RET_FLAG", SDTNone, |
Bill Wendling | 6ef781f | 2008-02-27 06:33:05 +0000 | [diff] [blame] | 123 | [SDNPHasChain, SDNPOptInFlag]>; |
Nate Begeman | 9e4dd9d | 2005-12-20 00:26:01 +0000 | [diff] [blame] | 124 | |
Arnold Schwaighofer | 30e62c0 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 125 | def PPCtc_return : SDNode<"PPCISD::TC_RETURN", SDT_PPCTC_ret, |
| 126 | [SDNPHasChain, SDNPOptInFlag]>; |
| 127 | |
| 128 | def PPCtailcall : SDNode<"PPCISD::TAILCALL", SDT_PPCCall, |
| 129 | [SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>; |
| 130 | |
Chris Lattner | a17b155 | 2006-03-31 05:13:27 +0000 | [diff] [blame] | 131 | def PPCvcmp : SDNode<"PPCISD::VCMP" , SDT_PPCvcmp, []>; |
| 132 | def PPCvcmp_o : SDNode<"PPCISD::VCMPo", SDT_PPCvcmp, [SDNPOutFlag]>; |
Chris Lattner | 6d92cad | 2006-03-26 10:06:40 +0000 | [diff] [blame] | 133 | |
Chris Lattner | 90564f2 | 2006-04-18 17:59:36 +0000 | [diff] [blame] | 134 | def PPCcondbranch : SDNode<"PPCISD::COND_BRANCH", SDT_PPCcondbr, |
| 135 | [SDNPHasChain, SDNPOptInFlag]>; |
| 136 | |
Chris Lattner | 9b37aaf | 2008-01-10 05:12:37 +0000 | [diff] [blame] | 137 | def PPClbrx : SDNode<"PPCISD::LBRX", SDT_PPClbrx, |
| 138 | [SDNPHasChain, SDNPMayLoad]>; |
Chris Lattner | c8478d8 | 2008-01-06 06:44:58 +0000 | [diff] [blame] | 139 | def PPCstbrx : SDNode<"PPCISD::STBRX", SDT_PPCstbrx, |
| 140 | [SDNPHasChain, SDNPMayStore]>; |
Chris Lattner | d998938 | 2006-07-10 20:56:58 +0000 | [diff] [blame] | 141 | |
Evan Cheng | 5330192 | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 142 | // Instructions to support atomic operations |
Evan Cheng | 8608f2e | 2008-04-19 02:30:38 +0000 | [diff] [blame] | 143 | def PPClarx : SDNode<"PPCISD::LARX", SDT_PPClarx, |
| 144 | [SDNPHasChain, SDNPMayLoad]>; |
| 145 | def PPCstcx : SDNode<"PPCISD::STCX", SDT_PPCstcx, |
| 146 | [SDNPHasChain, SDNPMayStore]>; |
Evan Cheng | 54fc97d | 2008-04-19 01:30:48 +0000 | [diff] [blame] | 147 | |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 148 | // Instructions to support dynamic alloca. |
| 149 | def SDTDynOp : SDTypeProfile<1, 2, []>; |
| 150 | def PPCdynalloc : SDNode<"PPCISD::DYNALLOC", SDTDynOp, [SDNPHasChain]>; |
| 151 | |
Chris Lattner | 47f01f1 | 2005-09-08 19:50:41 +0000 | [diff] [blame] | 152 | //===----------------------------------------------------------------------===// |
Chris Lattner | 2eb2517 | 2005-09-09 00:39:56 +0000 | [diff] [blame] | 153 | // PowerPC specific transformation functions and pattern fragments. |
| 154 | // |
Nate Begeman | 8d94832 | 2005-10-19 01:12:32 +0000 | [diff] [blame] | 155 | |
Nate Begeman | 2d5aff7 | 2005-10-19 18:42:01 +0000 | [diff] [blame] | 156 | def SHL32 : SDNodeXForm<imm, [{ |
| 157 | // Transformation function: 31 - imm |
| 158 | return getI32Imm(31 - N->getValue()); |
| 159 | }]>; |
| 160 | |
Nate Begeman | 2d5aff7 | 2005-10-19 18:42:01 +0000 | [diff] [blame] | 161 | def SRL32 : SDNodeXForm<imm, [{ |
| 162 | // Transformation function: 32 - imm |
| 163 | return N->getValue() ? getI32Imm(32 - N->getValue()) : getI32Imm(0); |
| 164 | }]>; |
| 165 | |
Chris Lattner | 2eb2517 | 2005-09-09 00:39:56 +0000 | [diff] [blame] | 166 | def LO16 : SDNodeXForm<imm, [{ |
| 167 | // Transformation function: get the low 16 bits. |
| 168 | return getI32Imm((unsigned short)N->getValue()); |
| 169 | }]>; |
| 170 | |
| 171 | def HI16 : SDNodeXForm<imm, [{ |
| 172 | // Transformation function: shift the immediate value down into the low bits. |
| 173 | return getI32Imm((unsigned)N->getValue() >> 16); |
| 174 | }]>; |
Chris Lattner | 3e63ead | 2005-09-08 17:33:10 +0000 | [diff] [blame] | 175 | |
Chris Lattner | 79d0e9f | 2005-09-28 23:07:13 +0000 | [diff] [blame] | 176 | def HA16 : SDNodeXForm<imm, [{ |
| 177 | // Transformation function: shift the immediate value down into the low bits. |
| 178 | signed int Val = N->getValue(); |
| 179 | return getI32Imm((Val - (signed short)Val) >> 16); |
| 180 | }]>; |
Nate Begeman | f42f133 | 2006-09-22 05:01:56 +0000 | [diff] [blame] | 181 | def MB : SDNodeXForm<imm, [{ |
| 182 | // Transformation function: get the start bit of a mask |
| 183 | unsigned mb, me; |
| 184 | (void)isRunOfOnes((unsigned)N->getValue(), mb, me); |
| 185 | return getI32Imm(mb); |
| 186 | }]>; |
Chris Lattner | 79d0e9f | 2005-09-28 23:07:13 +0000 | [diff] [blame] | 187 | |
Nate Begeman | f42f133 | 2006-09-22 05:01:56 +0000 | [diff] [blame] | 188 | def ME : SDNodeXForm<imm, [{ |
| 189 | // Transformation function: get the end bit of a mask |
| 190 | unsigned mb, me; |
| 191 | (void)isRunOfOnes((unsigned)N->getValue(), mb, me); |
| 192 | return getI32Imm(me); |
| 193 | }]>; |
| 194 | def maskimm32 : PatLeaf<(imm), [{ |
| 195 | // maskImm predicate - True if immediate is a run of ones. |
| 196 | unsigned mb, me; |
| 197 | if (N->getValueType(0) == MVT::i32) |
| 198 | return isRunOfOnes((unsigned)N->getValue(), mb, me); |
| 199 | else |
| 200 | return false; |
| 201 | }]>; |
Chris Lattner | 79d0e9f | 2005-09-28 23:07:13 +0000 | [diff] [blame] | 202 | |
Chris Lattner | 3e63ead | 2005-09-08 17:33:10 +0000 | [diff] [blame] | 203 | def immSExt16 : PatLeaf<(imm), [{ |
| 204 | // immSExt16 predicate - True if the immediate fits in a 16-bit sign extended |
| 205 | // field. Used by instructions like 'addi'. |
Chris Lattner | 7f7b346e | 2006-06-20 23:21:20 +0000 | [diff] [blame] | 206 | if (N->getValueType(0) == MVT::i32) |
| 207 | return (int32_t)N->getValue() == (short)N->getValue(); |
| 208 | else |
| 209 | return (int64_t)N->getValue() == (short)N->getValue(); |
Chris Lattner | 3e63ead | 2005-09-08 17:33:10 +0000 | [diff] [blame] | 210 | }]>; |
Chris Lattner | bfde080 | 2005-09-08 17:40:49 +0000 | [diff] [blame] | 211 | def immZExt16 : PatLeaf<(imm), [{ |
| 212 | // immZExt16 predicate - True if the immediate fits in a 16-bit zero extended |
| 213 | // field. Used by instructions like 'ori'. |
Chris Lattner | 7f7b346e | 2006-06-20 23:21:20 +0000 | [diff] [blame] | 214 | return (uint64_t)N->getValue() == (unsigned short)N->getValue(); |
Chris Lattner | 2eb2517 | 2005-09-09 00:39:56 +0000 | [diff] [blame] | 215 | }], LO16>; |
| 216 | |
Chris Lattner | 0ea70b2 | 2006-06-20 22:34:10 +0000 | [diff] [blame] | 217 | // imm16Shifted* - These match immediates where the low 16-bits are zero. There |
| 218 | // are two forms: imm16ShiftedSExt and imm16ShiftedZExt. These two forms are |
| 219 | // identical in 32-bit mode, but in 64-bit mode, they return true if the |
| 220 | // immediate fits into a sign/zero extended 32-bit immediate (with the low bits |
| 221 | // clear). |
| 222 | def imm16ShiftedZExt : PatLeaf<(imm), [{ |
| 223 | // imm16ShiftedZExt predicate - True if only bits in the top 16-bits of the |
| 224 | // immediate are set. Used by instructions like 'xoris'. |
| 225 | return (N->getValue() & ~uint64_t(0xFFFF0000)) == 0; |
| 226 | }], HI16>; |
| 227 | |
| 228 | def imm16ShiftedSExt : PatLeaf<(imm), [{ |
| 229 | // imm16ShiftedSExt predicate - True if only bits in the top 16-bits of the |
| 230 | // immediate are set. Used by instructions like 'addis'. Identical to |
| 231 | // imm16ShiftedZExt in 32-bit mode. |
Chris Lattner | dd58343 | 2006-06-20 21:39:30 +0000 | [diff] [blame] | 232 | if (N->getValue() & 0xFFFF) return false; |
| 233 | if (N->getValueType(0) == MVT::i32) |
| 234 | return true; |
| 235 | // For 64-bit, make sure it is sext right. |
| 236 | return N->getValue() == (uint64_t)(int)N->getValue(); |
Chris Lattner | 2eb2517 | 2005-09-09 00:39:56 +0000 | [diff] [blame] | 237 | }], HI16>; |
Chris Lattner | 3e63ead | 2005-09-08 17:33:10 +0000 | [diff] [blame] | 238 | |
Chris Lattner | 9c61dcf | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 239 | |
Chris Lattner | 47f01f1 | 2005-09-08 19:50:41 +0000 | [diff] [blame] | 240 | //===----------------------------------------------------------------------===// |
| 241 | // PowerPC Flag Definitions. |
| 242 | |
Chris Lattner | 0bdc6f1 | 2005-04-19 04:32:54 +0000 | [diff] [blame] | 243 | class isPPC64 { bit PPC64 = 1; } |
Chris Lattner | 883059f | 2005-04-19 05:15:18 +0000 | [diff] [blame] | 244 | class isDOT { |
| 245 | list<Register> Defs = [CR0]; |
| 246 | bit RC = 1; |
| 247 | } |
Chris Lattner | 0bdc6f1 | 2005-04-19 04:32:54 +0000 | [diff] [blame] | 248 | |
Chris Lattner | 302bf9c | 2006-11-08 02:13:12 +0000 | [diff] [blame] | 249 | class RegConstraint<string C> { |
| 250 | string Constraints = C; |
| 251 | } |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 252 | class NoEncode<string E> { |
| 253 | string DisableEncoding = E; |
| 254 | } |
Chris Lattner | 47f01f1 | 2005-09-08 19:50:41 +0000 | [diff] [blame] | 255 | |
| 256 | |
| 257 | //===----------------------------------------------------------------------===// |
| 258 | // PowerPC Operand Definitions. |
Chris Lattner | 7bb424f | 2004-08-14 23:27:29 +0000 | [diff] [blame] | 259 | |
Chris Lattner | 9c61dcf | 2006-03-25 06:12:06 +0000 | [diff] [blame] | 260 | def s5imm : Operand<i32> { |
| 261 | let PrintMethod = "printS5ImmOperand"; |
| 262 | } |
Chris Lattner | 4345a4a | 2005-09-14 20:53:05 +0000 | [diff] [blame] | 263 | def u5imm : Operand<i32> { |
Nate Begeman | c330612 | 2004-08-21 05:56:39 +0000 | [diff] [blame] | 264 | let PrintMethod = "printU5ImmOperand"; |
| 265 | } |
Chris Lattner | 4345a4a | 2005-09-14 20:53:05 +0000 | [diff] [blame] | 266 | def u6imm : Operand<i32> { |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 267 | let PrintMethod = "printU6ImmOperand"; |
| 268 | } |
Chris Lattner | 4345a4a | 2005-09-14 20:53:05 +0000 | [diff] [blame] | 269 | def s16imm : Operand<i32> { |
Nate Begeman | ed42853 | 2004-09-04 05:00:00 +0000 | [diff] [blame] | 270 | let PrintMethod = "printS16ImmOperand"; |
| 271 | } |
Chris Lattner | 4345a4a | 2005-09-14 20:53:05 +0000 | [diff] [blame] | 272 | def u16imm : Operand<i32> { |
Chris Lattner | 97b2a2e | 2004-08-15 05:20:16 +0000 | [diff] [blame] | 273 | let PrintMethod = "printU16ImmOperand"; |
| 274 | } |
Chris Lattner | 841d12d | 2005-10-18 16:51:22 +0000 | [diff] [blame] | 275 | def s16immX4 : Operand<i32> { // Multiply imm by 4 before printing. |
| 276 | let PrintMethod = "printS16X4ImmOperand"; |
| 277 | } |
Chris Lattner | 1e48478 | 2005-12-04 18:42:54 +0000 | [diff] [blame] | 278 | def target : Operand<OtherVT> { |
Nate Begeman | b7a8f2c | 2004-09-02 08:13:00 +0000 | [diff] [blame] | 279 | let PrintMethod = "printBranchOperand"; |
| 280 | } |
Chris Lattner | 059ca0f | 2006-06-16 21:01:35 +0000 | [diff] [blame] | 281 | def calltarget : Operand<iPTR> { |
Chris Lattner | 3e7f86a | 2005-11-17 19:16:08 +0000 | [diff] [blame] | 282 | let PrintMethod = "printCallOperand"; |
| 283 | } |
Chris Lattner | 059ca0f | 2006-06-16 21:01:35 +0000 | [diff] [blame] | 284 | def aaddr : Operand<iPTR> { |
Nate Begeman | 422b0ce | 2005-11-16 00:48:01 +0000 | [diff] [blame] | 285 | let PrintMethod = "printAbsAddrOperand"; |
| 286 | } |
Chris Lattner | 059ca0f | 2006-06-16 21:01:35 +0000 | [diff] [blame] | 287 | def piclabel: Operand<iPTR> { |
Nate Begeman | b7a8f2c | 2004-09-02 08:13:00 +0000 | [diff] [blame] | 288 | let PrintMethod = "printPICLabel"; |
| 289 | } |
Nate Begeman | ed42853 | 2004-09-04 05:00:00 +0000 | [diff] [blame] | 290 | def symbolHi: Operand<i32> { |
| 291 | let PrintMethod = "printSymbolHi"; |
| 292 | } |
| 293 | def symbolLo: Operand<i32> { |
| 294 | let PrintMethod = "printSymbolLo"; |
| 295 | } |
Nate Begeman | adeb43d | 2005-07-20 22:42:00 +0000 | [diff] [blame] | 296 | def crbitm: Operand<i8> { |
| 297 | let PrintMethod = "printcrbitm"; |
| 298 | } |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 299 | // Address operands |
Chris Lattner | 059ca0f | 2006-06-16 21:01:35 +0000 | [diff] [blame] | 300 | def memri : Operand<iPTR> { |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 301 | let PrintMethod = "printMemRegImm"; |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 302 | let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg); |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 303 | } |
Chris Lattner | 059ca0f | 2006-06-16 21:01:35 +0000 | [diff] [blame] | 304 | def memrr : Operand<iPTR> { |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 305 | let PrintMethod = "printMemRegReg"; |
Chris Lattner | 66d7ebb | 2006-06-16 21:29:03 +0000 | [diff] [blame] | 306 | let MIOperandInfo = (ops ptr_rc, ptr_rc); |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 307 | } |
Chris Lattner | 059ca0f | 2006-06-16 21:01:35 +0000 | [diff] [blame] | 308 | def memrix : Operand<iPTR> { // memri where the imm is shifted 2 bits. |
Chris Lattner | ecfe55e | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 309 | let PrintMethod = "printMemRegImmShifted"; |
Chris Lattner | 0851b4f | 2006-11-15 19:55:13 +0000 | [diff] [blame] | 310 | let MIOperandInfo = (ops i32imm:$imm, ptr_rc:$reg); |
Chris Lattner | ecfe55e | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 311 | } |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 312 | |
Chris Lattner | 6fc4007 | 2006-11-04 05:42:48 +0000 | [diff] [blame] | 313 | // PowerPC Predicate operand. 20 = (0<<5)|20 = always, CR0 is a dummy reg |
Chris Lattner | af53a87 | 2006-11-04 05:27:39 +0000 | [diff] [blame] | 314 | // that doesn't matter. |
Evan Cheng | 06aae67 | 2007-07-06 23:22:46 +0000 | [diff] [blame] | 315 | def pred : PredicateOperand<OtherVT, (ops imm, CRRC), |
Nate Begeman | ba8d51c | 2008-02-13 02:58:33 +0000 | [diff] [blame] | 316 | (ops (i32 20), (i32 zero_reg))> { |
Chris Lattner | af53a87 | 2006-11-04 05:27:39 +0000 | [diff] [blame] | 317 | let PrintMethod = "printPredicateOperand"; |
| 318 | } |
Chris Lattner | 0638b26 | 2006-11-03 23:53:25 +0000 | [diff] [blame] | 319 | |
Chris Lattner | a613d26 | 2006-01-12 02:05:36 +0000 | [diff] [blame] | 320 | // Define PowerPC specific addressing mode. |
Evan Cheng | af9db75 | 2006-10-11 21:03:53 +0000 | [diff] [blame] | 321 | def iaddr : ComplexPattern<iPTR, 2, "SelectAddrImm", [], []>; |
| 322 | def xaddr : ComplexPattern<iPTR, 2, "SelectAddrIdx", [], []>; |
| 323 | def xoaddr : ComplexPattern<iPTR, 2, "SelectAddrIdxOnly",[], []>; |
| 324 | def ixaddr : ComplexPattern<iPTR, 2, "SelectAddrImmShift", [], []>; // "std" |
Chris Lattner | 97b2a2e | 2004-08-15 05:20:16 +0000 | [diff] [blame] | 325 | |
Chris Lattner | 74531e4 | 2006-11-16 00:41:37 +0000 | [diff] [blame] | 326 | /// This is just the offset part of iaddr, used for preinc. |
| 327 | def iaddroff : ComplexPattern<iPTR, 1, "SelectAddrImmOffs", [], []>; |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 328 | |
Evan Cheng | 8c75ef9 | 2005-12-14 22:07:12 +0000 | [diff] [blame] | 329 | //===----------------------------------------------------------------------===// |
| 330 | // PowerPC Instruction Predicate Definitions. |
Evan Cheng | 6a3bfd9 | 2005-12-20 20:08:53 +0000 | [diff] [blame] | 331 | def FPContractions : Predicate<"!NoExcessFPPrecision">; |
Evan Cheng | 152b7e1 | 2007-10-23 06:42:42 +0000 | [diff] [blame] | 332 | def In32BitMode : Predicate<"!PPCSubTarget.isPPC64()">; |
| 333 | def In64BitMode : Predicate<"PPCSubTarget.isPPC64()">; |
Chris Lattner | 47f01f1 | 2005-09-08 19:50:41 +0000 | [diff] [blame] | 334 | |
Chris Lattner | 6a5339b | 2006-11-14 18:44:47 +0000 | [diff] [blame] | 335 | |
Chris Lattner | 47f01f1 | 2005-09-08 19:50:41 +0000 | [diff] [blame] | 336 | //===----------------------------------------------------------------------===// |
| 337 | // PowerPC Instruction Definitions. |
| 338 | |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 339 | // Pseudo-instructions: |
Chris Lattner | 47f01f1 | 2005-09-08 19:50:41 +0000 | [diff] [blame] | 340 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 341 | let hasCtrlDep = 1 in { |
Evan Cheng | 071a279 | 2007-09-11 19:55:27 +0000 | [diff] [blame] | 342 | let Defs = [R1], Uses = [R1] in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 343 | def ADJCALLSTACKDOWN : Pseudo<(outs), (ins u16imm:$amt), |
Chris Lattner | 5468966 | 2006-09-27 02:55:21 +0000 | [diff] [blame] | 344 | "${:comment} ADJCALLSTACKDOWN", |
Evan Cheng | 071a279 | 2007-09-11 19:55:27 +0000 | [diff] [blame] | 345 | [(callseq_start imm:$amt)]>; |
Bill Wendling | 0f8d9c0 | 2007-11-13 00:44:25 +0000 | [diff] [blame] | 346 | def ADJCALLSTACKUP : Pseudo<(outs), (ins u16imm:$amt1, u16imm:$amt2), |
Chris Lattner | 5468966 | 2006-09-27 02:55:21 +0000 | [diff] [blame] | 347 | "${:comment} ADJCALLSTACKUP", |
Bill Wendling | 0f8d9c0 | 2007-11-13 00:44:25 +0000 | [diff] [blame] | 348 | [(callseq_end imm:$amt1, imm:$amt2)]>; |
Evan Cheng | 071a279 | 2007-09-11 19:55:27 +0000 | [diff] [blame] | 349 | } |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 350 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 351 | def UPDATE_VRSAVE : Pseudo<(outs GPRC:$rD), (ins GPRC:$rS), |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 352 | "UPDATE_VRSAVE $rD, $rS", []>; |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 353 | } |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 354 | |
Evan Cheng | 071a279 | 2007-09-11 19:55:27 +0000 | [diff] [blame] | 355 | let Defs = [R1], Uses = [R1] in |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 356 | def DYNALLOC : Pseudo<(outs GPRC:$result), (ins GPRC:$negsize, memri:$fpsi), |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 357 | "${:comment} DYNALLOC $result, $negsize, $fpsi", |
| 358 | [(set GPRC:$result, |
Evan Cheng | 071a279 | 2007-09-11 19:55:27 +0000 | [diff] [blame] | 359 | (PPCdynalloc GPRC:$negsize, iaddr:$fpsi))]>; |
Jim Laskey | 2f616bf | 2006-11-16 22:43:37 +0000 | [diff] [blame] | 360 | |
Chris Lattner | 8a2d3ca | 2005-08-26 21:23:58 +0000 | [diff] [blame] | 361 | // SELECT_CC_* - Used to implement the SELECT_CC DAG operation. Expanded by the |
| 362 | // scheduler into a branch sequence. |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 363 | let usesCustomDAGSchedInserter = 1, // Expanded by the scheduler. |
| 364 | PPC970_Single = 1 in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 365 | def SELECT_CC_I4 : Pseudo<(outs GPRC:$dst), (ins CRRC:$cond, GPRC:$T, GPRC:$F, |
Chris Lattner | 5468966 | 2006-09-27 02:55:21 +0000 | [diff] [blame] | 366 | i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", |
| 367 | []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 368 | def SELECT_CC_I8 : Pseudo<(outs G8RC:$dst), (ins CRRC:$cond, G8RC:$T, G8RC:$F, |
Chris Lattner | 5468966 | 2006-09-27 02:55:21 +0000 | [diff] [blame] | 369 | i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", |
| 370 | []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 371 | def SELECT_CC_F4 : Pseudo<(outs F4RC:$dst), (ins CRRC:$cond, F4RC:$T, F4RC:$F, |
Chris Lattner | 5468966 | 2006-09-27 02:55:21 +0000 | [diff] [blame] | 372 | i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", |
| 373 | []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 374 | def SELECT_CC_F8 : Pseudo<(outs F8RC:$dst), (ins CRRC:$cond, F8RC:$T, F8RC:$F, |
Chris Lattner | 5468966 | 2006-09-27 02:55:21 +0000 | [diff] [blame] | 375 | i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", |
| 376 | []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 377 | def SELECT_CC_VRRC: Pseudo<(outs VRRC:$dst), (ins CRRC:$cond, VRRC:$T, VRRC:$F, |
Chris Lattner | 5468966 | 2006-09-27 02:55:21 +0000 | [diff] [blame] | 378 | i32imm:$BROPC), "${:comment} SELECT_CC PSEUDO!", |
| 379 | []>; |
Chris Lattner | 8a2d3ca | 2005-08-26 21:23:58 +0000 | [diff] [blame] | 380 | } |
| 381 | |
Bill Wendling | 7194aaf | 2008-03-03 22:19:16 +0000 | [diff] [blame] | 382 | // SPILL_CR - Indicate that we're dumping the CR register, so we'll need to |
| 383 | // scavenge a register for it. |
| 384 | def SPILL_CR : Pseudo<(outs), (ins GPRC:$cond, memri:$F), |
| 385 | "${:comment} SPILL_CR $cond $F", []>; |
| 386 | |
Evan Cheng | ffbacca | 2007-07-21 00:34:19 +0000 | [diff] [blame] | 387 | let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7 in { |
Evan Cheng | 6da8d99 | 2006-01-09 18:28:21 +0000 | [diff] [blame] | 388 | let isReturn = 1 in |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 389 | def BLR : XLForm_2_br<19, 16, 0, (outs), (ins pred:$p), |
Chris Lattner | 6fc4007 | 2006-11-04 05:42:48 +0000 | [diff] [blame] | 390 | "b${p:cc}lr ${p:reg}", BrB, |
| 391 | [(retflag)]>; |
Owen Anderson | 20ab290 | 2007-11-12 07:39:39 +0000 | [diff] [blame] | 392 | let isBranch = 1, isIndirectBranch = 1 in |
| 393 | def BCTR : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>; |
Chris Lattner | 47f01f1 | 2005-09-08 19:50:41 +0000 | [diff] [blame] | 394 | } |
| 395 | |
Chris Lattner | 7a823bd | 2005-02-15 20:26:49 +0000 | [diff] [blame] | 396 | let Defs = [LR] in |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 397 | def MovePCtoLR : Pseudo<(outs), (ins piclabel:$label), "bl $label", []>, |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 398 | PPC970_Unit_BRU; |
Misha Brukman | 5dfe3a9 | 2004-06-21 16:55:25 +0000 | [diff] [blame] | 399 | |
Evan Cheng | ffbacca | 2007-07-21 00:34:19 +0000 | [diff] [blame] | 400 | let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7 in { |
Chris Lattner | 594f4c6 | 2006-10-13 19:10:34 +0000 | [diff] [blame] | 401 | let isBarrier = 1 in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 402 | def B : IForm<18, 0, 0, (outs), (ins target:$dst), |
Chris Lattner | 1e48478 | 2005-12-04 18:42:54 +0000 | [diff] [blame] | 403 | "b $dst", BrB, |
| 404 | [(br bb:$dst)]>; |
Chris Lattner | 594f4c6 | 2006-10-13 19:10:34 +0000 | [diff] [blame] | 405 | } |
Chris Lattner | dd99885 | 2004-11-22 23:07:01 +0000 | [diff] [blame] | 406 | |
Chris Lattner | 18258c6 | 2006-11-17 22:37:34 +0000 | [diff] [blame] | 407 | // BCC represents an arbitrary conditional branch on a predicate. |
| 408 | // FIXME: should be able to write a pattern for PPCcondbranch, but can't use |
| 409 | // a two-value operand where a dag node expects two operands. :( |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 410 | def BCC : BForm<16, 0, 0, (outs), (ins pred:$cond, target:$dst), |
Chris Lattner | 54e853b | 2006-11-18 00:32:03 +0000 | [diff] [blame] | 411 | "b${cond:cc} ${cond:reg}, $dst" |
| 412 | /*[(PPCcondbranch CRRC:$crS, imm:$opc, bb:$dst)]*/>; |
Misha Brukman | b2edb44 | 2004-06-28 18:23:35 +0000 | [diff] [blame] | 413 | } |
| 414 | |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 415 | // Macho ABI Calls. |
Evan Cheng | ffbacca | 2007-07-21 00:34:19 +0000 | [diff] [blame] | 416 | let isCall = 1, PPC970_Unit = 7, |
Misha Brukman | 5fa2b02 | 2004-06-29 23:37:36 +0000 | [diff] [blame] | 417 | // All calls clobber the non-callee saved registers... |
Misha Brukman | c661c30 | 2004-06-30 22:00:45 +0000 | [diff] [blame] | 418 | Defs = [R0,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12, |
| 419 | F0,F1,F2,F3,F4,F5,F6,F7,F8,F9,F10,F11,F12,F13, |
Chris Lattner | be80fc8 | 2006-03-16 22:35:59 +0000 | [diff] [blame] | 420 | V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19, |
Chris Lattner | 1f24df6 | 2005-08-22 22:32:13 +0000 | [diff] [blame] | 421 | LR,CTR, |
Nicolas Geoffray | 0404cd9 | 2008-03-10 14:12:10 +0000 | [diff] [blame] | 422 | CR0,CR1,CR5,CR6,CR7, |
| 423 | CR0LT,CR0GT,CR0EQ,CR0UN,CR1LT,CR1GT,CR1EQ,CR1UN,CR5LT,CR5GT,CR5EQ, |
| 424 | CR5UN,CR6LT,CR6GT,CR6EQ,CR6UN,CR7LT,CR7GT,CR7EQ,CR7UN] in { |
Misha Brukman | c661c30 | 2004-06-30 22:00:45 +0000 | [diff] [blame] | 425 | // Convenient aliases for call instructions |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 426 | def BL_Macho : IForm<18, 0, 1, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 427 | (outs), (ins calltarget:$func, variable_ops), |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 428 | "bl $func", BrB, []>; // See Pat patterns below. |
| 429 | def BLA_Macho : IForm<18, 1, 1, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 430 | (outs), (ins aaddr:$func, variable_ops), |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 431 | "bla $func", BrB, [(PPCcall_Macho (i32 imm:$func))]>; |
| 432 | def BCTRL_Macho : XLForm_2_ext<19, 528, 20, 0, 1, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 433 | (outs), (ins variable_ops), |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 434 | "bctrl", BrB, |
Evan Cheng | 152b7e1 | 2007-10-23 06:42:42 +0000 | [diff] [blame] | 435 | [(PPCbctrl_Macho)]>, Requires<[In32BitMode]>; |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 436 | } |
| 437 | |
| 438 | // ELF ABI Calls. |
Evan Cheng | ffbacca | 2007-07-21 00:34:19 +0000 | [diff] [blame] | 439 | let isCall = 1, PPC970_Unit = 7, |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 440 | // All calls clobber the non-callee saved registers... |
| 441 | Defs = [R0,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12, |
Nicolas Geoffray | ef3c030 | 2007-04-03 10:27:07 +0000 | [diff] [blame] | 442 | F0,F1,F2,F3,F4,F5,F6,F7,F8, |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 443 | V0,V1,V2,V3,V4,V5,V6,V7,V8,V9,V10,V11,V12,V13,V14,V15,V16,V17,V18,V19, |
| 444 | LR,CTR, |
Nicolas Geoffray | 0404cd9 | 2008-03-10 14:12:10 +0000 | [diff] [blame] | 445 | CR0,CR1,CR5,CR6,CR7, |
| 446 | CR0LT,CR0GT,CR0EQ,CR0UN,CR1LT,CR1GT,CR1EQ,CR1UN,CR5LT,CR5GT,CR5EQ, |
| 447 | CR5UN,CR6LT,CR6GT,CR6EQ,CR6UN,CR7LT,CR7GT,CR7EQ,CR7UN] in { |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 448 | // Convenient aliases for call instructions |
| 449 | def BL_ELF : IForm<18, 0, 1, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 450 | (outs), (ins calltarget:$func, variable_ops), |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 451 | "bl $func", BrB, []>; // See Pat patterns below. |
| 452 | def BLA_ELF : IForm<18, 1, 1, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 453 | (outs), (ins aaddr:$func, variable_ops), |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 454 | "bla $func", BrB, |
Nicolas Geoffray | 63f8fb1 | 2007-02-27 13:01:19 +0000 | [diff] [blame] | 455 | [(PPCcall_ELF (i32 imm:$func))]>; |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 456 | def BCTRL_ELF : XLForm_2_ext<19, 528, 20, 0, 1, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 457 | (outs), (ins variable_ops), |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 458 | "bctrl", BrB, |
Evan Cheng | 152b7e1 | 2007-10-23 06:42:42 +0000 | [diff] [blame] | 459 | [(PPCbctrl_ELF)]>, Requires<[In32BitMode]>; |
Misha Brukman | 5fa2b02 | 2004-06-29 23:37:36 +0000 | [diff] [blame] | 460 | } |
| 461 | |
Arnold Schwaighofer | 30e62c0 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 462 | |
| 463 | let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in |
| 464 | def TCRETURNdi :Pseudo< (outs), |
| 465 | (ins calltarget:$dst, i32imm:$offset, variable_ops), |
| 466 | "#TC_RETURNd $dst $offset", |
| 467 | []>; |
| 468 | |
| 469 | |
| 470 | let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in |
| 471 | def TCRETURNai :Pseudo<(outs), (ins aaddr:$func, i32imm:$offset, variable_ops), |
| 472 | "#TC_RETURNa $func $offset", |
| 473 | [(PPCtc_return (i32 imm:$func), imm:$offset)]>; |
| 474 | |
| 475 | let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1 in |
| 476 | def TCRETURNri : Pseudo<(outs), (ins CTRRC:$dst, i32imm:$offset, variable_ops), |
| 477 | "#TC_RETURNr $dst $offset", |
| 478 | []>; |
| 479 | |
| 480 | |
| 481 | let isTerminator = 1, isBarrier = 1, PPC970_Unit = 7, isBranch = 1, |
| 482 | isIndirectBranch = 1, isCall = 1, isReturn = 1 in |
| 483 | def TAILBCTR : XLForm_2_ext<19, 528, 20, 0, 0, (outs), (ins), "bctr", BrB, []>, |
| 484 | Requires<[In32BitMode]>; |
| 485 | |
| 486 | |
| 487 | |
| 488 | let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7, |
| 489 | isBarrier = 1, isCall = 1, isReturn = 1 in |
| 490 | def TAILB : IForm<18, 0, 0, (outs), (ins calltarget:$dst), |
| 491 | "b $dst", BrB, |
| 492 | []>; |
| 493 | |
| 494 | |
| 495 | let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7, |
| 496 | isBarrier = 1, isCall = 1, isReturn = 1 in |
| 497 | def TAILBA : IForm<18, 0, 0, (outs), (ins aaddr:$dst), |
| 498 | "ba $dst", BrB, |
| 499 | []>; |
| 500 | |
| 501 | |
Chris Lattner | 001db45 | 2006-06-06 21:29:23 +0000 | [diff] [blame] | 502 | // DCB* instructions. |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 503 | def DCBA : DCB_Form<758, 0, (outs), (ins memrr:$dst), |
Chris Lattner | e90c537 | 2006-10-24 01:08:42 +0000 | [diff] [blame] | 504 | "dcba $dst", LdStDCBF, [(int_ppc_dcba xoaddr:$dst)]>, |
| 505 | PPC970_DGroup_Single; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 506 | def DCBF : DCB_Form<86, 0, (outs), (ins memrr:$dst), |
Chris Lattner | e90c537 | 2006-10-24 01:08:42 +0000 | [diff] [blame] | 507 | "dcbf $dst", LdStDCBF, [(int_ppc_dcbf xoaddr:$dst)]>, |
| 508 | PPC970_DGroup_Single; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 509 | def DCBI : DCB_Form<470, 0, (outs), (ins memrr:$dst), |
Chris Lattner | e90c537 | 2006-10-24 01:08:42 +0000 | [diff] [blame] | 510 | "dcbi $dst", LdStDCBF, [(int_ppc_dcbi xoaddr:$dst)]>, |
| 511 | PPC970_DGroup_Single; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 512 | def DCBST : DCB_Form<54, 0, (outs), (ins memrr:$dst), |
Chris Lattner | e90c537 | 2006-10-24 01:08:42 +0000 | [diff] [blame] | 513 | "dcbst $dst", LdStDCBF, [(int_ppc_dcbst xoaddr:$dst)]>, |
| 514 | PPC970_DGroup_Single; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 515 | def DCBT : DCB_Form<278, 0, (outs), (ins memrr:$dst), |
Chris Lattner | e90c537 | 2006-10-24 01:08:42 +0000 | [diff] [blame] | 516 | "dcbt $dst", LdStDCBF, [(int_ppc_dcbt xoaddr:$dst)]>, |
| 517 | PPC970_DGroup_Single; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 518 | def DCBTST : DCB_Form<246, 0, (outs), (ins memrr:$dst), |
Chris Lattner | e90c537 | 2006-10-24 01:08:42 +0000 | [diff] [blame] | 519 | "dcbtst $dst", LdStDCBF, [(int_ppc_dcbtst xoaddr:$dst)]>, |
| 520 | PPC970_DGroup_Single; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 521 | def DCBZ : DCB_Form<1014, 0, (outs), (ins memrr:$dst), |
Chris Lattner | e90c537 | 2006-10-24 01:08:42 +0000 | [diff] [blame] | 522 | "dcbz $dst", LdStDCBF, [(int_ppc_dcbz xoaddr:$dst)]>, |
| 523 | PPC970_DGroup_Single; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 524 | def DCBZL : DCB_Form<1014, 1, (outs), (ins memrr:$dst), |
Chris Lattner | e90c537 | 2006-10-24 01:08:42 +0000 | [diff] [blame] | 525 | "dcbzl $dst", LdStDCBF, [(int_ppc_dcbzl xoaddr:$dst)]>, |
| 526 | PPC970_DGroup_Single; |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 527 | |
Evan Cheng | 5330192 | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 528 | // Atomic operations |
| 529 | let usesCustomDAGSchedInserter = 1 in { |
| 530 | let Uses = [CR0] in { |
Dale Johannesen | 97efa36 | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 531 | def ATOMIC_LOAD_ADD_I8 : Pseudo< |
| 532 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 533 | "${:comment} ATOMIC_LOAD_ADD_I8 PSEUDO!", |
| 534 | [(set GPRC:$dst, (atomic_load_add_8 xoaddr:$ptr, GPRC:$incr))]>; |
| 535 | def ATOMIC_LOAD_SUB_I8 : Pseudo< |
| 536 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 537 | "${:comment} ATOMIC_LOAD_SUB_I8 PSEUDO!", |
| 538 | [(set GPRC:$dst, (atomic_load_sub_8 xoaddr:$ptr, GPRC:$incr))]>; |
| 539 | def ATOMIC_LOAD_AND_I8 : Pseudo< |
| 540 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 541 | "${:comment} ATOMIC_LOAD_AND_I8 PSEUDO!", |
| 542 | [(set GPRC:$dst, (atomic_load_and_8 xoaddr:$ptr, GPRC:$incr))]>; |
| 543 | def ATOMIC_LOAD_OR_I8 : Pseudo< |
| 544 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 545 | "${:comment} ATOMIC_LOAD_OR_I8 PSEUDO!", |
| 546 | [(set GPRC:$dst, (atomic_load_or_8 xoaddr:$ptr, GPRC:$incr))]>; |
| 547 | def ATOMIC_LOAD_XOR_I8 : Pseudo< |
| 548 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 549 | "${:comment} ATOMIC_LOAD_XOR_I8 PSEUDO!", |
| 550 | [(set GPRC:$dst, (atomic_load_xor_8 xoaddr:$ptr, GPRC:$incr))]>; |
| 551 | def ATOMIC_LOAD_NAND_I8 : Pseudo< |
| 552 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 553 | "${:comment} ATOMIC_LOAD_NAND_I8 PSEUDO!", |
| 554 | [(set GPRC:$dst, (atomic_load_nand_8 xoaddr:$ptr, GPRC:$incr))]>; |
| 555 | def ATOMIC_LOAD_ADD_I16 : Pseudo< |
| 556 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 557 | "${:comment} ATOMIC_LOAD_ADD_I16 PSEUDO!", |
| 558 | [(set GPRC:$dst, (atomic_load_add_16 xoaddr:$ptr, GPRC:$incr))]>; |
| 559 | def ATOMIC_LOAD_SUB_I16 : Pseudo< |
| 560 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 561 | "${:comment} ATOMIC_LOAD_SUB_I16 PSEUDO!", |
| 562 | [(set GPRC:$dst, (atomic_load_sub_16 xoaddr:$ptr, GPRC:$incr))]>; |
| 563 | def ATOMIC_LOAD_AND_I16 : Pseudo< |
| 564 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 565 | "${:comment} ATOMIC_LOAD_AND_I16 PSEUDO!", |
| 566 | [(set GPRC:$dst, (atomic_load_and_16 xoaddr:$ptr, GPRC:$incr))]>; |
| 567 | def ATOMIC_LOAD_OR_I16 : Pseudo< |
| 568 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 569 | "${:comment} ATOMIC_LOAD_OR_I16 PSEUDO!", |
| 570 | [(set GPRC:$dst, (atomic_load_or_16 xoaddr:$ptr, GPRC:$incr))]>; |
| 571 | def ATOMIC_LOAD_XOR_I16 : Pseudo< |
| 572 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 573 | "${:comment} ATOMIC_LOAD_XOR_I16 PSEUDO!", |
| 574 | [(set GPRC:$dst, (atomic_load_xor_16 xoaddr:$ptr, GPRC:$incr))]>; |
| 575 | def ATOMIC_LOAD_NAND_I16 : Pseudo< |
| 576 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 577 | "${:comment} ATOMIC_LOAD_NAND_I16 PSEUDO!", |
| 578 | [(set GPRC:$dst, (atomic_load_nand_16 xoaddr:$ptr, GPRC:$incr))]>; |
Evan Cheng | 5330192 | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 579 | def ATOMIC_LOAD_ADD_I32 : Pseudo< |
| 580 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 581 | "${:comment} ATOMIC_LOAD_ADD_I32 PSEUDO!", |
Dale Johannesen | 140a8bb | 2008-08-25 21:09:52 +0000 | [diff] [blame] | 582 | [(set GPRC:$dst, (atomic_load_add_32 xoaddr:$ptr, GPRC:$incr))]>; |
Dale Johannesen | bdab93a | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 583 | def ATOMIC_LOAD_SUB_I32 : Pseudo< |
| 584 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 585 | "${:comment} ATOMIC_LOAD_SUB_I32 PSEUDO!", |
| 586 | [(set GPRC:$dst, (atomic_load_sub_32 xoaddr:$ptr, GPRC:$incr))]>; |
| 587 | def ATOMIC_LOAD_AND_I32 : Pseudo< |
| 588 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 589 | "${:comment} ATOMIC_LOAD_AND_I32 PSEUDO!", |
| 590 | [(set GPRC:$dst, (atomic_load_and_32 xoaddr:$ptr, GPRC:$incr))]>; |
| 591 | def ATOMIC_LOAD_OR_I32 : Pseudo< |
| 592 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 593 | "${:comment} ATOMIC_LOAD_OR_I32 PSEUDO!", |
| 594 | [(set GPRC:$dst, (atomic_load_or_32 xoaddr:$ptr, GPRC:$incr))]>; |
| 595 | def ATOMIC_LOAD_XOR_I32 : Pseudo< |
| 596 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 597 | "${:comment} ATOMIC_LOAD_XOR_I32 PSEUDO!", |
| 598 | [(set GPRC:$dst, (atomic_load_xor_32 xoaddr:$ptr, GPRC:$incr))]>; |
| 599 | def ATOMIC_LOAD_NAND_I32 : Pseudo< |
| 600 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$incr), |
| 601 | "${:comment} ATOMIC_LOAD_NAND_I32 PSEUDO!", |
| 602 | [(set GPRC:$dst, (atomic_load_nand_32 xoaddr:$ptr, GPRC:$incr))]>; |
| 603 | |
Dale Johannesen | 97efa36 | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 604 | def ATOMIC_CMP_SWAP_I8 : Pseudo< |
| 605 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), |
| 606 | "${:comment} ATOMIC_CMP_SWAP_I8 PSEUDO!", |
| 607 | [(set GPRC:$dst, |
| 608 | (atomic_cmp_swap_8 xoaddr:$ptr, GPRC:$old, GPRC:$new))]>; |
| 609 | def ATOMIC_CMP_SWAP_I16 : Pseudo< |
| 610 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), |
| 611 | "${:comment} ATOMIC_CMP_SWAP_I16 PSEUDO!", |
| 612 | [(set GPRC:$dst, |
| 613 | (atomic_cmp_swap_16 xoaddr:$ptr, GPRC:$old, GPRC:$new))]>; |
Dale Johannesen | 5f0cfa2 | 2008-08-22 03:49:10 +0000 | [diff] [blame] | 614 | def ATOMIC_CMP_SWAP_I32 : Pseudo< |
| 615 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$old, GPRC:$new), |
| 616 | "${:comment} ATOMIC_CMP_SWAP_I32 PSEUDO!", |
| 617 | [(set GPRC:$dst, |
Dale Johannesen | 140a8bb | 2008-08-25 21:09:52 +0000 | [diff] [blame] | 618 | (atomic_cmp_swap_32 xoaddr:$ptr, GPRC:$old, GPRC:$new))]>; |
Dale Johannesen | bdab93a | 2008-08-25 22:34:37 +0000 | [diff] [blame] | 619 | |
Dale Johannesen | 97efa36 | 2008-08-28 17:53:09 +0000 | [diff] [blame] | 620 | def ATOMIC_SWAP_I8 : Pseudo< |
| 621 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), |
| 622 | "${:comment} ATOMIC_SWAP_I8 PSEUDO!", |
| 623 | [(set GPRC:$dst, (atomic_swap_8 xoaddr:$ptr, GPRC:$new))]>; |
| 624 | def ATOMIC_SWAP_I16 : Pseudo< |
| 625 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), |
| 626 | "${:comment} ATOMIC_SWAP_I16 PSEUDO!", |
| 627 | [(set GPRC:$dst, (atomic_swap_16 xoaddr:$ptr, GPRC:$new))]>; |
Dale Johannesen | 140a8bb | 2008-08-25 21:09:52 +0000 | [diff] [blame] | 628 | def ATOMIC_SWAP_I32 : Pseudo< |
| 629 | (outs GPRC:$dst), (ins memrr:$ptr, GPRC:$new), |
| 630 | "${:comment} ATOMIC_SWAP_I32 PSEUDO!", |
| 631 | [(set GPRC:$dst, (atomic_swap_32 xoaddr:$ptr, GPRC:$new))]>; |
Dale Johannesen | 5f0cfa2 | 2008-08-22 03:49:10 +0000 | [diff] [blame] | 632 | } |
Evan Cheng | 54fc97d | 2008-04-19 01:30:48 +0000 | [diff] [blame] | 633 | } |
| 634 | |
Evan Cheng | 5330192 | 2008-07-12 02:23:19 +0000 | [diff] [blame] | 635 | // Instructions to support atomic operations |
| 636 | def LWARX : XForm_1<31, 20, (outs GPRC:$rD), (ins memrr:$src), |
| 637 | "lwarx $rD, $src", LdStLWARX, |
| 638 | [(set GPRC:$rD, (PPClarx xoaddr:$src))]>; |
| 639 | |
| 640 | let Defs = [CR0] in |
| 641 | def STWCX : XForm_1<31, 150, (outs), (ins GPRC:$rS, memrr:$dst), |
| 642 | "stwcx. $rS, $dst", LdStSTWCX, |
| 643 | [(PPCstcx GPRC:$rS, xoaddr:$dst)]>, |
| 644 | isDOT; |
| 645 | |
Nate Begeman | 1db3c92 | 2008-08-11 17:36:31 +0000 | [diff] [blame] | 646 | let isBarrier = 1, hasCtrlDep = 1 in |
| 647 | def TRAP : XForm_24<31, 4, (outs), (ins), "trap", LdStGeneral, [(trap)]>; |
| 648 | |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 649 | //===----------------------------------------------------------------------===// |
| 650 | // PPC32 Load Instructions. |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 651 | // |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 652 | |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 653 | // Unindexed (r+i) Loads. |
Chris Lattner | 834f1ce | 2008-01-06 23:38:27 +0000 | [diff] [blame] | 654 | let isSimpleLoad = 1, PPC970_Unit = 2 in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 655 | def LBZ : DForm_1<34, (outs GPRC:$rD), (ins memri:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 656 | "lbz $rD, $src", LdStGeneral, |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 657 | [(set GPRC:$rD, (zextloadi8 iaddr:$src))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 658 | def LHA : DForm_1<42, (outs GPRC:$rD), (ins memri:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 659 | "lha $rD, $src", LdStLHA, |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 660 | [(set GPRC:$rD, (sextloadi16 iaddr:$src))]>, |
Chris Lattner | fd97734 | 2006-03-13 05:15:10 +0000 | [diff] [blame] | 661 | PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 662 | def LHZ : DForm_1<40, (outs GPRC:$rD), (ins memri:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 663 | "lhz $rD, $src", LdStGeneral, |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 664 | [(set GPRC:$rD, (zextloadi16 iaddr:$src))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 665 | def LWZ : DForm_1<32, (outs GPRC:$rD), (ins memri:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 666 | "lwz $rD, $src", LdStGeneral, |
| 667 | [(set GPRC:$rD, (load iaddr:$src))]>; |
Chris Lattner | 302bf9c | 2006-11-08 02:13:12 +0000 | [diff] [blame] | 668 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 669 | def LFS : DForm_1<48, (outs F4RC:$rD), (ins memri:$src), |
Chris Lattner | 4eab714 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 670 | "lfs $rD, $src", LdStLFDU, |
| 671 | [(set F4RC:$rD, (load iaddr:$src))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 672 | def LFD : DForm_1<50, (outs F8RC:$rD), (ins memri:$src), |
Chris Lattner | 4eab714 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 673 | "lfd $rD, $src", LdStLFD, |
| 674 | [(set F8RC:$rD, (load iaddr:$src))]>; |
| 675 | |
Chris Lattner | 4eab714 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 676 | |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 677 | // Unindexed (r+i) Loads with Update (preinc). |
Evan Cheng | caf778a | 2007-08-01 23:07:38 +0000 | [diff] [blame] | 678 | def LBZU : DForm_1<35, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr), |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 679 | "lbzu $rD, $addr", LdStGeneral, |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 680 | []>, RegConstraint<"$addr.reg = $ea_result">, |
| 681 | NoEncode<"$ea_result">; |
Chris Lattner | 4eab714 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 682 | |
Evan Cheng | caf778a | 2007-08-01 23:07:38 +0000 | [diff] [blame] | 683 | def LHAU : DForm_1<43, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr), |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 684 | "lhau $rD, $addr", LdStGeneral, |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 685 | []>, RegConstraint<"$addr.reg = $ea_result">, |
| 686 | NoEncode<"$ea_result">; |
Chris Lattner | 4eab714 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 687 | |
Evan Cheng | caf778a | 2007-08-01 23:07:38 +0000 | [diff] [blame] | 688 | def LHZU : DForm_1<41, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr), |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 689 | "lhzu $rD, $addr", LdStGeneral, |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 690 | []>, RegConstraint<"$addr.reg = $ea_result">, |
| 691 | NoEncode<"$ea_result">; |
Chris Lattner | 4eab714 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 692 | |
Evan Cheng | caf778a | 2007-08-01 23:07:38 +0000 | [diff] [blame] | 693 | def LWZU : DForm_1<33, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr), |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 694 | "lwzu $rD, $addr", LdStGeneral, |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 695 | []>, RegConstraint<"$addr.reg = $ea_result">, |
| 696 | NoEncode<"$ea_result">; |
Chris Lattner | 4eab714 | 2006-11-10 02:08:47 +0000 | [diff] [blame] | 697 | |
Evan Cheng | caf778a | 2007-08-01 23:07:38 +0000 | [diff] [blame] | 698 | def LFSU : DForm_1<49, (outs F4RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 699 | "lfs $rD, $addr", LdStLFDU, |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 700 | []>, RegConstraint<"$addr.reg = $ea_result">, |
| 701 | NoEncode<"$ea_result">; |
| 702 | |
Evan Cheng | caf778a | 2007-08-01 23:07:38 +0000 | [diff] [blame] | 703 | def LFDU : DForm_1<51, (outs F8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr), |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 704 | "lfd $rD, $addr", LdStLFD, |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 705 | []>, RegConstraint<"$addr.reg = $ea_result">, |
| 706 | NoEncode<"$ea_result">; |
Nate Begeman | b816f02 | 2004-10-07 22:30:03 +0000 | [diff] [blame] | 707 | } |
Chris Lattner | 302bf9c | 2006-11-08 02:13:12 +0000 | [diff] [blame] | 708 | |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 709 | // Indexed (r+r) Loads. |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 710 | // |
Chris Lattner | 834f1ce | 2008-01-06 23:38:27 +0000 | [diff] [blame] | 711 | let isSimpleLoad = 1, PPC970_Unit = 2 in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 712 | def LBZX : XForm_1<31, 87, (outs GPRC:$rD), (ins memrr:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 713 | "lbzx $rD, $src", LdStGeneral, |
| 714 | [(set GPRC:$rD, (zextloadi8 xaddr:$src))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 715 | def LHAX : XForm_1<31, 343, (outs GPRC:$rD), (ins memrr:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 716 | "lhax $rD, $src", LdStLHA, |
| 717 | [(set GPRC:$rD, (sextloadi16 xaddr:$src))]>, |
| 718 | PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 719 | def LHZX : XForm_1<31, 279, (outs GPRC:$rD), (ins memrr:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 720 | "lhzx $rD, $src", LdStGeneral, |
| 721 | [(set GPRC:$rD, (zextloadi16 xaddr:$src))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 722 | def LWZX : XForm_1<31, 23, (outs GPRC:$rD), (ins memrr:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 723 | "lwzx $rD, $src", LdStGeneral, |
| 724 | [(set GPRC:$rD, (load xaddr:$src))]>; |
| 725 | |
| 726 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 727 | def LHBRX : XForm_1<31, 790, (outs GPRC:$rD), (ins memrr:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 728 | "lhbrx $rD, $src", LdStGeneral, |
| 729 | [(set GPRC:$rD, (PPClbrx xoaddr:$src, srcvalue:$sv, i16))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 730 | def LWBRX : XForm_1<31, 534, (outs GPRC:$rD), (ins memrr:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 731 | "lwbrx $rD, $src", LdStGeneral, |
| 732 | [(set GPRC:$rD, (PPClbrx xoaddr:$src, srcvalue:$sv, i32))]>; |
| 733 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 734 | def LFSX : XForm_25<31, 535, (outs F4RC:$frD), (ins memrr:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 735 | "lfsx $frD, $src", LdStLFDU, |
| 736 | [(set F4RC:$frD, (load xaddr:$src))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 737 | def LFDX : XForm_25<31, 599, (outs F8RC:$frD), (ins memrr:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 738 | "lfdx $frD, $src", LdStLFDU, |
| 739 | [(set F8RC:$frD, (load xaddr:$src))]>; |
| 740 | } |
| 741 | |
| 742 | //===----------------------------------------------------------------------===// |
| 743 | // PPC32 Store Instructions. |
| 744 | // |
| 745 | |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 746 | // Unindexed (r+i) Stores. |
Chris Lattner | 9c9fbf8 | 2008-01-06 05:53:26 +0000 | [diff] [blame] | 747 | let PPC970_Unit = 2 in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 748 | def STB : DForm_1<38, (outs), (ins GPRC:$rS, memri:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 749 | "stb $rS, $src", LdStGeneral, |
| 750 | [(truncstorei8 GPRC:$rS, iaddr:$src)]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 751 | def STH : DForm_1<44, (outs), (ins GPRC:$rS, memri:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 752 | "sth $rS, $src", LdStGeneral, |
| 753 | [(truncstorei16 GPRC:$rS, iaddr:$src)]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 754 | def STW : DForm_1<36, (outs), (ins GPRC:$rS, memri:$src), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 755 | "stw $rS, $src", LdStGeneral, |
| 756 | [(store GPRC:$rS, iaddr:$src)]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 757 | def STFS : DForm_1<52, (outs), (ins F4RC:$rS, memri:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 758 | "stfs $rS, $dst", LdStUX, |
| 759 | [(store F4RC:$rS, iaddr:$dst)]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 760 | def STFD : DForm_1<54, (outs), (ins F8RC:$rS, memri:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 761 | "stfd $rS, $dst", LdStUX, |
| 762 | [(store F8RC:$rS, iaddr:$dst)]>; |
| 763 | } |
| 764 | |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 765 | // Unindexed (r+i) Stores with Update (preinc). |
Chris Lattner | 9c9fbf8 | 2008-01-06 05:53:26 +0000 | [diff] [blame] | 766 | let PPC970_Unit = 2 in { |
Evan Cheng | d5f181a | 2007-07-20 00:20:46 +0000 | [diff] [blame] | 767 | def STBU : DForm_1<39, (outs ptr_rc:$ea_res), (ins GPRC:$rS, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 768 | symbolLo:$ptroff, ptr_rc:$ptrreg), |
| 769 | "stbu $rS, $ptroff($ptrreg)", LdStGeneral, |
Chris Lattner | 74531e4 | 2006-11-16 00:41:37 +0000 | [diff] [blame] | 770 | [(set ptr_rc:$ea_res, |
| 771 | (pre_truncsti8 GPRC:$rS, ptr_rc:$ptrreg, |
| 772 | iaddroff:$ptroff))]>, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 773 | RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; |
Evan Cheng | d5f181a | 2007-07-20 00:20:46 +0000 | [diff] [blame] | 774 | def STHU : DForm_1<45, (outs ptr_rc:$ea_res), (ins GPRC:$rS, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 775 | symbolLo:$ptroff, ptr_rc:$ptrreg), |
| 776 | "sthu $rS, $ptroff($ptrreg)", LdStGeneral, |
Chris Lattner | 74531e4 | 2006-11-16 00:41:37 +0000 | [diff] [blame] | 777 | [(set ptr_rc:$ea_res, |
| 778 | (pre_truncsti16 GPRC:$rS, ptr_rc:$ptrreg, |
| 779 | iaddroff:$ptroff))]>, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 780 | RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; |
Evan Cheng | d5f181a | 2007-07-20 00:20:46 +0000 | [diff] [blame] | 781 | def STWU : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 782 | symbolLo:$ptroff, ptr_rc:$ptrreg), |
| 783 | "stwu $rS, $ptroff($ptrreg)", LdStGeneral, |
Chris Lattner | 74531e4 | 2006-11-16 00:41:37 +0000 | [diff] [blame] | 784 | [(set ptr_rc:$ea_res, (pre_store GPRC:$rS, ptr_rc:$ptrreg, |
| 785 | iaddroff:$ptroff))]>, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 786 | RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; |
Evan Cheng | d5f181a | 2007-07-20 00:20:46 +0000 | [diff] [blame] | 787 | def STFSU : DForm_1<37, (outs ptr_rc:$ea_res), (ins F4RC:$rS, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 788 | symbolLo:$ptroff, ptr_rc:$ptrreg), |
| 789 | "stfsu $rS, $ptroff($ptrreg)", LdStGeneral, |
Chris Lattner | 74531e4 | 2006-11-16 00:41:37 +0000 | [diff] [blame] | 790 | [(set ptr_rc:$ea_res, (pre_store F4RC:$rS, ptr_rc:$ptrreg, |
| 791 | iaddroff:$ptroff))]>, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 792 | RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; |
Evan Cheng | d5f181a | 2007-07-20 00:20:46 +0000 | [diff] [blame] | 793 | def STFDU : DForm_1<37, (outs ptr_rc:$ea_res), (ins F8RC:$rS, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 794 | symbolLo:$ptroff, ptr_rc:$ptrreg), |
| 795 | "stfdu $rS, $ptroff($ptrreg)", LdStGeneral, |
Chris Lattner | 74531e4 | 2006-11-16 00:41:37 +0000 | [diff] [blame] | 796 | [(set ptr_rc:$ea_res, (pre_store F8RC:$rS, ptr_rc:$ptrreg, |
| 797 | iaddroff:$ptroff))]>, |
Chris Lattner | ef20fef | 2006-11-16 00:33:34 +0000 | [diff] [blame] | 798 | RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; |
Chris Lattner | f8e07f4 | 2006-11-15 02:43:19 +0000 | [diff] [blame] | 799 | } |
| 800 | |
| 801 | |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 802 | // Indexed (r+r) Stores. |
| 803 | // |
Chris Lattner | 9c9fbf8 | 2008-01-06 05:53:26 +0000 | [diff] [blame] | 804 | let PPC970_Unit = 2 in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 805 | def STBX : XForm_8<31, 215, (outs), (ins GPRC:$rS, memrr:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 806 | "stbx $rS, $dst", LdStGeneral, |
| 807 | [(truncstorei8 GPRC:$rS, xaddr:$dst)]>, |
| 808 | PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 809 | def STHX : XForm_8<31, 407, (outs), (ins GPRC:$rS, memrr:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 810 | "sthx $rS, $dst", LdStGeneral, |
| 811 | [(truncstorei16 GPRC:$rS, xaddr:$dst)]>, |
| 812 | PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 813 | def STWX : XForm_8<31, 151, (outs), (ins GPRC:$rS, memrr:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 814 | "stwx $rS, $dst", LdStGeneral, |
| 815 | [(store GPRC:$rS, xaddr:$dst)]>, |
| 816 | PPC970_DGroup_Cracked; |
Chris Lattner | 9c9fbf8 | 2008-01-06 05:53:26 +0000 | [diff] [blame] | 817 | |
Chris Lattner | 2e48a70 | 2008-01-06 08:36:04 +0000 | [diff] [blame] | 818 | let mayStore = 1 in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 819 | def STWUX : XForm_8<31, 183, (outs), (ins GPRC:$rS, GPRC:$rA, GPRC:$rB), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 820 | "stwux $rS, $rA, $rB", LdStGeneral, |
| 821 | []>; |
Chris Lattner | c8478d8 | 2008-01-06 06:44:58 +0000 | [diff] [blame] | 822 | } |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 823 | def STHBRX: XForm_8<31, 918, (outs), (ins GPRC:$rS, memrr:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 824 | "sthbrx $rS, $dst", LdStGeneral, |
| 825 | [(PPCstbrx GPRC:$rS, xoaddr:$dst, srcvalue:$dummy, i16)]>, |
| 826 | PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 827 | def STWBRX: XForm_8<31, 662, (outs), (ins GPRC:$rS, memrr:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 828 | "stwbrx $rS, $dst", LdStGeneral, |
| 829 | [(PPCstbrx GPRC:$rS, xoaddr:$dst, srcvalue:$dummy, i32)]>, |
| 830 | PPC970_DGroup_Cracked; |
| 831 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 832 | def STFIWX: XForm_28<31, 983, (outs), (ins F8RC:$frS, memrr:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 833 | "stfiwx $frS, $dst", LdStUX, |
| 834 | [(PPCstfiwx F8RC:$frS, xoaddr:$dst)]>; |
Chris Lattner | c8478d8 | 2008-01-06 06:44:58 +0000 | [diff] [blame] | 835 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 836 | def STFSX : XForm_28<31, 663, (outs), (ins F4RC:$frS, memrr:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 837 | "stfsx $frS, $dst", LdStUX, |
| 838 | [(store F4RC:$frS, xaddr:$dst)]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 839 | def STFDX : XForm_28<31, 727, (outs), (ins F8RC:$frS, memrr:$dst), |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 840 | "stfdx $frS, $dst", LdStUX, |
| 841 | [(store F8RC:$frS, xaddr:$dst)]>; |
| 842 | } |
| 843 | |
Dale Johannesen | f87d6c0 | 2008-08-22 17:20:54 +0000 | [diff] [blame] | 844 | let isBarrier = 1 in |
| 845 | def SYNC : XForm_24_sync<31, 598, (outs), (ins), |
| 846 | "sync", LdStSync, |
| 847 | [(int_ppc_sync)]>; |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 848 | |
| 849 | //===----------------------------------------------------------------------===// |
| 850 | // PPC32 Arithmetic Instructions. |
| 851 | // |
Chris Lattner | 302bf9c | 2006-11-08 02:13:12 +0000 | [diff] [blame] | 852 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 853 | let PPC970_Unit = 1 in { // FXU Operations. |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 854 | def ADDI : DForm_2<14, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 855 | "addi $rD, $rA, $imm", IntGeneral, |
Chris Lattner | 3e63ead | 2005-09-08 17:33:10 +0000 | [diff] [blame] | 856 | [(set GPRC:$rD, (add GPRC:$rA, immSExt16:$imm))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 857 | def ADDIC : DForm_2<12, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 858 | "addic $rD, $rA, $imm", IntGeneral, |
Chris Lattner | fd97734 | 2006-03-13 05:15:10 +0000 | [diff] [blame] | 859 | [(set GPRC:$rD, (addc GPRC:$rA, immSExt16:$imm))]>, |
| 860 | PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 861 | def ADDICo : DForm_2<13, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 862 | "addic. $rD, $rA, $imm", IntGeneral, |
Chris Lattner | 3e63ead | 2005-09-08 17:33:10 +0000 | [diff] [blame] | 863 | []>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 864 | def ADDIS : DForm_2<15, (outs GPRC:$rD), (ins GPRC:$rA, symbolHi:$imm), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 865 | "addis $rD, $rA, $imm", IntGeneral, |
Chris Lattner | 0ea70b2 | 2006-06-20 22:34:10 +0000 | [diff] [blame] | 866 | [(set GPRC:$rD, (add GPRC:$rA, imm16ShiftedSExt:$imm))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 867 | def LA : DForm_2<14, (outs GPRC:$rD), (ins GPRC:$rA, symbolLo:$sym), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 868 | "la $rD, $sym($rA)", IntGeneral, |
Chris Lattner | 490ad08 | 2005-11-17 17:52:01 +0000 | [diff] [blame] | 869 | [(set GPRC:$rD, (add GPRC:$rA, |
| 870 | (PPClo tglobaladdr:$sym, 0)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 871 | def MULLI : DForm_2< 7, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 872 | "mulli $rD, $rA, $imm", IntMulLI, |
Chris Lattner | 3e63ead | 2005-09-08 17:33:10 +0000 | [diff] [blame] | 873 | [(set GPRC:$rD, (mul GPRC:$rA, immSExt16:$imm))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 874 | def SUBFIC : DForm_2< 8, (outs GPRC:$rD), (ins GPRC:$rA, s16imm:$imm), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 875 | "subfic $rD, $rA, $imm", IntGeneral, |
Nate Begeman | 79691bc | 2006-03-17 22:41:37 +0000 | [diff] [blame] | 876 | [(set GPRC:$rD, (subc immSExt16:$imm, GPRC:$rA))]>; |
Bill Wendling | 0f940c9 | 2007-12-07 21:42:31 +0000 | [diff] [blame] | 877 | |
Chris Lattner | dd41527 | 2008-01-10 05:45:39 +0000 | [diff] [blame] | 878 | let isReMaterializable = 1 in { |
Bill Wendling | 0f940c9 | 2007-12-07 21:42:31 +0000 | [diff] [blame] | 879 | def LI : DForm_2_r0<14, (outs GPRC:$rD), (ins symbolLo:$imm), |
| 880 | "li $rD, $imm", IntGeneral, |
| 881 | [(set GPRC:$rD, immSExt16:$imm)]>; |
| 882 | def LIS : DForm_2_r0<15, (outs GPRC:$rD), (ins symbolHi:$imm), |
| 883 | "lis $rD, $imm", IntGeneral, |
| 884 | [(set GPRC:$rD, imm16ShiftedSExt:$imm)]>; |
| 885 | } |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 886 | } |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 887 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 888 | let PPC970_Unit = 1 in { // FXU Operations. |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 889 | def ANDIo : DForm_4<28, (outs GPRC:$dst), (ins GPRC:$src1, u16imm:$src2), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 890 | "andi. $dst, $src1, $src2", IntGeneral, |
Nate Begeman | 789fd42 | 2006-02-12 09:09:52 +0000 | [diff] [blame] | 891 | [(set GPRC:$dst, (and GPRC:$src1, immZExt16:$src2))]>, |
| 892 | isDOT; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 893 | def ANDISo : DForm_4<29, (outs GPRC:$dst), (ins GPRC:$src1, u16imm:$src2), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 894 | "andis. $dst, $src1, $src2", IntGeneral, |
Chris Lattner | 0ea70b2 | 2006-06-20 22:34:10 +0000 | [diff] [blame] | 895 | [(set GPRC:$dst, (and GPRC:$src1,imm16ShiftedZExt:$src2))]>, |
Nate Begeman | 789fd42 | 2006-02-12 09:09:52 +0000 | [diff] [blame] | 896 | isDOT; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 897 | def ORI : DForm_4<24, (outs GPRC:$dst), (ins GPRC:$src1, u16imm:$src2), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 898 | "ori $dst, $src1, $src2", IntGeneral, |
Chris Lattner | c36d065 | 2005-09-14 18:18:39 +0000 | [diff] [blame] | 899 | [(set GPRC:$dst, (or GPRC:$src1, immZExt16:$src2))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 900 | def ORIS : DForm_4<25, (outs GPRC:$dst), (ins GPRC:$src1, u16imm:$src2), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 901 | "oris $dst, $src1, $src2", IntGeneral, |
Chris Lattner | 0ea70b2 | 2006-06-20 22:34:10 +0000 | [diff] [blame] | 902 | [(set GPRC:$dst, (or GPRC:$src1, imm16ShiftedZExt:$src2))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 903 | def XORI : DForm_4<26, (outs GPRC:$dst), (ins GPRC:$src1, u16imm:$src2), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 904 | "xori $dst, $src1, $src2", IntGeneral, |
Chris Lattner | c36d065 | 2005-09-14 18:18:39 +0000 | [diff] [blame] | 905 | [(set GPRC:$dst, (xor GPRC:$src1, immZExt16:$src2))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 906 | def XORIS : DForm_4<27, (outs GPRC:$dst), (ins GPRC:$src1, u16imm:$src2), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 907 | "xoris $dst, $src1, $src2", IntGeneral, |
Chris Lattner | 0ea70b2 | 2006-06-20 22:34:10 +0000 | [diff] [blame] | 908 | [(set GPRC:$dst, (xor GPRC:$src1,imm16ShiftedZExt:$src2))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 909 | def NOP : DForm_4_zero<24, (outs), (ins), "nop", IntGeneral, |
Nate Begeman | 0976122 | 2005-12-09 23:54:18 +0000 | [diff] [blame] | 910 | []>; |
Evan Cheng | caf778a | 2007-08-01 23:07:38 +0000 | [diff] [blame] | 911 | def CMPWI : DForm_5_ext<11, (outs CRRC:$crD), (ins GPRC:$rA, s16imm:$imm), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 912 | "cmpwi $crD, $rA, $imm", IntCompare>; |
Evan Cheng | caf778a | 2007-08-01 23:07:38 +0000 | [diff] [blame] | 913 | def CMPLWI : DForm_6_ext<10, (outs CRRC:$dst), (ins GPRC:$src1, u16imm:$src2), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 914 | "cmplwi $dst, $src1, $src2", IntCompare>; |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 915 | } |
Nate Begeman | ed42853 | 2004-09-04 05:00:00 +0000 | [diff] [blame] | 916 | |
Chris Lattner | b22a04d | 2006-03-25 07:51:43 +0000 | [diff] [blame] | 917 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 918 | let PPC970_Unit = 1 in { // FXU Operations. |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 919 | def NAND : XForm_6<31, 476, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 920 | "nand $rA, $rS, $rB", IntGeneral, |
Chris Lattner | 7cd09cf | 2005-09-03 00:21:51 +0000 | [diff] [blame] | 921 | [(set GPRC:$rA, (not (and GPRC:$rS, GPRC:$rB)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 922 | def AND : XForm_6<31, 28, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 923 | "and $rA, $rS, $rB", IntGeneral, |
Chris Lattner | c36d065 | 2005-09-14 18:18:39 +0000 | [diff] [blame] | 924 | [(set GPRC:$rA, (and GPRC:$rS, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 925 | def ANDC : XForm_6<31, 60, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 926 | "andc $rA, $rS, $rB", IntGeneral, |
Chris Lattner | 7cd09cf | 2005-09-03 00:21:51 +0000 | [diff] [blame] | 927 | [(set GPRC:$rA, (and GPRC:$rS, (not GPRC:$rB)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 928 | def OR : XForm_6<31, 444, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 929 | "or $rA, $rS, $rB", IntGeneral, |
Chris Lattner | c36d065 | 2005-09-14 18:18:39 +0000 | [diff] [blame] | 930 | [(set GPRC:$rA, (or GPRC:$rS, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 931 | def NOR : XForm_6<31, 124, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 932 | "nor $rA, $rS, $rB", IntGeneral, |
Chris Lattner | 7cd09cf | 2005-09-03 00:21:51 +0000 | [diff] [blame] | 933 | [(set GPRC:$rA, (not (or GPRC:$rS, GPRC:$rB)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 934 | def ORC : XForm_6<31, 412, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 935 | "orc $rA, $rS, $rB", IntGeneral, |
Chris Lattner | 7cd09cf | 2005-09-03 00:21:51 +0000 | [diff] [blame] | 936 | [(set GPRC:$rA, (or GPRC:$rS, (not GPRC:$rB)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 937 | def EQV : XForm_6<31, 284, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 938 | "eqv $rA, $rS, $rB", IntGeneral, |
Chris Lattner | c36d065 | 2005-09-14 18:18:39 +0000 | [diff] [blame] | 939 | [(set GPRC:$rA, (not (xor GPRC:$rS, GPRC:$rB)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 940 | def XOR : XForm_6<31, 316, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 941 | "xor $rA, $rS, $rB", IntGeneral, |
Chris Lattner | 4e85e64 | 2006-06-20 00:39:56 +0000 | [diff] [blame] | 942 | [(set GPRC:$rA, (xor GPRC:$rS, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 943 | def SLW : XForm_6<31, 24, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 944 | "slw $rA, $rS, $rB", IntGeneral, |
Chris Lattner | 4172b10 | 2005-12-06 02:10:38 +0000 | [diff] [blame] | 945 | [(set GPRC:$rA, (PPCshl GPRC:$rS, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 946 | def SRW : XForm_6<31, 536, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 947 | "srw $rA, $rS, $rB", IntGeneral, |
Chris Lattner | 4172b10 | 2005-12-06 02:10:38 +0000 | [diff] [blame] | 948 | [(set GPRC:$rA, (PPCsrl GPRC:$rS, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 949 | def SRAW : XForm_6<31, 792, (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 950 | "sraw $rA, $rS, $rB", IntShift, |
Chris Lattner | 4172b10 | 2005-12-06 02:10:38 +0000 | [diff] [blame] | 951 | [(set GPRC:$rA, (PPCsra GPRC:$rS, GPRC:$rB))]>; |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 952 | } |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 953 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 954 | let PPC970_Unit = 1 in { // FXU Operations. |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 955 | def SRAWI : XForm_10<31, 824, (outs GPRC:$rA), (ins GPRC:$rS, u5imm:$SH), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 956 | "srawi $rA, $rS, $SH", IntShift, |
Chris Lattner | bd05982 | 2005-12-05 02:34:05 +0000 | [diff] [blame] | 957 | [(set GPRC:$rA, (sra GPRC:$rS, (i32 imm:$SH)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 958 | def CNTLZW : XForm_11<31, 26, (outs GPRC:$rA), (ins GPRC:$rS), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 959 | "cntlzw $rA, $rS", IntGeneral, |
Chris Lattner | 6159fb2 | 2005-09-02 22:35:53 +0000 | [diff] [blame] | 960 | [(set GPRC:$rA, (ctlz GPRC:$rS))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 961 | def EXTSB : XForm_11<31, 954, (outs GPRC:$rA), (ins GPRC:$rS), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 962 | "extsb $rA, $rS", IntGeneral, |
Chris Lattner | 6159fb2 | 2005-09-02 22:35:53 +0000 | [diff] [blame] | 963 | [(set GPRC:$rA, (sext_inreg GPRC:$rS, i8))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 964 | def EXTSH : XForm_11<31, 922, (outs GPRC:$rA), (ins GPRC:$rS), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 965 | "extsh $rA, $rS", IntGeneral, |
Chris Lattner | 6159fb2 | 2005-09-02 22:35:53 +0000 | [diff] [blame] | 966 | [(set GPRC:$rA, (sext_inreg GPRC:$rS, i16))]>; |
Chris Lattner | ecfe55e | 2006-03-22 05:30:33 +0000 | [diff] [blame] | 967 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 968 | def CMPW : XForm_16_ext<31, 0, (outs CRRC:$crD), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 969 | "cmpw $crD, $rA, $rB", IntCompare>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 970 | def CMPLW : XForm_16_ext<31, 32, (outs CRRC:$crD), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 971 | "cmplw $crD, $rA, $rB", IntCompare>; |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 972 | } |
| 973 | let PPC970_Unit = 3 in { // FPU Operations. |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 974 | //def FCMPO : XForm_17<63, 32, (outs CRRC:$crD), (ins FPRC:$fA, FPRC:$fB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 975 | // "fcmpo $crD, $fA, $fB", FPCompare>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 976 | def FCMPUS : XForm_17<63, 0, (outs CRRC:$crD), (ins F4RC:$fA, F4RC:$fB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 977 | "fcmpu $crD, $fA, $fB", FPCompare>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 978 | def FCMPUD : XForm_17<63, 0, (outs CRRC:$crD), (ins F8RC:$fA, F8RC:$fB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 979 | "fcmpu $crD, $fA, $fB", FPCompare>; |
Chris Lattner | 26e552b | 2006-11-14 19:19:53 +0000 | [diff] [blame] | 980 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 981 | def FCTIWZ : XForm_26<63, 15, (outs F8RC:$frD), (ins F8RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 982 | "fctiwz $frD, $frB", FPGeneral, |
Chris Lattner | e6115b3 | 2005-10-25 20:41:46 +0000 | [diff] [blame] | 983 | [(set F8RC:$frD, (PPCfctiwz F8RC:$frB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 984 | def FRSP : XForm_26<63, 12, (outs F4RC:$frD), (ins F8RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 985 | "frsp $frD, $frB", FPGeneral, |
Chris Lattner | 7cb6491 | 2005-10-14 04:55:50 +0000 | [diff] [blame] | 986 | [(set F4RC:$frD, (fround F8RC:$frB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 987 | def FSQRT : XForm_26<63, 22, (outs F8RC:$frD), (ins F8RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 988 | "fsqrt $frD, $frB", FPSqrt, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 989 | [(set F8RC:$frD, (fsqrt F8RC:$frB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 990 | def FSQRTS : XForm_26<59, 22, (outs F4RC:$frD), (ins F4RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 991 | "fsqrts $frD, $frB", FPSqrt, |
Chris Lattner | e0b2e63 | 2005-10-15 21:44:15 +0000 | [diff] [blame] | 992 | [(set F4RC:$frD, (fsqrt F4RC:$frB))]>; |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 993 | } |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 994 | |
| 995 | /// FMR is split into 3 versions, one for 4/8 byte FP, and one for extending. |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 996 | /// |
| 997 | /// Note that these are defined as pseudo-ops on the PPC970 because they are |
Chris Lattner | 9d5da1d | 2006-03-24 07:12:19 +0000 | [diff] [blame] | 998 | /// often coalesced away and we don't want the dispatch group builder to think |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 999 | /// that they will fill slots (which could cause the load of a LSU reject to |
| 1000 | /// sneak into a d-group with a store). |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1001 | def FMRS : XForm_26<63, 72, (outs F4RC:$frD), (ins F4RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1002 | "fmr $frD, $frB", FPGeneral, |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1003 | []>, // (set F4RC:$frD, F4RC:$frB) |
| 1004 | PPC970_Unit_Pseudo; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1005 | def FMRD : XForm_26<63, 72, (outs F8RC:$frD), (ins F8RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1006 | "fmr $frD, $frB", FPGeneral, |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1007 | []>, // (set F8RC:$frD, F8RC:$frB) |
| 1008 | PPC970_Unit_Pseudo; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1009 | def FMRSD : XForm_26<63, 72, (outs F8RC:$frD), (ins F4RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1010 | "fmr $frD, $frB", FPGeneral, |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1011 | [(set F8RC:$frD, (fextend F4RC:$frB))]>, |
| 1012 | PPC970_Unit_Pseudo; |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1013 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1014 | let PPC970_Unit = 3 in { // FPU Operations. |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1015 | // These are artificially split into two different forms, for 4/8 byte FP. |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1016 | def FABSS : XForm_26<63, 264, (outs F4RC:$frD), (ins F4RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1017 | "fabs $frD, $frB", FPGeneral, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1018 | [(set F4RC:$frD, (fabs F4RC:$frB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1019 | def FABSD : XForm_26<63, 264, (outs F8RC:$frD), (ins F8RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1020 | "fabs $frD, $frB", FPGeneral, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1021 | [(set F8RC:$frD, (fabs F8RC:$frB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1022 | def FNABSS : XForm_26<63, 136, (outs F4RC:$frD), (ins F4RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1023 | "fnabs $frD, $frB", FPGeneral, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1024 | [(set F4RC:$frD, (fneg (fabs F4RC:$frB)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1025 | def FNABSD : XForm_26<63, 136, (outs F8RC:$frD), (ins F8RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1026 | "fnabs $frD, $frB", FPGeneral, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1027 | [(set F8RC:$frD, (fneg (fabs F8RC:$frB)))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1028 | def FNEGS : XForm_26<63, 40, (outs F4RC:$frD), (ins F4RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1029 | "fneg $frD, $frB", FPGeneral, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1030 | [(set F4RC:$frD, (fneg F4RC:$frB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1031 | def FNEGD : XForm_26<63, 40, (outs F8RC:$frD), (ins F8RC:$frB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1032 | "fneg $frD, $frB", FPGeneral, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1033 | [(set F8RC:$frD, (fneg F8RC:$frB))]>; |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1034 | } |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1035 | |
Nate Begeman | 6b3dc55 | 2004-08-29 22:45:13 +0000 | [diff] [blame] | 1036 | |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 1037 | // XL-Form instructions. condition register logical ops. |
| 1038 | // |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1039 | def MCRF : XLForm_3<19, 0, (outs CRRC:$BF), (ins CRRC:$BFA), |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1040 | "mcrf $BF, $BFA", BrMCR>, |
| 1041 | PPC970_DGroup_First, PPC970_Unit_CRU; |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 1042 | |
Nicolas Geoffray | 0404cd9 | 2008-03-10 14:12:10 +0000 | [diff] [blame] | 1043 | def CREQV : XLForm_1<19, 289, (outs CRBITRC:$CRD), |
| 1044 | (ins CRBITRC:$CRA, CRBITRC:$CRB), |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 1045 | "creqv $CRD, $CRA, $CRB", BrCR, |
| 1046 | []>; |
| 1047 | |
Nicolas Geoffray | 0404cd9 | 2008-03-10 14:12:10 +0000 | [diff] [blame] | 1048 | def CROR : XLForm_1<19, 449, (outs CRBITRC:$CRD), |
| 1049 | (ins CRBITRC:$CRA, CRBITRC:$CRB), |
| 1050 | "cror $CRD, $CRA, $CRB", BrCR, |
| 1051 | []>; |
| 1052 | |
| 1053 | def CRSET : XLForm_1_ext<19, 289, (outs CRBITRC:$dst), (ins), |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 1054 | "creqv $dst, $dst, $dst", BrCR, |
| 1055 | []>; |
| 1056 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1057 | // XFX-Form instructions. Instructions that deal with SPRs. |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 1058 | // |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1059 | def MFCTR : XFXForm_1_ext<31, 339, 9, (outs GPRC:$rT), (ins), |
| 1060 | "mfctr $rT", SprMFSPR>, |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1061 | PPC970_DGroup_First, PPC970_Unit_FXU; |
Chris Lattner | c703a8f | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 1062 | let Pattern = [(PPCmtctr GPRC:$rS)] in { |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1063 | def MTCTR : XFXForm_7_ext<31, 467, 9, (outs), (ins GPRC:$rS), |
| 1064 | "mtctr $rS", SprMTSPR>, |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 1065 | PPC970_DGroup_First, PPC970_Unit_FXU; |
Chris Lattner | c703a8f | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 1066 | } |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 1067 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1068 | def MTLR : XFXForm_7_ext<31, 467, 8, (outs), (ins GPRC:$rS), |
| 1069 | "mtlr $rS", SprMTSPR>, |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 1070 | PPC970_DGroup_First, PPC970_Unit_FXU; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1071 | def MFLR : XFXForm_1_ext<31, 339, 8, (outs GPRC:$rT), (ins), |
| 1072 | "mflr $rT", SprMFSPR>, |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1073 | PPC970_DGroup_First, PPC970_Unit_FXU; |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 1074 | |
| 1075 | // Move to/from VRSAVE: despite being a SPR, the VRSAVE register is renamed like |
| 1076 | // a GPR on the PPC970. As such, copies in and out have the same performance |
| 1077 | // characteristics as an OR instruction. |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1078 | def MTVRSAVE : XFXForm_7_ext<31, 467, 256, (outs), (ins GPRC:$rS), |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 1079 | "mtspr 256, $rS", IntGeneral>, |
Nate Begeman | 133decd | 2006-03-15 05:25:05 +0000 | [diff] [blame] | 1080 | PPC970_DGroup_Single, PPC970_Unit_FXU; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1081 | def MFVRSAVE : XFXForm_1_ext<31, 339, 256, (outs GPRC:$rT), (ins), |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 1082 | "mfspr $rT, 256", IntGeneral>, |
Nate Begeman | 133decd | 2006-03-15 05:25:05 +0000 | [diff] [blame] | 1083 | PPC970_DGroup_First, PPC970_Unit_FXU; |
Chris Lattner | 1877ec9 | 2006-03-13 21:52:10 +0000 | [diff] [blame] | 1084 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1085 | def MTCRF : XFXForm_5<31, 144, (outs), (ins crbitm:$FXM, GPRC:$rS), |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1086 | "mtcrf $FXM, $rS", BrMCRX>, |
| 1087 | PPC970_MicroCode, PPC970_Unit_CRU; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1088 | def MFCR : XFXForm_3<31, 19, (outs GPRC:$rT), (ins), "mfcr $rT", SprMFCR>, |
Chris Lattner | 6d92cad | 2006-03-26 10:06:40 +0000 | [diff] [blame] | 1089 | PPC970_MicroCode, PPC970_Unit_CRU; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1090 | def MFOCRF: XFXForm_5a<31, 19, (outs GPRC:$rT), (ins crbitm:$FXM), |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1091 | "mfcr $rT, $FXM", SprMFCR>, |
| 1092 | PPC970_DGroup_First, PPC970_Unit_CRU; |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 1093 | |
Dale Johannesen | 6eaeff2 | 2007-10-10 01:01:31 +0000 | [diff] [blame] | 1094 | // Instructions to manipulate FPSCR. Only long double handling uses these. |
| 1095 | // FPSCR is not modelled; we use the SDNode Flag to keep things in order. |
| 1096 | |
| 1097 | def MFFS : XForm_42<63, 583, (outs F8RC:$rT), (ins), |
| 1098 | "mffs $rT", IntMFFS, |
| 1099 | [(set F8RC:$rT, (PPCmffs))]>, |
| 1100 | PPC970_DGroup_Single, PPC970_Unit_FPU; |
| 1101 | def MTFSB0 : XForm_43<63, 70, (outs), (ins u5imm:$FM), |
| 1102 | "mtfsb0 $FM", IntMTFSB0, |
| 1103 | [(PPCmtfsb0 (i32 imm:$FM))]>, |
| 1104 | PPC970_DGroup_Single, PPC970_Unit_FPU; |
| 1105 | def MTFSB1 : XForm_43<63, 38, (outs), (ins u5imm:$FM), |
| 1106 | "mtfsb1 $FM", IntMTFSB0, |
| 1107 | [(PPCmtfsb1 (i32 imm:$FM))]>, |
| 1108 | PPC970_DGroup_Single, PPC970_Unit_FPU; |
| 1109 | def FADDrtz: AForm_2<63, 21, |
| 1110 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRB), |
| 1111 | "fadd $FRT, $FRA, $FRB", FPGeneral, |
| 1112 | [(set F8RC:$FRT, (PPCfaddrtz F8RC:$FRA, F8RC:$FRB))]>, |
| 1113 | PPC970_DGroup_Single, PPC970_Unit_FPU; |
| 1114 | // MTFSF does not actually produce an FP result. We pretend it copies |
| 1115 | // input reg B to the output. If we didn't do this it would look like the |
| 1116 | // instruction had no outputs (because we aren't modelling the FPSCR) and |
| 1117 | // it would be deleted. |
| 1118 | def MTFSF : XFLForm<63, 711, (outs F8RC:$FRA), |
| 1119 | (ins i32imm:$FM, F8RC:$rT, F8RC:$FRB), |
| 1120 | "mtfsf $FM, $rT", "$FRB = $FRA", IntMTFSB0, |
| 1121 | [(set F8RC:$FRA, (PPCmtfsf (i32 imm:$FM), |
| 1122 | F8RC:$rT, F8RC:$FRB))]>, |
| 1123 | PPC970_DGroup_Single, PPC970_Unit_FPU; |
| 1124 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1125 | let PPC970_Unit = 1 in { // FXU Operations. |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 1126 | |
| 1127 | // XO-Form instructions. Arithmetic instructions that can set overflow bit |
| 1128 | // |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1129 | def ADD4 : XOForm_1<31, 266, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1130 | "add $rT, $rA, $rB", IntGeneral, |
Chris Lattner | 218a15d | 2005-09-02 21:18:00 +0000 | [diff] [blame] | 1131 | [(set GPRC:$rT, (add GPRC:$rA, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1132 | def ADDC : XOForm_1<31, 10, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1133 | "addc $rT, $rA, $rB", IntGeneral, |
Chris Lattner | fd97734 | 2006-03-13 05:15:10 +0000 | [diff] [blame] | 1134 | [(set GPRC:$rT, (addc GPRC:$rA, GPRC:$rB))]>, |
| 1135 | PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1136 | def ADDE : XOForm_1<31, 138, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1137 | "adde $rT, $rA, $rB", IntGeneral, |
Nate Begeman | 551bf3f | 2006-02-17 05:43:56 +0000 | [diff] [blame] | 1138 | [(set GPRC:$rT, (adde GPRC:$rA, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1139 | def DIVW : XOForm_1<31, 491, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1140 | "divw $rT, $rA, $rB", IntDivW, |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1141 | [(set GPRC:$rT, (sdiv GPRC:$rA, GPRC:$rB))]>, |
Chris Lattner | fd97734 | 2006-03-13 05:15:10 +0000 | [diff] [blame] | 1142 | PPC970_DGroup_First, PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1143 | def DIVWU : XOForm_1<31, 459, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1144 | "divwu $rT, $rA, $rB", IntDivW, |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1145 | [(set GPRC:$rT, (udiv GPRC:$rA, GPRC:$rB))]>, |
Chris Lattner | fd97734 | 2006-03-13 05:15:10 +0000 | [diff] [blame] | 1146 | PPC970_DGroup_First, PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1147 | def MULHW : XOForm_1<31, 75, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1148 | "mulhw $rT, $rA, $rB", IntMulHW, |
Chris Lattner | 218a15d | 2005-09-02 21:18:00 +0000 | [diff] [blame] | 1149 | [(set GPRC:$rT, (mulhs GPRC:$rA, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1150 | def MULHWU : XOForm_1<31, 11, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1151 | "mulhwu $rT, $rA, $rB", IntMulHWU, |
Chris Lattner | 218a15d | 2005-09-02 21:18:00 +0000 | [diff] [blame] | 1152 | [(set GPRC:$rT, (mulhu GPRC:$rA, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1153 | def MULLW : XOForm_1<31, 235, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1154 | "mullw $rT, $rA, $rB", IntMulHW, |
Chris Lattner | 218a15d | 2005-09-02 21:18:00 +0000 | [diff] [blame] | 1155 | [(set GPRC:$rT, (mul GPRC:$rA, GPRC:$rB))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1156 | def SUBF : XOForm_1<31, 40, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1157 | "subf $rT, $rA, $rB", IntGeneral, |
Chris Lattner | 218a15d | 2005-09-02 21:18:00 +0000 | [diff] [blame] | 1158 | [(set GPRC:$rT, (sub GPRC:$rB, GPRC:$rA))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1159 | def SUBFC : XOForm_1<31, 8, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1160 | "subfc $rT, $rA, $rB", IntGeneral, |
Chris Lattner | fd97734 | 2006-03-13 05:15:10 +0000 | [diff] [blame] | 1161 | [(set GPRC:$rT, (subc GPRC:$rB, GPRC:$rA))]>, |
| 1162 | PPC970_DGroup_Cracked; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1163 | def SUBFE : XOForm_1<31, 136, 0, (outs GPRC:$rT), (ins GPRC:$rA, GPRC:$rB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1164 | "subfe $rT, $rA, $rB", IntGeneral, |
Nate Begeman | 551bf3f | 2006-02-17 05:43:56 +0000 | [diff] [blame] | 1165 | [(set GPRC:$rT, (sube GPRC:$rB, GPRC:$rA))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1166 | def ADDME : XOForm_3<31, 234, 0, (outs GPRC:$rT), (ins GPRC:$rA), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1167 | "addme $rT, $rA", IntGeneral, |
Nate Begeman | 551bf3f | 2006-02-17 05:43:56 +0000 | [diff] [blame] | 1168 | [(set GPRC:$rT, (adde GPRC:$rA, immAllOnes))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1169 | def ADDZE : XOForm_3<31, 202, 0, (outs GPRC:$rT), (ins GPRC:$rA), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1170 | "addze $rT, $rA", IntGeneral, |
Nate Begeman | 551bf3f | 2006-02-17 05:43:56 +0000 | [diff] [blame] | 1171 | [(set GPRC:$rT, (adde GPRC:$rA, 0))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1172 | def NEG : XOForm_3<31, 104, 0, (outs GPRC:$rT), (ins GPRC:$rA), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1173 | "neg $rT, $rA", IntGeneral, |
Chris Lattner | d1cdc70 | 2005-09-08 17:01:54 +0000 | [diff] [blame] | 1174 | [(set GPRC:$rT, (ineg GPRC:$rA))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1175 | def SUBFME : XOForm_3<31, 232, 0, (outs GPRC:$rT), (ins GPRC:$rA), |
Nate Begeman | 551bf3f | 2006-02-17 05:43:56 +0000 | [diff] [blame] | 1176 | "subfme $rT, $rA", IntGeneral, |
| 1177 | [(set GPRC:$rT, (sube immAllOnes, GPRC:$rA))]>; |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1178 | def SUBFZE : XOForm_3<31, 200, 0, (outs GPRC:$rT), (ins GPRC:$rA), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1179 | "subfze $rT, $rA", IntGeneral, |
Nate Begeman | 551bf3f | 2006-02-17 05:43:56 +0000 | [diff] [blame] | 1180 | [(set GPRC:$rT, (sube 0, GPRC:$rA))]>; |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1181 | } |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 1182 | |
| 1183 | // A-Form instructions. Most of the instructions executed in the FPU are of |
| 1184 | // this type. |
| 1185 | // |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1186 | let PPC970_Unit = 3 in { // FPU Operations. |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1187 | def FMADD : AForm_1<63, 29, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1188 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRC, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1189 | "fmadd $FRT, $FRA, $FRC, $FRB", FPFused, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1190 | [(set F8RC:$FRT, (fadd (fmul F8RC:$FRA, F8RC:$FRC), |
Evan Cheng | 8c75ef9 | 2005-12-14 22:07:12 +0000 | [diff] [blame] | 1191 | F8RC:$FRB))]>, |
| 1192 | Requires<[FPContractions]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1193 | def FMADDS : AForm_1<59, 29, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1194 | (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRC, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1195 | "fmadds $FRT, $FRA, $FRC, $FRB", FPGeneral, |
Chris Lattner | dff06f4 | 2005-10-02 07:46:28 +0000 | [diff] [blame] | 1196 | [(set F4RC:$FRT, (fadd (fmul F4RC:$FRA, F4RC:$FRC), |
Evan Cheng | 8c75ef9 | 2005-12-14 22:07:12 +0000 | [diff] [blame] | 1197 | F4RC:$FRB))]>, |
| 1198 | Requires<[FPContractions]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1199 | def FMSUB : AForm_1<63, 28, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1200 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRC, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1201 | "fmsub $FRT, $FRA, $FRC, $FRB", FPFused, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1202 | [(set F8RC:$FRT, (fsub (fmul F8RC:$FRA, F8RC:$FRC), |
Evan Cheng | 8c75ef9 | 2005-12-14 22:07:12 +0000 | [diff] [blame] | 1203 | F8RC:$FRB))]>, |
| 1204 | Requires<[FPContractions]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1205 | def FMSUBS : AForm_1<59, 28, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1206 | (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRC, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1207 | "fmsubs $FRT, $FRA, $FRC, $FRB", FPGeneral, |
Chris Lattner | dff06f4 | 2005-10-02 07:46:28 +0000 | [diff] [blame] | 1208 | [(set F4RC:$FRT, (fsub (fmul F4RC:$FRA, F4RC:$FRC), |
Evan Cheng | 8c75ef9 | 2005-12-14 22:07:12 +0000 | [diff] [blame] | 1209 | F4RC:$FRB))]>, |
| 1210 | Requires<[FPContractions]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1211 | def FNMADD : AForm_1<63, 31, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1212 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRC, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1213 | "fnmadd $FRT, $FRA, $FRC, $FRB", FPFused, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1214 | [(set F8RC:$FRT, (fneg (fadd (fmul F8RC:$FRA, F8RC:$FRC), |
Nate Begeman | a07da92 | 2005-12-14 22:54:33 +0000 | [diff] [blame] | 1215 | F8RC:$FRB)))]>, |
| 1216 | Requires<[FPContractions]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1217 | def FNMADDS : AForm_1<59, 31, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1218 | (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRC, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1219 | "fnmadds $FRT, $FRA, $FRC, $FRB", FPGeneral, |
Chris Lattner | dff06f4 | 2005-10-02 07:46:28 +0000 | [diff] [blame] | 1220 | [(set F4RC:$FRT, (fneg (fadd (fmul F4RC:$FRA, F4RC:$FRC), |
Nate Begeman | a07da92 | 2005-12-14 22:54:33 +0000 | [diff] [blame] | 1221 | F4RC:$FRB)))]>, |
| 1222 | Requires<[FPContractions]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1223 | def FNMSUB : AForm_1<63, 30, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1224 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRC, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1225 | "fnmsub $FRT, $FRA, $FRC, $FRB", FPFused, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1226 | [(set F8RC:$FRT, (fneg (fsub (fmul F8RC:$FRA, F8RC:$FRC), |
Nate Begeman | a07da92 | 2005-12-14 22:54:33 +0000 | [diff] [blame] | 1227 | F8RC:$FRB)))]>, |
| 1228 | Requires<[FPContractions]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1229 | def FNMSUBS : AForm_1<59, 30, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1230 | (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRC, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1231 | "fnmsubs $FRT, $FRA, $FRC, $FRB", FPGeneral, |
Chris Lattner | dff06f4 | 2005-10-02 07:46:28 +0000 | [diff] [blame] | 1232 | [(set F4RC:$FRT, (fneg (fsub (fmul F4RC:$FRA, F4RC:$FRC), |
Nate Begeman | a07da92 | 2005-12-14 22:54:33 +0000 | [diff] [blame] | 1233 | F4RC:$FRB)))]>, |
| 1234 | Requires<[FPContractions]>; |
Chris Lattner | 43f07a4 | 2005-10-02 07:07:49 +0000 | [diff] [blame] | 1235 | // FSEL is artificially split into 4 and 8-byte forms for the result. To avoid |
| 1236 | // having 4 of these, force the comparison to always be an 8-byte double (code |
| 1237 | // should use an FMRSD if the input comparison value really wants to be a float) |
Chris Lattner | 867940d | 2005-10-02 06:58:23 +0000 | [diff] [blame] | 1238 | // and 4/8 byte forms for the result and operand type.. |
Chris Lattner | 43f07a4 | 2005-10-02 07:07:49 +0000 | [diff] [blame] | 1239 | def FSELD : AForm_1<63, 23, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1240 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRC, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1241 | "fsel $FRT, $FRA, $FRC, $FRB", FPGeneral, |
Chris Lattner | 9c73f09 | 2005-10-25 20:55:47 +0000 | [diff] [blame] | 1242 | [(set F8RC:$FRT, (PPCfsel F8RC:$FRA,F8RC:$FRC,F8RC:$FRB))]>; |
Chris Lattner | 43f07a4 | 2005-10-02 07:07:49 +0000 | [diff] [blame] | 1243 | def FSELS : AForm_1<63, 23, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1244 | (outs F4RC:$FRT), (ins F8RC:$FRA, F4RC:$FRC, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1245 | "fsel $FRT, $FRA, $FRC, $FRB", FPGeneral, |
Chris Lattner | 9c73f09 | 2005-10-25 20:55:47 +0000 | [diff] [blame] | 1246 | [(set F4RC:$FRT, (PPCfsel F8RC:$FRA,F4RC:$FRC,F4RC:$FRB))]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1247 | def FADD : AForm_2<63, 21, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1248 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1249 | "fadd $FRT, $FRA, $FRB", FPGeneral, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1250 | [(set F8RC:$FRT, (fadd F8RC:$FRA, F8RC:$FRB))]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1251 | def FADDS : AForm_2<59, 21, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1252 | (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1253 | "fadds $FRT, $FRA, $FRB", FPGeneral, |
Chris Lattner | dff06f4 | 2005-10-02 07:46:28 +0000 | [diff] [blame] | 1254 | [(set F4RC:$FRT, (fadd F4RC:$FRA, F4RC:$FRB))]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1255 | def FDIV : AForm_2<63, 18, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1256 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1257 | "fdiv $FRT, $FRA, $FRB", FPDivD, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1258 | [(set F8RC:$FRT, (fdiv F8RC:$FRA, F8RC:$FRB))]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1259 | def FDIVS : AForm_2<59, 18, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1260 | (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1261 | "fdivs $FRT, $FRA, $FRB", FPDivS, |
Chris Lattner | dff06f4 | 2005-10-02 07:46:28 +0000 | [diff] [blame] | 1262 | [(set F4RC:$FRT, (fdiv F4RC:$FRA, F4RC:$FRB))]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1263 | def FMUL : AForm_3<63, 25, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1264 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1265 | "fmul $FRT, $FRA, $FRB", FPFused, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1266 | [(set F8RC:$FRT, (fmul F8RC:$FRA, F8RC:$FRB))]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1267 | def FMULS : AForm_3<59, 25, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1268 | (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1269 | "fmuls $FRT, $FRA, $FRB", FPGeneral, |
Chris Lattner | dff06f4 | 2005-10-02 07:46:28 +0000 | [diff] [blame] | 1270 | [(set F4RC:$FRT, (fmul F4RC:$FRA, F4RC:$FRB))]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1271 | def FSUB : AForm_2<63, 20, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1272 | (outs F8RC:$FRT), (ins F8RC:$FRA, F8RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1273 | "fsub $FRT, $FRA, $FRB", FPGeneral, |
Chris Lattner | 919c032 | 2005-10-01 01:35:02 +0000 | [diff] [blame] | 1274 | [(set F8RC:$FRT, (fsub F8RC:$FRA, F8RC:$FRB))]>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1275 | def FSUBS : AForm_2<59, 20, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1276 | (outs F4RC:$FRT), (ins F4RC:$FRA, F4RC:$FRB), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1277 | "fsubs $FRT, $FRA, $FRB", FPGeneral, |
Chris Lattner | dff06f4 | 2005-10-02 07:46:28 +0000 | [diff] [blame] | 1278 | [(set F4RC:$FRT, (fsub F4RC:$FRA, F4RC:$FRB))]>; |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1279 | } |
Nate Begeman | 07aada8 | 2004-08-30 02:28:06 +0000 | [diff] [blame] | 1280 | |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1281 | let PPC970_Unit = 1 in { // FXU Operations. |
Nate Begeman | cc8bd9c | 2004-08-31 02:28:08 +0000 | [diff] [blame] | 1282 | // M-Form instructions. rotate and mask instructions. |
| 1283 | // |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 1284 | let isCommutable = 1 in { |
Chris Lattner | 043870d | 2005-09-09 18:17:41 +0000 | [diff] [blame] | 1285 | // RLWIMI can be commuted if the rotate amount is zero. |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1286 | def RLWIMI : MForm_2<20, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1287 | (outs GPRC:$rA), (ins GPRC:$rSi, GPRC:$rS, u5imm:$SH, u5imm:$MB, |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1288 | u5imm:$ME), "rlwimi $rA, $rS, $SH, $MB, $ME", IntRotate, |
Chris Lattner | 8e28b5c | 2006-11-15 23:24:18 +0000 | [diff] [blame] | 1289 | []>, PPC970_DGroup_Cracked, RegConstraint<"$rSi = $rA">, |
| 1290 | NoEncode<"$rSi">; |
Nate Begeman | 2d4c98d | 2004-10-16 20:43:38 +0000 | [diff] [blame] | 1291 | } |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1292 | def RLWINM : MForm_2<21, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1293 | (outs GPRC:$rA), (ins GPRC:$rS, u5imm:$SH, u5imm:$MB, u5imm:$ME), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1294 | "rlwinm $rA, $rS, $SH, $MB, $ME", IntGeneral, |
Nate Begeman | 2d5aff7 | 2005-10-19 18:42:01 +0000 | [diff] [blame] | 1295 | []>; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1296 | def RLWINMo : MForm_2<21, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1297 | (outs GPRC:$rA), (ins GPRC:$rS, u5imm:$SH, u5imm:$MB, u5imm:$ME), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1298 | "rlwinm. $rA, $rS, $SH, $MB, $ME", IntGeneral, |
Chris Lattner | fd97734 | 2006-03-13 05:15:10 +0000 | [diff] [blame] | 1299 | []>, isDOT, PPC970_DGroup_Cracked; |
Chris Lattner | 14522e3 | 2005-04-19 05:21:30 +0000 | [diff] [blame] | 1300 | def RLWNM : MForm_2<23, |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1301 | (outs GPRC:$rA), (ins GPRC:$rS, GPRC:$rB, u5imm:$MB, u5imm:$ME), |
Jim Laskey | 5384214 | 2005-10-19 19:51:16 +0000 | [diff] [blame] | 1302 | "rlwnm $rA, $rS, $rB, $MB, $ME", IntGeneral, |
Nate Begeman | 2d5aff7 | 2005-10-19 18:42:01 +0000 | [diff] [blame] | 1303 | []>; |
Chris Lattner | 88d211f | 2006-03-12 09:13:49 +0000 | [diff] [blame] | 1304 | } |
Nate Begeman | cc8bd9c | 2004-08-31 02:28:08 +0000 | [diff] [blame] | 1305 | |
Chris Lattner | 3c0f9cc | 2006-03-20 06:15:45 +0000 | [diff] [blame] | 1306 | |
Chris Lattner | 2eb2517 | 2005-09-09 00:39:56 +0000 | [diff] [blame] | 1307 | //===----------------------------------------------------------------------===// |
Jim Laskey | f5395ce | 2005-12-16 22:45:29 +0000 | [diff] [blame] | 1308 | // DWARF Pseudo Instructions |
| 1309 | // |
| 1310 | |
Evan Cheng | 64d80e3 | 2007-07-19 01:14:50 +0000 | [diff] [blame] | 1311 | def DWARF_LOC : Pseudo<(outs), (ins i32imm:$line, i32imm:$col, i32imm:$file), |
Chris Lattner | 5468966 | 2006-09-27 02:55:21 +0000 | [diff] [blame] | 1312 | "${:comment} .loc $file, $line, $col", |
Jim Laskey | f5395ce | 2005-12-16 22:45:29 +0000 | [diff] [blame] | 1313 | [(dwarf_loc (i32 imm:$line), (i32 imm:$col), |
Jim Laskey | abf6d17 | 2006-01-05 01:25:28 +0000 | [diff] [blame] | 1314 | (i32 imm:$file))]>; |
| 1315 | |
Jim Laskey | f5395ce | 2005-12-16 22:45:29 +0000 | [diff] [blame] | 1316 | //===----------------------------------------------------------------------===// |
Chris Lattner | 2eb2517 | 2005-09-09 00:39:56 +0000 | [diff] [blame] | 1317 | // PowerPC Instruction Patterns |
| 1318 | // |
| 1319 | |
Chris Lattner | 30e21a4 | 2005-09-26 22:20:16 +0000 | [diff] [blame] | 1320 | // Arbitrary immediate support. Implement in terms of LIS/ORI. |
| 1321 | def : Pat<(i32 imm:$imm), |
| 1322 | (ORI (LIS (HI16 imm:$imm)), (LO16 imm:$imm))>; |
Chris Lattner | 91da862 | 2005-09-28 17:13:15 +0000 | [diff] [blame] | 1323 | |
| 1324 | // Implement the 'not' operation with the NOR instruction. |
| 1325 | def NOT : Pat<(not GPRC:$in), |
| 1326 | (NOR GPRC:$in, GPRC:$in)>; |
| 1327 | |
Chris Lattner | 79d0e9f | 2005-09-28 23:07:13 +0000 | [diff] [blame] | 1328 | // ADD an arbitrary immediate. |
| 1329 | def : Pat<(add GPRC:$in, imm:$imm), |
| 1330 | (ADDIS (ADDI GPRC:$in, (LO16 imm:$imm)), (HA16 imm:$imm))>; |
| 1331 | // OR an arbitrary immediate. |
Chris Lattner | 2eb2517 | 2005-09-09 00:39:56 +0000 | [diff] [blame] | 1332 | def : Pat<(or GPRC:$in, imm:$imm), |
| 1333 | (ORIS (ORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>; |
Chris Lattner | 79d0e9f | 2005-09-28 23:07:13 +0000 | [diff] [blame] | 1334 | // XOR an arbitrary immediate. |
Chris Lattner | 2eb2517 | 2005-09-09 00:39:56 +0000 | [diff] [blame] | 1335 | def : Pat<(xor GPRC:$in, imm:$imm), |
| 1336 | (XORIS (XORI GPRC:$in, (LO16 imm:$imm)), (HI16 imm:$imm))>; |
Nate Begeman | 551bf3f | 2006-02-17 05:43:56 +0000 | [diff] [blame] | 1337 | // SUBFIC |
Nate Begeman | 79691bc | 2006-03-17 22:41:37 +0000 | [diff] [blame] | 1338 | def : Pat<(sub immSExt16:$imm, GPRC:$in), |
Nate Begeman | 551bf3f | 2006-02-17 05:43:56 +0000 | [diff] [blame] | 1339 | (SUBFIC GPRC:$in, imm:$imm)>; |
Chris Lattner | 8be1fa5 | 2005-10-19 01:38:02 +0000 | [diff] [blame] | 1340 | |
Chris Lattner | 956f43c | 2006-06-16 20:22:01 +0000 | [diff] [blame] | 1341 | // SHL/SRL |
Chris Lattner | bd05982 | 2005-12-05 02:34:05 +0000 | [diff] [blame] | 1342 | def : Pat<(shl GPRC:$in, (i32 imm:$imm)), |
Nate Begeman | 2d5aff7 | 2005-10-19 18:42:01 +0000 | [diff] [blame] | 1343 | (RLWINM GPRC:$in, imm:$imm, 0, (SHL32 imm:$imm))>; |
Chris Lattner | bd05982 | 2005-12-05 02:34:05 +0000 | [diff] [blame] | 1344 | def : Pat<(srl GPRC:$in, (i32 imm:$imm)), |
Nate Begeman | 2d5aff7 | 2005-10-19 18:42:01 +0000 | [diff] [blame] | 1345 | (RLWINM GPRC:$in, (SRL32 imm:$imm), imm:$imm, 31)>; |
Nate Begeman | 2d5aff7 | 2005-10-19 18:42:01 +0000 | [diff] [blame] | 1346 | |
Nate Begeman | 35ef913 | 2006-01-11 21:21:00 +0000 | [diff] [blame] | 1347 | // ROTL |
| 1348 | def : Pat<(rotl GPRC:$in, GPRC:$sh), |
| 1349 | (RLWNM GPRC:$in, GPRC:$sh, 0, 31)>; |
| 1350 | def : Pat<(rotl GPRC:$in, (i32 imm:$imm)), |
| 1351 | (RLWINM GPRC:$in, imm:$imm, 0, 31)>; |
Chris Lattner | c703a8f | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 1352 | |
Nate Begeman | f42f133 | 2006-09-22 05:01:56 +0000 | [diff] [blame] | 1353 | // RLWNM |
| 1354 | def : Pat<(and (rotl GPRC:$in, GPRC:$sh), maskimm32:$imm), |
| 1355 | (RLWNM GPRC:$in, GPRC:$sh, (MB maskimm32:$imm), (ME maskimm32:$imm))>; |
| 1356 | |
Chris Lattner | c703a8f | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 1357 | // Calls |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 1358 | def : Pat<(PPCcall_Macho (i32 tglobaladdr:$dst)), |
| 1359 | (BL_Macho tglobaladdr:$dst)>; |
Chris Lattner | 1fa3d9e | 2007-02-25 19:20:53 +0000 | [diff] [blame] | 1360 | def : Pat<(PPCcall_Macho (i32 texternalsym:$dst)), |
| 1361 | (BL_Macho texternalsym:$dst)>; |
Nicolas Geoffray | 63f8fb1 | 2007-02-27 13:01:19 +0000 | [diff] [blame] | 1362 | def : Pat<(PPCcall_ELF (i32 tglobaladdr:$dst)), |
Chris Lattner | 1fa3d9e | 2007-02-25 19:20:53 +0000 | [diff] [blame] | 1363 | (BL_ELF tglobaladdr:$dst)>; |
Chris Lattner | 9f0bc65 | 2007-02-25 05:34:32 +0000 | [diff] [blame] | 1364 | def : Pat<(PPCcall_ELF (i32 texternalsym:$dst)), |
Nicolas Geoffray | 63f8fb1 | 2007-02-27 13:01:19 +0000 | [diff] [blame] | 1365 | (BL_ELF texternalsym:$dst)>; |
Chris Lattner | c703a8f | 2006-05-17 19:00:46 +0000 | [diff] [blame] | 1366 | |
Arnold Schwaighofer | 30e62c0 | 2008-04-30 09:16:33 +0000 | [diff] [blame] | 1367 | |
| 1368 | def : Pat<(PPCtc_return (i32 tglobaladdr:$dst), imm:$imm), |
| 1369 | (TCRETURNdi tglobaladdr:$dst, imm:$imm)>; |
| 1370 | |
| 1371 | def : Pat<(PPCtc_return (i32 texternalsym:$dst), imm:$imm), |
| 1372 | (TCRETURNdi texternalsym:$dst, imm:$imm)>; |
| 1373 | |
| 1374 | def : Pat<(PPCtc_return CTRRC:$dst, imm:$imm), |
| 1375 | (TCRETURNri CTRRC:$dst, imm:$imm)>; |
| 1376 | |
| 1377 | |
| 1378 | |
Chris Lattner | 860e886 | 2005-11-17 07:30:41 +0000 | [diff] [blame] | 1379 | // Hi and Lo for Darwin Global Addresses. |
Chris Lattner | d717b19 | 2005-12-11 07:45:47 +0000 | [diff] [blame] | 1380 | def : Pat<(PPChi tglobaladdr:$in, 0), (LIS tglobaladdr:$in)>; |
| 1381 | def : Pat<(PPClo tglobaladdr:$in, 0), (LI tglobaladdr:$in)>; |
| 1382 | def : Pat<(PPChi tconstpool:$in, 0), (LIS tconstpool:$in)>; |
| 1383 | def : Pat<(PPClo tconstpool:$in, 0), (LI tconstpool:$in)>; |
Nate Begeman | 37efe67 | 2006-04-22 18:53:45 +0000 | [diff] [blame] | 1384 | def : Pat<(PPChi tjumptable:$in, 0), (LIS tjumptable:$in)>; |
| 1385 | def : Pat<(PPClo tjumptable:$in, 0), (LI tjumptable:$in)>; |
Chris Lattner | 490ad08 | 2005-11-17 17:52:01 +0000 | [diff] [blame] | 1386 | def : Pat<(add GPRC:$in, (PPChi tglobaladdr:$g, 0)), |
| 1387 | (ADDIS GPRC:$in, tglobaladdr:$g)>; |
Nate Begeman | 28a6b02 | 2005-12-10 02:36:00 +0000 | [diff] [blame] | 1388 | def : Pat<(add GPRC:$in, (PPChi tconstpool:$g, 0)), |
| 1389 | (ADDIS GPRC:$in, tconstpool:$g)>; |
Nate Begeman | 37efe67 | 2006-04-22 18:53:45 +0000 | [diff] [blame] | 1390 | def : Pat<(add GPRC:$in, (PPChi tjumptable:$g, 0)), |
| 1391 | (ADDIS GPRC:$in, tjumptable:$g)>; |
Chris Lattner | 860e886 | 2005-11-17 07:30:41 +0000 | [diff] [blame] | 1392 | |
Nate Begeman | a07da92 | 2005-12-14 22:54:33 +0000 | [diff] [blame] | 1393 | // Fused negative multiply subtract, alternate pattern |
| 1394 | def : Pat<(fsub F8RC:$B, (fmul F8RC:$A, F8RC:$C)), |
| 1395 | (FNMSUB F8RC:$A, F8RC:$C, F8RC:$B)>, |
| 1396 | Requires<[FPContractions]>; |
| 1397 | def : Pat<(fsub F4RC:$B, (fmul F4RC:$A, F4RC:$C)), |
| 1398 | (FNMSUBS F4RC:$A, F4RC:$C, F4RC:$B)>, |
| 1399 | Requires<[FPContractions]>; |
| 1400 | |
Chris Lattner | 4172b10 | 2005-12-06 02:10:38 +0000 | [diff] [blame] | 1401 | // Standard shifts. These are represented separately from the real shifts above |
| 1402 | // so that we can distinguish between shifts that allow 5-bit and 6-bit shift |
| 1403 | // amounts. |
| 1404 | def : Pat<(sra GPRC:$rS, GPRC:$rB), |
| 1405 | (SRAW GPRC:$rS, GPRC:$rB)>; |
| 1406 | def : Pat<(srl GPRC:$rS, GPRC:$rB), |
| 1407 | (SRW GPRC:$rS, GPRC:$rB)>; |
| 1408 | def : Pat<(shl GPRC:$rS, GPRC:$rB), |
| 1409 | (SLW GPRC:$rS, GPRC:$rB)>; |
| 1410 | |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1411 | def : Pat<(zextloadi1 iaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1412 | (LBZ iaddr:$src)>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1413 | def : Pat<(zextloadi1 xaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1414 | (LBZX xaddr:$src)>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1415 | def : Pat<(extloadi1 iaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1416 | (LBZ iaddr:$src)>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1417 | def : Pat<(extloadi1 xaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1418 | (LBZX xaddr:$src)>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1419 | def : Pat<(extloadi8 iaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1420 | (LBZ iaddr:$src)>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1421 | def : Pat<(extloadi8 xaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1422 | (LBZX xaddr:$src)>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1423 | def : Pat<(extloadi16 iaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1424 | (LHZ iaddr:$src)>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1425 | def : Pat<(extloadi16 xaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1426 | (LHZX xaddr:$src)>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1427 | def : Pat<(extloadf32 iaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1428 | (FMRSD (LFS iaddr:$src))>; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1429 | def : Pat<(extloadf32 xaddr:$src), |
Nate Begeman | 7fd1edd | 2005-12-19 23:25:09 +0000 | [diff] [blame] | 1430 | (FMRSD (LFSX xaddr:$src))>; |
| 1431 | |
Dale Johannesen | f87d6c0 | 2008-08-22 17:20:54 +0000 | [diff] [blame] | 1432 | // Memory barriers |
| 1433 | def : Pat<(membarrier (i32 imm:$ll), |
| 1434 | (i32 imm:$ls), |
| 1435 | (i32 imm:$sl), |
| 1436 | (i32 imm:$ss), |
| 1437 | (i32 imm:$device)), |
| 1438 | (SYNC)>; |
| 1439 | |
Chris Lattner | b22a04d | 2006-03-25 07:51:43 +0000 | [diff] [blame] | 1440 | include "PPCInstrAltivec.td" |
Chris Lattner | 956f43c | 2006-06-16 20:22:01 +0000 | [diff] [blame] | 1441 | include "PPCInstr64Bit.td" |