| Evan Cheng | 3568a10 | 2011-11-08 21:21:09 +0000 | [diff] [blame^] | 1 | ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 -regalloc=fast | FileCheck %s -check-prefix=A8 |
| 2 | ; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-m3 -regalloc=fast | FileCheck %s -check-prefix=M3 |
| 3 | ; rdar://6949835 |
| Evan Cheng | 358dec5 | 2009-06-15 08:28:29 +0000 | [diff] [blame] | 4 | |
| Evan Cheng | 3568a10 | 2011-11-08 21:21:09 +0000 | [diff] [blame^] | 5 | ; Magic ARM pair hints works best with linearscan / fast. |
| 6 | |
| 7 | ; Cortex-M3 errata 602117: LDRD with base in list may result in incorrect base |
| 8 | ; register when interrupted or faulted. |
| Jakob Stoklund Olesen | ca6fd00 | 2011-03-31 22:14:03 +0000 | [diff] [blame] | 9 | |
| Evan Cheng | 358dec5 | 2009-06-15 08:28:29 +0000 | [diff] [blame] | 10 | @b = external global i64* |
| 11 | |
| 12 | define i64 @t(i64 %a) nounwind readonly { |
| 13 | entry: |
| Evan Cheng | 3568a10 | 2011-11-08 21:21:09 +0000 | [diff] [blame^] | 14 | ; A8: t: |
| 15 | ; A8: ldrd r2, r3, [r2] |
| Evan Cheng | 9fde6ca | 2009-09-26 02:41:17 +0000 | [diff] [blame] | 16 | |
| Evan Cheng | 3568a10 | 2011-11-08 21:21:09 +0000 | [diff] [blame^] | 17 | ; M3: t: |
| 18 | ; M3-NOT: ldrd |
| 19 | ; M3: ldm.w r2, {r2, r3} |
| Evan Cheng | 9fde6ca | 2009-09-26 02:41:17 +0000 | [diff] [blame] | 20 | |
| Evan Cheng | 358dec5 | 2009-06-15 08:28:29 +0000 | [diff] [blame] | 21 | %0 = load i64** @b, align 4 |
| 22 | %1 = load i64* %0, align 4 |
| 23 | %2 = mul i64 %1, %a |
| 24 | ret i64 %2 |
| 25 | } |