Chris Lattner | c6d0567 | 2006-05-23 23:20:42 +0000 | [diff] [blame] | 1 | //===-- X86ISelLowering.cpp - X86 DAG Lowering Implementation -------------===// |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by Chris Lattner and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file defines the interfaces that X86 uses to lower LLVM code into a |
| 11 | // selection DAG. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | #include "X86.h" |
Evan Cheng | 0cc3945 | 2006-01-16 21:21:29 +0000 | [diff] [blame] | 16 | #include "X86InstrBuilder.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 17 | #include "X86ISelLowering.h" |
Evan Cheng | e8bd0a3 | 2006-06-06 23:30:24 +0000 | [diff] [blame] | 18 | #include "X86MachineFunctionInfo.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 19 | #include "X86TargetMachine.h" |
| 20 | #include "llvm/CallingConv.h" |
Evan Cheng | 223547a | 2006-01-31 22:28:30 +0000 | [diff] [blame] | 21 | #include "llvm/Constants.h" |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 22 | #include "llvm/DerivedTypes.h" |
Lauro Ramos Venancio | b3a0417 | 2007-04-20 21:38:10 +0000 | [diff] [blame] | 23 | #include "llvm/GlobalVariable.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 24 | #include "llvm/Function.h" |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 25 | #include "llvm/Intrinsics.h" |
Evan Cheng | 30b37b5 | 2006-03-13 23:18:16 +0000 | [diff] [blame] | 26 | #include "llvm/ADT/VectorExtras.h" |
| 27 | #include "llvm/Analysis/ScalarEvolutionExpressions.h" |
Chris Lattner | 362e98a | 2007-02-27 04:43:02 +0000 | [diff] [blame] | 28 | #include "llvm/CodeGen/CallingConvLower.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 29 | #include "llvm/CodeGen/MachineFrameInfo.h" |
Evan Cheng | 4a46080 | 2006-01-11 00:33:36 +0000 | [diff] [blame] | 30 | #include "llvm/CodeGen/MachineFunction.h" |
| 31 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 32 | #include "llvm/CodeGen/SelectionDAG.h" |
| 33 | #include "llvm/CodeGen/SSARegMap.h" |
Evan Cheng | ef6ffb1 | 2006-01-31 03:14:29 +0000 | [diff] [blame] | 34 | #include "llvm/Support/MathExtras.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 35 | #include "llvm/Target/TargetOptions.h" |
Chris Lattner | 1a60aa7 | 2006-10-31 19:42:44 +0000 | [diff] [blame] | 36 | #include "llvm/ADT/StringExtras.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 37 | using namespace llvm; |
| 38 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 39 | X86TargetLowering::X86TargetLowering(TargetMachine &TM) |
| 40 | : TargetLowering(TM) { |
Evan Cheng | 559806f | 2006-01-27 08:10:46 +0000 | [diff] [blame] | 41 | Subtarget = &TM.getSubtarget<X86Subtarget>(); |
| 42 | X86ScalarSSE = Subtarget->hasSSE2(); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 43 | X86StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP; |
Evan Cheng | 559806f | 2006-01-27 08:10:46 +0000 | [diff] [blame] | 44 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 45 | // Set up the TargetLowering object. |
| 46 | |
| 47 | // X86 is weird, it always uses i8 for shift amounts and setcc results. |
| 48 | setShiftAmountType(MVT::i8); |
| 49 | setSetCCResultType(MVT::i8); |
| 50 | setSetCCResultContents(ZeroOrOneSetCCResult); |
Evan Cheng | 0b2afbd | 2006-01-25 09:15:17 +0000 | [diff] [blame] | 51 | setSchedulingPreference(SchedulingForRegPressure); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 52 | setShiftAmountFlavor(Mask); // shl X, 32 == shl X, 0 |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 53 | setStackPointerRegisterToSaveRestore(X86StackPtr); |
Evan Cheng | 714554d | 2006-03-16 21:47:42 +0000 | [diff] [blame] | 54 | |
Anton Korobeynikov | d27a258 | 2006-12-10 23:12:42 +0000 | [diff] [blame] | 55 | if (Subtarget->isTargetDarwin()) { |
Evan Cheng | df57fa0 | 2006-03-17 20:31:41 +0000 | [diff] [blame] | 56 | // Darwin should use _setjmp/_longjmp instead of setjmp/longjmp. |
Anton Korobeynikov | d27a258 | 2006-12-10 23:12:42 +0000 | [diff] [blame] | 57 | setUseUnderscoreSetJmp(false); |
| 58 | setUseUnderscoreLongJmp(false); |
Anton Korobeynikov | 317848f | 2007-01-03 11:43:14 +0000 | [diff] [blame] | 59 | } else if (Subtarget->isTargetMingw()) { |
Anton Korobeynikov | d27a258 | 2006-12-10 23:12:42 +0000 | [diff] [blame] | 60 | // MS runtime is weird: it exports _setjmp, but longjmp! |
| 61 | setUseUnderscoreSetJmp(true); |
| 62 | setUseUnderscoreLongJmp(false); |
| 63 | } else { |
| 64 | setUseUnderscoreSetJmp(true); |
| 65 | setUseUnderscoreLongJmp(true); |
| 66 | } |
| 67 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 68 | // Set up the register classes. |
Evan Cheng | 069287d | 2006-05-16 07:21:53 +0000 | [diff] [blame] | 69 | addRegisterClass(MVT::i8, X86::GR8RegisterClass); |
| 70 | addRegisterClass(MVT::i16, X86::GR16RegisterClass); |
| 71 | addRegisterClass(MVT::i32, X86::GR32RegisterClass); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 72 | if (Subtarget->is64Bit()) |
| 73 | addRegisterClass(MVT::i64, X86::GR64RegisterClass); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 74 | |
Evan Cheng | c548428 | 2006-10-04 00:56:09 +0000 | [diff] [blame] | 75 | setLoadXAction(ISD::SEXTLOAD, MVT::i1, Expand); |
| 76 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 77 | // Promote all UINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have this |
| 78 | // operation. |
| 79 | setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote); |
| 80 | setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote); |
| 81 | setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote); |
Evan Cheng | 6892f28 | 2006-01-17 02:32:49 +0000 | [diff] [blame] | 82 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 83 | if (Subtarget->is64Bit()) { |
| 84 | setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Expand); |
Evan Cheng | 6892f28 | 2006-01-17 02:32:49 +0000 | [diff] [blame] | 85 | setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 86 | } else { |
| 87 | if (X86ScalarSSE) |
| 88 | // If SSE i64 SINT_TO_FP is not available, expand i32 UINT_TO_FP. |
| 89 | setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Expand); |
| 90 | else |
| 91 | setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); |
| 92 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 93 | |
| 94 | // Promote i1/i8 SINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have |
| 95 | // this operation. |
| 96 | setOperationAction(ISD::SINT_TO_FP , MVT::i1 , Promote); |
| 97 | setOperationAction(ISD::SINT_TO_FP , MVT::i8 , Promote); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 98 | // SSE has no i16 to fp conversion, only i32 |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 99 | if (X86ScalarSSE) |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 100 | setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote); |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 101 | else { |
| 102 | setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Custom); |
| 103 | setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Custom); |
| 104 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 105 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 106 | if (!Subtarget->is64Bit()) { |
| 107 | // Custom lower SINT_TO_FP and FP_TO_SINT from/to i64 in 32-bit mode. |
| 108 | setOperationAction(ISD::SINT_TO_FP , MVT::i64 , Custom); |
| 109 | setOperationAction(ISD::FP_TO_SINT , MVT::i64 , Custom); |
| 110 | } |
Evan Cheng | 6dab053 | 2006-01-30 08:02:57 +0000 | [diff] [blame] | 111 | |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 112 | // Promote i1/i8 FP_TO_SINT to larger FP_TO_SINTS's, as X86 doesn't have |
| 113 | // this operation. |
| 114 | setOperationAction(ISD::FP_TO_SINT , MVT::i1 , Promote); |
| 115 | setOperationAction(ISD::FP_TO_SINT , MVT::i8 , Promote); |
| 116 | |
| 117 | if (X86ScalarSSE) { |
| 118 | setOperationAction(ISD::FP_TO_SINT , MVT::i16 , Promote); |
| 119 | } else { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 120 | setOperationAction(ISD::FP_TO_SINT , MVT::i16 , Custom); |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 121 | setOperationAction(ISD::FP_TO_SINT , MVT::i32 , Custom); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 122 | } |
| 123 | |
| 124 | // Handle FP_TO_UINT by promoting the destination to a larger signed |
| 125 | // conversion. |
| 126 | setOperationAction(ISD::FP_TO_UINT , MVT::i1 , Promote); |
| 127 | setOperationAction(ISD::FP_TO_UINT , MVT::i8 , Promote); |
| 128 | setOperationAction(ISD::FP_TO_UINT , MVT::i16 , Promote); |
| 129 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 130 | if (Subtarget->is64Bit()) { |
| 131 | setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 132 | setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 133 | } else { |
| 134 | if (X86ScalarSSE && !Subtarget->hasSSE3()) |
| 135 | // Expand FP_TO_UINT into a select. |
| 136 | // FIXME: We would like to use a Custom expander here eventually to do |
| 137 | // the optimal thing for SSE vs. the default expansion in the legalizer. |
| 138 | setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Expand); |
| 139 | else |
| 140 | // With SSE3 we can use fisttpll to convert to a signed i64. |
| 141 | setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); |
| 142 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 143 | |
Chris Lattner | 399610a | 2006-12-05 18:22:22 +0000 | [diff] [blame] | 144 | // TODO: when we have SSE, these could be more efficient, by using movd/movq. |
Chris Lattner | f3597a1 | 2006-12-05 18:45:06 +0000 | [diff] [blame] | 145 | if (!X86ScalarSSE) { |
| 146 | setOperationAction(ISD::BIT_CONVERT , MVT::f32 , Expand); |
| 147 | setOperationAction(ISD::BIT_CONVERT , MVT::i32 , Expand); |
| 148 | } |
Chris Lattner | 21f6685 | 2005-12-23 05:15:23 +0000 | [diff] [blame] | 149 | |
Evan Cheng | c35497f | 2006-10-30 08:02:39 +0000 | [diff] [blame] | 150 | setOperationAction(ISD::BR_JT , MVT::Other, Expand); |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 151 | setOperationAction(ISD::BRCOND , MVT::Other, Custom); |
Nate Begeman | 750ac1b | 2006-02-01 07:19:44 +0000 | [diff] [blame] | 152 | setOperationAction(ISD::BR_CC , MVT::Other, Expand); |
| 153 | setOperationAction(ISD::SELECT_CC , MVT::Other, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 154 | setOperationAction(ISD::MEMMOVE , MVT::Other, Expand); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 155 | if (Subtarget->is64Bit()) |
| 156 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i32, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 157 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand); |
Chris Lattner | e80242a | 2005-12-07 17:59:14 +0000 | [diff] [blame] | 158 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 159 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); |
| 160 | setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 161 | setOperationAction(ISD::FREM , MVT::f64 , Expand); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 162 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 163 | setOperationAction(ISD::CTPOP , MVT::i8 , Expand); |
| 164 | setOperationAction(ISD::CTTZ , MVT::i8 , Expand); |
| 165 | setOperationAction(ISD::CTLZ , MVT::i8 , Expand); |
| 166 | setOperationAction(ISD::CTPOP , MVT::i16 , Expand); |
| 167 | setOperationAction(ISD::CTTZ , MVT::i16 , Expand); |
| 168 | setOperationAction(ISD::CTLZ , MVT::i16 , Expand); |
| 169 | setOperationAction(ISD::CTPOP , MVT::i32 , Expand); |
| 170 | setOperationAction(ISD::CTTZ , MVT::i32 , Expand); |
| 171 | setOperationAction(ISD::CTLZ , MVT::i32 , Expand); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 172 | if (Subtarget->is64Bit()) { |
| 173 | setOperationAction(ISD::CTPOP , MVT::i64 , Expand); |
| 174 | setOperationAction(ISD::CTTZ , MVT::i64 , Expand); |
| 175 | setOperationAction(ISD::CTLZ , MVT::i64 , Expand); |
| 176 | } |
| 177 | |
Andrew Lenharth | b873ff3 | 2005-11-20 21:41:10 +0000 | [diff] [blame] | 178 | setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom); |
Nate Begeman | d88fc03 | 2006-01-14 03:14:10 +0000 | [diff] [blame] | 179 | setOperationAction(ISD::BSWAP , MVT::i16 , Expand); |
Nate Begeman | 35ef913 | 2006-01-11 21:21:00 +0000 | [diff] [blame] | 180 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 181 | // These should be promoted to a larger select which is supported. |
| 182 | setOperationAction(ISD::SELECT , MVT::i1 , Promote); |
| 183 | setOperationAction(ISD::SELECT , MVT::i8 , Promote); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 184 | // X86 wants to expand cmov itself. |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 185 | setOperationAction(ISD::SELECT , MVT::i16 , Custom); |
| 186 | setOperationAction(ISD::SELECT , MVT::i32 , Custom); |
| 187 | setOperationAction(ISD::SELECT , MVT::f32 , Custom); |
| 188 | setOperationAction(ISD::SELECT , MVT::f64 , Custom); |
| 189 | setOperationAction(ISD::SETCC , MVT::i8 , Custom); |
| 190 | setOperationAction(ISD::SETCC , MVT::i16 , Custom); |
| 191 | setOperationAction(ISD::SETCC , MVT::i32 , Custom); |
| 192 | setOperationAction(ISD::SETCC , MVT::f32 , Custom); |
| 193 | setOperationAction(ISD::SETCC , MVT::f64 , Custom); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 194 | if (Subtarget->is64Bit()) { |
| 195 | setOperationAction(ISD::SELECT , MVT::i64 , Custom); |
| 196 | setOperationAction(ISD::SETCC , MVT::i64 , Custom); |
| 197 | } |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 198 | // X86 ret instruction may pop stack. |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 199 | setOperationAction(ISD::RET , MVT::Other, Custom); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 200 | // Darwin ABI issue. |
Evan Cheng | 7ccced6 | 2006-02-18 00:15:05 +0000 | [diff] [blame] | 201 | setOperationAction(ISD::ConstantPool , MVT::i32 , Custom); |
Nate Begeman | 37efe67 | 2006-04-22 18:53:45 +0000 | [diff] [blame] | 202 | setOperationAction(ISD::JumpTable , MVT::i32 , Custom); |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 203 | setOperationAction(ISD::GlobalAddress , MVT::i32 , Custom); |
Lauro Ramos Venancio | b3a0417 | 2007-04-20 21:38:10 +0000 | [diff] [blame] | 204 | setOperationAction(ISD::GlobalTLSAddress, MVT::i32 , Custom); |
Evan Cheng | 020d2e8 | 2006-02-23 20:41:18 +0000 | [diff] [blame] | 205 | setOperationAction(ISD::ExternalSymbol , MVT::i32 , Custom); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 206 | if (Subtarget->is64Bit()) { |
| 207 | setOperationAction(ISD::ConstantPool , MVT::i64 , Custom); |
| 208 | setOperationAction(ISD::JumpTable , MVT::i64 , Custom); |
| 209 | setOperationAction(ISD::GlobalAddress , MVT::i64 , Custom); |
| 210 | setOperationAction(ISD::ExternalSymbol, MVT::i64 , Custom); |
| 211 | } |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 212 | // 64-bit addm sub, shl, sra, srl (iff 32-bit x86) |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 213 | setOperationAction(ISD::SHL_PARTS , MVT::i32 , Custom); |
| 214 | setOperationAction(ISD::SRA_PARTS , MVT::i32 , Custom); |
| 215 | setOperationAction(ISD::SRL_PARTS , MVT::i32 , Custom); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 216 | // X86 wants to expand memset / memcpy itself. |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 217 | setOperationAction(ISD::MEMSET , MVT::Other, Custom); |
| 218 | setOperationAction(ISD::MEMCPY , MVT::Other, Custom); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 219 | |
Chris Lattner | f73bae1 | 2005-11-29 06:16:21 +0000 | [diff] [blame] | 220 | // We don't have line number support yet. |
| 221 | setOperationAction(ISD::LOCATION, MVT::Other, Expand); |
Jim Laskey | e0bce71 | 2006-01-05 01:47:43 +0000 | [diff] [blame] | 222 | setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); |
Evan Cheng | 3c992d2 | 2006-03-07 02:02:57 +0000 | [diff] [blame] | 223 | // FIXME - use subtarget debug flags |
Anton Korobeynikov | ab4022f | 2006-10-31 08:31:24 +0000 | [diff] [blame] | 224 | if (!Subtarget->isTargetDarwin() && |
| 225 | !Subtarget->isTargetELF() && |
Anton Korobeynikov | 317848f | 2007-01-03 11:43:14 +0000 | [diff] [blame] | 226 | !Subtarget->isTargetCygMing()) |
Jim Laskey | 1ee2925 | 2007-01-26 14:34:52 +0000 | [diff] [blame] | 227 | setOperationAction(ISD::LABEL, MVT::Other, Expand); |
Chris Lattner | f73bae1 | 2005-11-29 06:16:21 +0000 | [diff] [blame] | 228 | |
Anton Korobeynikov | ce3b465 | 2007-05-02 19:53:33 +0000 | [diff] [blame] | 229 | setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand); |
| 230 | setOperationAction(ISD::EHSELECTION, MVT::i64, Expand); |
| 231 | setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); |
| 232 | setOperationAction(ISD::EHSELECTION, MVT::i32, Expand); |
| 233 | if (Subtarget->is64Bit()) { |
| 234 | // FIXME: Verify |
| 235 | setExceptionPointerRegister(X86::RAX); |
| 236 | setExceptionSelectorRegister(X86::RDX); |
| 237 | } else { |
| 238 | setExceptionPointerRegister(X86::EAX); |
| 239 | setExceptionSelectorRegister(X86::EDX); |
| 240 | } |
| 241 | |
Nate Begeman | acc398c | 2006-01-25 18:21:52 +0000 | [diff] [blame] | 242 | // VASTART needs to be custom lowered to use the VarArgsFrameIndex |
| 243 | setOperationAction(ISD::VASTART , MVT::Other, Custom); |
Nate Begeman | acc398c | 2006-01-25 18:21:52 +0000 | [diff] [blame] | 244 | setOperationAction(ISD::VAARG , MVT::Other, Expand); |
Nate Begeman | acc398c | 2006-01-25 18:21:52 +0000 | [diff] [blame] | 245 | setOperationAction(ISD::VAEND , MVT::Other, Expand); |
Evan Cheng | ae64219 | 2007-03-02 23:16:35 +0000 | [diff] [blame] | 246 | if (Subtarget->is64Bit()) |
| 247 | setOperationAction(ISD::VACOPY , MVT::Other, Custom); |
| 248 | else |
| 249 | setOperationAction(ISD::VACOPY , MVT::Other, Expand); |
| 250 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 251 | setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); |
Chris Lattner | e112552 | 2006-01-15 09:00:21 +0000 | [diff] [blame] | 252 | setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 253 | if (Subtarget->is64Bit()) |
| 254 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); |
Anton Korobeynikov | 57fc00d | 2007-04-17 09:20:00 +0000 | [diff] [blame] | 255 | if (Subtarget->isTargetCygMing()) |
| 256 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Custom); |
| 257 | else |
| 258 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32, Expand); |
Chris Lattner | b99329e | 2006-01-13 02:42:53 +0000 | [diff] [blame] | 259 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 260 | if (X86ScalarSSE) { |
| 261 | // Set up the FP register classes. |
Evan Cheng | 5ee4ccc | 2006-01-12 08:27:59 +0000 | [diff] [blame] | 262 | addRegisterClass(MVT::f32, X86::FR32RegisterClass); |
| 263 | addRegisterClass(MVT::f64, X86::FR64RegisterClass); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 264 | |
Evan Cheng | 223547a | 2006-01-31 22:28:30 +0000 | [diff] [blame] | 265 | // Use ANDPD to simulate FABS. |
| 266 | setOperationAction(ISD::FABS , MVT::f64, Custom); |
| 267 | setOperationAction(ISD::FABS , MVT::f32, Custom); |
| 268 | |
| 269 | // Use XORP to simulate FNEG. |
| 270 | setOperationAction(ISD::FNEG , MVT::f64, Custom); |
| 271 | setOperationAction(ISD::FNEG , MVT::f32, Custom); |
| 272 | |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 273 | // Use ANDPD and ORPD to simulate FCOPYSIGN. |
| 274 | setOperationAction(ISD::FCOPYSIGN, MVT::f64, Custom); |
| 275 | setOperationAction(ISD::FCOPYSIGN, MVT::f32, Custom); |
| 276 | |
Evan Cheng | d25e9e8 | 2006-02-02 00:28:23 +0000 | [diff] [blame] | 277 | // We don't support sin/cos/fmod |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 278 | setOperationAction(ISD::FSIN , MVT::f64, Expand); |
| 279 | setOperationAction(ISD::FCOS , MVT::f64, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 280 | setOperationAction(ISD::FREM , MVT::f64, Expand); |
| 281 | setOperationAction(ISD::FSIN , MVT::f32, Expand); |
| 282 | setOperationAction(ISD::FCOS , MVT::f32, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 283 | setOperationAction(ISD::FREM , MVT::f32, Expand); |
| 284 | |
Chris Lattner | a54aa94 | 2006-01-29 06:26:08 +0000 | [diff] [blame] | 285 | // Expand FP immediates into loads from the stack, except for the special |
| 286 | // cases we handle. |
| 287 | setOperationAction(ISD::ConstantFP, MVT::f64, Expand); |
| 288 | setOperationAction(ISD::ConstantFP, MVT::f32, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 289 | addLegalFPImmediate(+0.0); // xorps / xorpd |
| 290 | } else { |
| 291 | // Set up the FP register classes. |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 292 | addRegisterClass(MVT::f64, X86::RFP64RegisterClass); |
| 293 | addRegisterClass(MVT::f32, X86::RFP32RegisterClass); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 294 | |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 295 | setOperationAction(ISD::UNDEF, MVT::f64, Expand); |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 296 | setOperationAction(ISD::UNDEF, MVT::f32, Expand); |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 297 | setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); |
| 298 | setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 299 | setOperationAction(ISD::FP_ROUND, MVT::f32, Expand); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 300 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 301 | if (!UnsafeFPMath) { |
| 302 | setOperationAction(ISD::FSIN , MVT::f64 , Expand); |
| 303 | setOperationAction(ISD::FCOS , MVT::f64 , Expand); |
| 304 | } |
| 305 | |
Chris Lattner | a54aa94 | 2006-01-29 06:26:08 +0000 | [diff] [blame] | 306 | setOperationAction(ISD::ConstantFP, MVT::f64, Expand); |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 307 | setOperationAction(ISD::ConstantFP, MVT::f32, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 308 | addLegalFPImmediate(+0.0); // FLD0 |
| 309 | addLegalFPImmediate(+1.0); // FLD1 |
| 310 | addLegalFPImmediate(-0.0); // FLD0/FCHS |
| 311 | addLegalFPImmediate(-1.0); // FLD1/FCHS |
| 312 | } |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 313 | |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 314 | // First set operation action for all vector types to expand. Then we |
| 315 | // will selectively turn on ones that can be effectively codegen'd. |
Dan Gohman | fa0f77d | 2007-05-18 18:44:07 +0000 | [diff] [blame] | 316 | for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; |
| 317 | VT <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++VT) { |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 318 | setOperationAction(ISD::ADD , (MVT::ValueType)VT, Expand); |
| 319 | setOperationAction(ISD::SUB , (MVT::ValueType)VT, Expand); |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 320 | setOperationAction(ISD::FADD, (MVT::ValueType)VT, Expand); |
Evan Cheng | a72cb0e | 2007-06-29 00:18:15 +0000 | [diff] [blame] | 321 | setOperationAction(ISD::FNEG, (MVT::ValueType)VT, Expand); |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 322 | setOperationAction(ISD::FSUB, (MVT::ValueType)VT, Expand); |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 323 | setOperationAction(ISD::MUL , (MVT::ValueType)VT, Expand); |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 324 | setOperationAction(ISD::FMUL, (MVT::ValueType)VT, Expand); |
| 325 | setOperationAction(ISD::SDIV, (MVT::ValueType)VT, Expand); |
| 326 | setOperationAction(ISD::UDIV, (MVT::ValueType)VT, Expand); |
| 327 | setOperationAction(ISD::FDIV, (MVT::ValueType)VT, Expand); |
| 328 | setOperationAction(ISD::SREM, (MVT::ValueType)VT, Expand); |
| 329 | setOperationAction(ISD::UREM, (MVT::ValueType)VT, Expand); |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 330 | setOperationAction(ISD::LOAD, (MVT::ValueType)VT, Expand); |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 331 | setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Expand); |
Chris Lattner | 9b3bd46 | 2006-03-21 20:51:05 +0000 | [diff] [blame] | 332 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Expand); |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 333 | setOperationAction(ISD::INSERT_VECTOR_ELT, (MVT::ValueType)VT, Expand); |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 334 | } |
| 335 | |
Evan Cheng | a88973f | 2006-03-22 19:22:18 +0000 | [diff] [blame] | 336 | if (Subtarget->hasMMX()) { |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 337 | addRegisterClass(MVT::v8i8, X86::VR64RegisterClass); |
| 338 | addRegisterClass(MVT::v4i16, X86::VR64RegisterClass); |
| 339 | addRegisterClass(MVT::v2i32, X86::VR64RegisterClass); |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 340 | addRegisterClass(MVT::v1i64, X86::VR64RegisterClass); |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 341 | |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 342 | // FIXME: add MMX packed arithmetics |
Bill Wendling | bc9bffa | 2007-03-07 05:43:18 +0000 | [diff] [blame] | 343 | |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 344 | setOperationAction(ISD::ADD, MVT::v8i8, Legal); |
| 345 | setOperationAction(ISD::ADD, MVT::v4i16, Legal); |
| 346 | setOperationAction(ISD::ADD, MVT::v2i32, Legal); |
Chris Lattner | 6c284d7 | 2007-04-12 04:14:49 +0000 | [diff] [blame] | 347 | setOperationAction(ISD::ADD, MVT::v1i64, Legal); |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 348 | |
Bill Wendling | c1fb047 | 2007-03-10 09:57:05 +0000 | [diff] [blame] | 349 | setOperationAction(ISD::SUB, MVT::v8i8, Legal); |
| 350 | setOperationAction(ISD::SUB, MVT::v4i16, Legal); |
| 351 | setOperationAction(ISD::SUB, MVT::v2i32, Legal); |
| 352 | |
Bill Wendling | 74027e9 | 2007-03-15 21:24:36 +0000 | [diff] [blame] | 353 | setOperationAction(ISD::MULHS, MVT::v4i16, Legal); |
| 354 | setOperationAction(ISD::MUL, MVT::v4i16, Legal); |
| 355 | |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 356 | setOperationAction(ISD::AND, MVT::v8i8, Promote); |
Bill Wendling | ab5b49d | 2007-03-26 08:03:33 +0000 | [diff] [blame] | 357 | AddPromotedToType (ISD::AND, MVT::v8i8, MVT::v1i64); |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 358 | setOperationAction(ISD::AND, MVT::v4i16, Promote); |
Bill Wendling | ab5b49d | 2007-03-26 08:03:33 +0000 | [diff] [blame] | 359 | AddPromotedToType (ISD::AND, MVT::v4i16, MVT::v1i64); |
| 360 | setOperationAction(ISD::AND, MVT::v2i32, Promote); |
| 361 | AddPromotedToType (ISD::AND, MVT::v2i32, MVT::v1i64); |
| 362 | setOperationAction(ISD::AND, MVT::v1i64, Legal); |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 363 | |
| 364 | setOperationAction(ISD::OR, MVT::v8i8, Promote); |
Bill Wendling | ab5b49d | 2007-03-26 08:03:33 +0000 | [diff] [blame] | 365 | AddPromotedToType (ISD::OR, MVT::v8i8, MVT::v1i64); |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 366 | setOperationAction(ISD::OR, MVT::v4i16, Promote); |
Bill Wendling | ab5b49d | 2007-03-26 08:03:33 +0000 | [diff] [blame] | 367 | AddPromotedToType (ISD::OR, MVT::v4i16, MVT::v1i64); |
| 368 | setOperationAction(ISD::OR, MVT::v2i32, Promote); |
| 369 | AddPromotedToType (ISD::OR, MVT::v2i32, MVT::v1i64); |
| 370 | setOperationAction(ISD::OR, MVT::v1i64, Legal); |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 371 | |
| 372 | setOperationAction(ISD::XOR, MVT::v8i8, Promote); |
Bill Wendling | ab5b49d | 2007-03-26 08:03:33 +0000 | [diff] [blame] | 373 | AddPromotedToType (ISD::XOR, MVT::v8i8, MVT::v1i64); |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 374 | setOperationAction(ISD::XOR, MVT::v4i16, Promote); |
Bill Wendling | ab5b49d | 2007-03-26 08:03:33 +0000 | [diff] [blame] | 375 | AddPromotedToType (ISD::XOR, MVT::v4i16, MVT::v1i64); |
| 376 | setOperationAction(ISD::XOR, MVT::v2i32, Promote); |
| 377 | AddPromotedToType (ISD::XOR, MVT::v2i32, MVT::v1i64); |
| 378 | setOperationAction(ISD::XOR, MVT::v1i64, Legal); |
Bill Wendling | 1b7a81d | 2007-03-16 09:44:46 +0000 | [diff] [blame] | 379 | |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 380 | setOperationAction(ISD::LOAD, MVT::v8i8, Promote); |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 381 | AddPromotedToType (ISD::LOAD, MVT::v8i8, MVT::v1i64); |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 382 | setOperationAction(ISD::LOAD, MVT::v4i16, Promote); |
Bill Wendling | eebc8a1 | 2007-03-26 07:53:08 +0000 | [diff] [blame] | 383 | AddPromotedToType (ISD::LOAD, MVT::v4i16, MVT::v1i64); |
| 384 | setOperationAction(ISD::LOAD, MVT::v2i32, Promote); |
| 385 | AddPromotedToType (ISD::LOAD, MVT::v2i32, MVT::v1i64); |
| 386 | setOperationAction(ISD::LOAD, MVT::v1i64, Legal); |
Bill Wendling | 2f88dcd | 2007-03-08 22:09:11 +0000 | [diff] [blame] | 387 | |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 388 | setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Custom); |
| 389 | setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Custom); |
| 390 | setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Custom); |
| 391 | setOperationAction(ISD::BUILD_VECTOR, MVT::v1i64, Custom); |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 392 | |
| 393 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i8, Custom); |
| 394 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i16, Custom); |
| 395 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i32, Custom); |
Bill Wendling | ccc44ad | 2007-03-27 20:22:40 +0000 | [diff] [blame] | 396 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v1i64, Custom); |
Bill Wendling | 826f36f | 2007-03-28 00:57:11 +0000 | [diff] [blame] | 397 | |
| 398 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i8, Custom); |
| 399 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i16, Custom); |
Bill Wendling | 2f9bb1a | 2007-04-24 21:16:55 +0000 | [diff] [blame] | 400 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2i32, Custom); |
| 401 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v1i64, Custom); |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 402 | } |
| 403 | |
Evan Cheng | a88973f | 2006-03-22 19:22:18 +0000 | [diff] [blame] | 404 | if (Subtarget->hasSSE1()) { |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 405 | addRegisterClass(MVT::v4f32, X86::VR128RegisterClass); |
| 406 | |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 407 | setOperationAction(ISD::FADD, MVT::v4f32, Legal); |
| 408 | setOperationAction(ISD::FSUB, MVT::v4f32, Legal); |
| 409 | setOperationAction(ISD::FMUL, MVT::v4f32, Legal); |
| 410 | setOperationAction(ISD::FDIV, MVT::v4f32, Legal); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 411 | setOperationAction(ISD::LOAD, MVT::v4f32, Legal); |
| 412 | setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom); |
| 413 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f32, Custom); |
Evan Cheng | 11e15b3 | 2006-04-03 20:53:28 +0000 | [diff] [blame] | 414 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 415 | setOperationAction(ISD::SELECT, MVT::v4f32, Custom); |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 416 | } |
| 417 | |
Evan Cheng | a88973f | 2006-03-22 19:22:18 +0000 | [diff] [blame] | 418 | if (Subtarget->hasSSE2()) { |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 419 | addRegisterClass(MVT::v2f64, X86::VR128RegisterClass); |
| 420 | addRegisterClass(MVT::v16i8, X86::VR128RegisterClass); |
| 421 | addRegisterClass(MVT::v8i16, X86::VR128RegisterClass); |
| 422 | addRegisterClass(MVT::v4i32, X86::VR128RegisterClass); |
| 423 | addRegisterClass(MVT::v2i64, X86::VR128RegisterClass); |
| 424 | |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 425 | setOperationAction(ISD::ADD, MVT::v16i8, Legal); |
| 426 | setOperationAction(ISD::ADD, MVT::v8i16, Legal); |
| 427 | setOperationAction(ISD::ADD, MVT::v4i32, Legal); |
Evan Cheng | 37e8856 | 2007-03-12 22:58:52 +0000 | [diff] [blame] | 428 | setOperationAction(ISD::ADD, MVT::v2i64, Legal); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 429 | setOperationAction(ISD::SUB, MVT::v16i8, Legal); |
| 430 | setOperationAction(ISD::SUB, MVT::v8i16, Legal); |
| 431 | setOperationAction(ISD::SUB, MVT::v4i32, Legal); |
Evan Cheng | 37e8856 | 2007-03-12 22:58:52 +0000 | [diff] [blame] | 432 | setOperationAction(ISD::SUB, MVT::v2i64, Legal); |
Evan Cheng | f998984 | 2006-04-13 05:10:25 +0000 | [diff] [blame] | 433 | setOperationAction(ISD::MUL, MVT::v8i16, Legal); |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 434 | setOperationAction(ISD::FADD, MVT::v2f64, Legal); |
| 435 | setOperationAction(ISD::FSUB, MVT::v2f64, Legal); |
| 436 | setOperationAction(ISD::FMUL, MVT::v2f64, Legal); |
| 437 | setOperationAction(ISD::FDIV, MVT::v2f64, Legal); |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 438 | |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 439 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Custom); |
| 440 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Custom); |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 441 | setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom); |
Evan Cheng | 5edb8d2 | 2006-04-17 22:04:06 +0000 | [diff] [blame] | 442 | setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom); |
| 443 | // Implement v4f32 insert_vector_elt in terms of SSE2 v8i16 ones. |
| 444 | setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 445 | |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 446 | // Custom lower build_vector, vector_shuffle, and extract_vector_elt. |
| 447 | for (unsigned VT = (unsigned)MVT::v16i8; VT != (unsigned)MVT::v2i64; VT++) { |
| 448 | setOperationAction(ISD::BUILD_VECTOR, (MVT::ValueType)VT, Custom); |
| 449 | setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Custom); |
| 450 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Custom); |
| 451 | } |
| 452 | setOperationAction(ISD::BUILD_VECTOR, MVT::v2f64, Custom); |
| 453 | setOperationAction(ISD::BUILD_VECTOR, MVT::v2i64, Custom); |
| 454 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Custom); |
| 455 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Custom); |
| 456 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Custom); |
| 457 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Custom); |
| 458 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 459 | // Promote v16i8, v8i16, v4i32 load, select, and, or, xor to v2i64. |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 460 | for (unsigned VT = (unsigned)MVT::v16i8; VT != (unsigned)MVT::v2i64; VT++) { |
| 461 | setOperationAction(ISD::AND, (MVT::ValueType)VT, Promote); |
| 462 | AddPromotedToType (ISD::AND, (MVT::ValueType)VT, MVT::v2i64); |
| 463 | setOperationAction(ISD::OR, (MVT::ValueType)VT, Promote); |
| 464 | AddPromotedToType (ISD::OR, (MVT::ValueType)VT, MVT::v2i64); |
| 465 | setOperationAction(ISD::XOR, (MVT::ValueType)VT, Promote); |
| 466 | AddPromotedToType (ISD::XOR, (MVT::ValueType)VT, MVT::v2i64); |
Evan Cheng | 91b740d | 2006-04-12 17:12:36 +0000 | [diff] [blame] | 467 | setOperationAction(ISD::LOAD, (MVT::ValueType)VT, Promote); |
| 468 | AddPromotedToType (ISD::LOAD, (MVT::ValueType)VT, MVT::v2i64); |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 469 | setOperationAction(ISD::SELECT, (MVT::ValueType)VT, Promote); |
| 470 | AddPromotedToType (ISD::SELECT, (MVT::ValueType)VT, MVT::v2i64); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 471 | } |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 472 | |
| 473 | // Custom lower v2i64 and v2f64 selects. |
| 474 | setOperationAction(ISD::LOAD, MVT::v2f64, Legal); |
Evan Cheng | 91b740d | 2006-04-12 17:12:36 +0000 | [diff] [blame] | 475 | setOperationAction(ISD::LOAD, MVT::v2i64, Legal); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 476 | setOperationAction(ISD::SELECT, MVT::v2f64, Custom); |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 477 | setOperationAction(ISD::SELECT, MVT::v2i64, Custom); |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 478 | } |
| 479 | |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 480 | // We want to custom lower some of our intrinsics. |
| 481 | setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); |
| 482 | |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 483 | // We have target-specific dag combine patterns for the following nodes: |
| 484 | setTargetDAGCombine(ISD::VECTOR_SHUFFLE); |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 485 | setTargetDAGCombine(ISD::SELECT); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 486 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 487 | computeRegisterProperties(); |
| 488 | |
Evan Cheng | 87ed716 | 2006-02-14 08:25:08 +0000 | [diff] [blame] | 489 | // FIXME: These should be based on subtarget info. Plus, the values should |
| 490 | // be smaller when we are in optimizing for size mode. |
Evan Cheng | a03a5dc | 2006-02-14 08:38:30 +0000 | [diff] [blame] | 491 | maxStoresPerMemset = 16; // For %llvm.memset -> sequence of stores |
| 492 | maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores |
| 493 | maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of stores |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 494 | allowUnalignedMemoryAccesses = true; // x86 supports it! |
| 495 | } |
| 496 | |
Chris Lattner | 2b02a44 | 2007-02-25 08:29:00 +0000 | [diff] [blame] | 497 | |
| 498 | //===----------------------------------------------------------------------===// |
| 499 | // Return Value Calling Convention Implementation |
| 500 | //===----------------------------------------------------------------------===// |
| 501 | |
Chris Lattner | 59ed56b | 2007-02-28 04:55:35 +0000 | [diff] [blame] | 502 | #include "X86GenCallingConv.inc" |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 503 | |
Chris Lattner | 2a9bdd7 | 2007-02-25 09:12:39 +0000 | [diff] [blame] | 504 | /// LowerRET - Lower an ISD::RET node. |
| 505 | SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) { |
| 506 | assert((Op.getNumOperands() & 1) == 1 && "ISD::RET should have odd # args"); |
| 507 | |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 508 | SmallVector<CCValAssign, 16> RVLocs; |
| 509 | unsigned CC = DAG.getMachineFunction().getFunction()->getCallingConv(); |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 510 | bool isVarArg = DAG.getMachineFunction().getFunction()->isVarArg(); |
| 511 | CCState CCInfo(CC, isVarArg, getTargetMachine(), RVLocs); |
Chris Lattner | e32bbf6 | 2007-02-28 07:09:55 +0000 | [diff] [blame] | 512 | CCInfo.AnalyzeReturn(Op.Val, RetCC_X86); |
Chris Lattner | 2a9bdd7 | 2007-02-25 09:12:39 +0000 | [diff] [blame] | 513 | |
Chris Lattner | 2a9bdd7 | 2007-02-25 09:12:39 +0000 | [diff] [blame] | 514 | |
| 515 | // If this is the first return lowered for this function, add the regs to the |
| 516 | // liveout set for the function. |
| 517 | if (DAG.getMachineFunction().liveout_empty()) { |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 518 | for (unsigned i = 0; i != RVLocs.size(); ++i) |
| 519 | if (RVLocs[i].isRegLoc()) |
| 520 | DAG.getMachineFunction().addLiveOut(RVLocs[i].getLocReg()); |
Chris Lattner | 2a9bdd7 | 2007-02-25 09:12:39 +0000 | [diff] [blame] | 521 | } |
| 522 | |
| 523 | SDOperand Chain = Op.getOperand(0); |
| 524 | SDOperand Flag; |
| 525 | |
| 526 | // Copy the result values into the output registers. |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 527 | if (RVLocs.size() != 1 || !RVLocs[0].isRegLoc() || |
| 528 | RVLocs[0].getLocReg() != X86::ST0) { |
| 529 | for (unsigned i = 0; i != RVLocs.size(); ++i) { |
| 530 | CCValAssign &VA = RVLocs[i]; |
| 531 | assert(VA.isRegLoc() && "Can only return in registers!"); |
| 532 | Chain = DAG.getCopyToReg(Chain, VA.getLocReg(), Op.getOperand(i*2+1), |
| 533 | Flag); |
Chris Lattner | 2a9bdd7 | 2007-02-25 09:12:39 +0000 | [diff] [blame] | 534 | Flag = Chain.getValue(1); |
| 535 | } |
| 536 | } else { |
| 537 | // We need to handle a destination of ST0 specially, because it isn't really |
| 538 | // a register. |
| 539 | SDOperand Value = Op.getOperand(1); |
| 540 | |
| 541 | // If this is an FP return with ScalarSSE, we need to move the value from |
| 542 | // an XMM register onto the fp-stack. |
| 543 | if (X86ScalarSSE) { |
| 544 | SDOperand MemLoc; |
| 545 | |
| 546 | // If this is a load into a scalarsse value, don't store the loaded value |
| 547 | // back to the stack, only to reload it: just replace the scalar-sse load. |
| 548 | if (ISD::isNON_EXTLoad(Value.Val) && |
| 549 | (Chain == Value.getValue(1) || Chain == Value.getOperand(0))) { |
| 550 | Chain = Value.getOperand(0); |
| 551 | MemLoc = Value.getOperand(1); |
| 552 | } else { |
| 553 | // Spill the value to memory and reload it into top of stack. |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 554 | unsigned Size = MVT::getSizeInBits(RVLocs[0].getValVT())/8; |
Chris Lattner | 2a9bdd7 | 2007-02-25 09:12:39 +0000 | [diff] [blame] | 555 | MachineFunction &MF = DAG.getMachineFunction(); |
| 556 | int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); |
| 557 | MemLoc = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 558 | Chain = DAG.getStore(Op.getOperand(0), Value, MemLoc, NULL, 0); |
| 559 | } |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 560 | SDVTList Tys = DAG.getVTList(RVLocs[0].getValVT(), MVT::Other); |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 561 | SDOperand Ops[] = {Chain, MemLoc, DAG.getValueType(RVLocs[0].getValVT())}; |
Chris Lattner | 2a9bdd7 | 2007-02-25 09:12:39 +0000 | [diff] [blame] | 562 | Value = DAG.getNode(X86ISD::FLD, Tys, Ops, 3); |
| 563 | Chain = Value.getValue(1); |
| 564 | } |
| 565 | |
| 566 | SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); |
| 567 | SDOperand Ops[] = { Chain, Value }; |
| 568 | Chain = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, Ops, 2); |
| 569 | Flag = Chain.getValue(1); |
| 570 | } |
| 571 | |
| 572 | SDOperand BytesToPop = DAG.getConstant(getBytesToPopOnReturn(), MVT::i16); |
| 573 | if (Flag.Val) |
| 574 | return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Chain, BytesToPop, Flag); |
| 575 | else |
| 576 | return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Chain, BytesToPop); |
| 577 | } |
| 578 | |
| 579 | |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 580 | /// LowerCallResult - Lower the result values of an ISD::CALL into the |
| 581 | /// appropriate copies out of appropriate physical registers. This assumes that |
| 582 | /// Chain/InFlag are the input chain/flag to use, and that TheCall is the call |
| 583 | /// being lowered. The returns a SDNode with the same number of values as the |
| 584 | /// ISD::CALL. |
| 585 | SDNode *X86TargetLowering:: |
| 586 | LowerCallResult(SDOperand Chain, SDOperand InFlag, SDNode *TheCall, |
| 587 | unsigned CallingConv, SelectionDAG &DAG) { |
Chris Lattner | e32bbf6 | 2007-02-28 07:09:55 +0000 | [diff] [blame] | 588 | |
| 589 | // Assign locations to each value returned by this call. |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 590 | SmallVector<CCValAssign, 16> RVLocs; |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 591 | bool isVarArg = cast<ConstantSDNode>(TheCall->getOperand(2))->getValue() != 0; |
| 592 | CCState CCInfo(CallingConv, isVarArg, getTargetMachine(), RVLocs); |
Chris Lattner | e32bbf6 | 2007-02-28 07:09:55 +0000 | [diff] [blame] | 593 | CCInfo.AnalyzeCallResult(TheCall, RetCC_X86); |
| 594 | |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 595 | |
Chris Lattner | e32bbf6 | 2007-02-28 07:09:55 +0000 | [diff] [blame] | 596 | SmallVector<SDOperand, 8> ResultVals; |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 597 | |
| 598 | // Copy all of the result registers out of their specified physreg. |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 599 | if (RVLocs.size() != 1 || RVLocs[0].getLocReg() != X86::ST0) { |
| 600 | for (unsigned i = 0; i != RVLocs.size(); ++i) { |
| 601 | Chain = DAG.getCopyFromReg(Chain, RVLocs[i].getLocReg(), |
| 602 | RVLocs[i].getValVT(), InFlag).getValue(1); |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 603 | InFlag = Chain.getValue(2); |
| 604 | ResultVals.push_back(Chain.getValue(0)); |
| 605 | } |
| 606 | } else { |
| 607 | // Copies from the FP stack are special, as ST0 isn't a valid register |
| 608 | // before the fp stackifier runs. |
| 609 | |
| 610 | // Copy ST0 into an RFP register with FP_GET_RESULT. |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 611 | SDVTList Tys = DAG.getVTList(RVLocs[0].getValVT(), MVT::Other, MVT::Flag); |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 612 | SDOperand GROps[] = { Chain, InFlag }; |
| 613 | SDOperand RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, GROps, 2); |
| 614 | Chain = RetVal.getValue(1); |
| 615 | InFlag = RetVal.getValue(2); |
| 616 | |
| 617 | // If we are using ScalarSSE, store ST(0) to the stack and reload it into |
| 618 | // an XMM register. |
| 619 | if (X86ScalarSSE) { |
| 620 | // FIXME: Currently the FST is flagged to the FP_GET_RESULT. This |
| 621 | // shouldn't be necessary except that RFP cannot be live across |
| 622 | // multiple blocks. When stackifier is fixed, they can be uncoupled. |
| 623 | MachineFunction &MF = DAG.getMachineFunction(); |
| 624 | int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); |
| 625 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 626 | SDOperand Ops[] = { |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 627 | Chain, RetVal, StackSlot, DAG.getValueType(RVLocs[0].getValVT()), InFlag |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 628 | }; |
| 629 | Chain = DAG.getNode(X86ISD::FST, MVT::Other, Ops, 5); |
Chris Lattner | 9774c91 | 2007-02-27 05:28:59 +0000 | [diff] [blame] | 630 | RetVal = DAG.getLoad(RVLocs[0].getValVT(), Chain, StackSlot, NULL, 0); |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 631 | Chain = RetVal.getValue(1); |
| 632 | } |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 633 | ResultVals.push_back(RetVal); |
| 634 | } |
| 635 | |
| 636 | // Merge everything together with a MERGE_VALUES node. |
| 637 | ResultVals.push_back(Chain); |
| 638 | return DAG.getNode(ISD::MERGE_VALUES, TheCall->getVTList(), |
| 639 | &ResultVals[0], ResultVals.size()).Val; |
Chris Lattner | 2b02a44 | 2007-02-25 08:29:00 +0000 | [diff] [blame] | 640 | } |
| 641 | |
| 642 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 643 | //===----------------------------------------------------------------------===// |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 644 | // C & StdCall Calling Convention implementation |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 645 | //===----------------------------------------------------------------------===// |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 646 | // StdCall calling convention seems to be standard for many Windows' API |
| 647 | // routines and around. It differs from C calling convention just a little: |
| 648 | // callee should clean up the stack, not caller. Symbols should be also |
| 649 | // decorated in some fancy way :) It doesn't support any vector arguments. |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 650 | |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 651 | /// AddLiveIn - This helper function adds the specified physical register to the |
| 652 | /// MachineFunction as a live in value. It also creates a corresponding virtual |
| 653 | /// register for it. |
| 654 | static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg, |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 655 | const TargetRegisterClass *RC) { |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 656 | assert(RC->contains(PReg) && "Not the correct regclass!"); |
| 657 | unsigned VReg = MF.getSSARegMap()->createVirtualRegister(RC); |
| 658 | MF.addLiveIn(PReg, VReg); |
| 659 | return VReg; |
| 660 | } |
| 661 | |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 662 | SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG, |
| 663 | bool isStdCall) { |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 664 | unsigned NumArgs = Op.Val->getNumValues() - 1; |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 665 | MachineFunction &MF = DAG.getMachineFunction(); |
| 666 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 667 | SDOperand Root = Op.getOperand(0); |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 668 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 669 | |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 670 | // Assign locations to all of the incoming arguments. |
Chris Lattner | f39f771 | 2007-02-28 05:46:49 +0000 | [diff] [blame] | 671 | SmallVector<CCValAssign, 16> ArgLocs; |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 672 | CCState CCInfo(MF.getFunction()->getCallingConv(), isVarArg, |
| 673 | getTargetMachine(), ArgLocs); |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 674 | CCInfo.AnalyzeFormalArguments(Op.Val, CC_X86_32_C); |
| 675 | |
Chris Lattner | f39f771 | 2007-02-28 05:46:49 +0000 | [diff] [blame] | 676 | SmallVector<SDOperand, 8> ArgValues; |
| 677 | unsigned LastVal = ~0U; |
| 678 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
| 679 | CCValAssign &VA = ArgLocs[i]; |
| 680 | // TODO: If an arg is passed in two places (e.g. reg and stack), skip later |
| 681 | // places. |
| 682 | assert(VA.getValNo() != LastVal && |
| 683 | "Don't support value assigned to multiple locs yet"); |
| 684 | LastVal = VA.getValNo(); |
| 685 | |
| 686 | if (VA.isRegLoc()) { |
| 687 | MVT::ValueType RegVT = VA.getLocVT(); |
| 688 | TargetRegisterClass *RC; |
| 689 | if (RegVT == MVT::i32) |
| 690 | RC = X86::GR32RegisterClass; |
| 691 | else { |
| 692 | assert(MVT::isVector(RegVT)); |
| 693 | RC = X86::VR128RegisterClass; |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 694 | } |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 695 | |
Chris Lattner | 82932a5 | 2007-03-02 05:12:29 +0000 | [diff] [blame] | 696 | unsigned Reg = AddLiveIn(DAG.getMachineFunction(), VA.getLocReg(), RC); |
| 697 | SDOperand ArgValue = DAG.getCopyFromReg(Root, Reg, RegVT); |
Chris Lattner | f39f771 | 2007-02-28 05:46:49 +0000 | [diff] [blame] | 698 | |
| 699 | // If this is an 8 or 16-bit value, it is really passed promoted to 32 |
| 700 | // bits. Insert an assert[sz]ext to capture this, then truncate to the |
| 701 | // right size. |
| 702 | if (VA.getLocInfo() == CCValAssign::SExt) |
| 703 | ArgValue = DAG.getNode(ISD::AssertSext, RegVT, ArgValue, |
| 704 | DAG.getValueType(VA.getValVT())); |
| 705 | else if (VA.getLocInfo() == CCValAssign::ZExt) |
| 706 | ArgValue = DAG.getNode(ISD::AssertZext, RegVT, ArgValue, |
| 707 | DAG.getValueType(VA.getValVT())); |
| 708 | |
| 709 | if (VA.getLocInfo() != CCValAssign::Full) |
| 710 | ArgValue = DAG.getNode(ISD::TRUNCATE, VA.getValVT(), ArgValue); |
| 711 | |
| 712 | ArgValues.push_back(ArgValue); |
| 713 | } else { |
| 714 | assert(VA.isMemLoc()); |
| 715 | |
| 716 | // Create the nodes corresponding to a load from this parameter slot. |
| 717 | int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8, |
| 718 | VA.getLocMemOffset()); |
| 719 | SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); |
| 720 | ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0)); |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 721 | } |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 722 | } |
Chris Lattner | f39f771 | 2007-02-28 05:46:49 +0000 | [diff] [blame] | 723 | |
| 724 | unsigned StackSize = CCInfo.getNextStackOffset(); |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 725 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 726 | ArgValues.push_back(Root); |
| 727 | |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 728 | // If the function takes variable number of arguments, make a frame index for |
| 729 | // the start of the first vararg value... for expansion of llvm.va_start. |
Evan Cheng | 4db3af3 | 2006-05-23 21:08:24 +0000 | [diff] [blame] | 730 | if (isVarArg) |
Chris Lattner | f39f771 | 2007-02-28 05:46:49 +0000 | [diff] [blame] | 731 | VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize); |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 732 | |
| 733 | if (isStdCall && !isVarArg) { |
Chris Lattner | f39f771 | 2007-02-28 05:46:49 +0000 | [diff] [blame] | 734 | BytesToPopOnReturn = StackSize; // Callee pops everything.. |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 735 | BytesCallerReserves = 0; |
| 736 | } else { |
Anton Korobeynikov | 1d9bacc | 2007-03-06 08:12:33 +0000 | [diff] [blame] | 737 | BytesToPopOnReturn = 0; // Callee pops nothing. |
Chris Lattner | f39f771 | 2007-02-28 05:46:49 +0000 | [diff] [blame] | 738 | |
| 739 | // If this is an sret function, the return should pop the hidden pointer. |
Anton Korobeynikov | 1d9bacc | 2007-03-06 08:12:33 +0000 | [diff] [blame] | 740 | if (NumArgs && |
| 741 | (cast<ConstantSDNode>(Op.getOperand(3))->getValue() & |
Anton Korobeynikov | d0b82b3 | 2007-03-07 16:25:09 +0000 | [diff] [blame] | 742 | ISD::ParamFlags::StructReturn)) |
Chris Lattner | f39f771 | 2007-02-28 05:46:49 +0000 | [diff] [blame] | 743 | BytesToPopOnReturn = 4; |
| 744 | |
| 745 | BytesCallerReserves = StackSize; |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 746 | } |
| 747 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 748 | RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only. |
| 749 | ReturnAddrIndex = 0; // No return address slot generated yet. |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 750 | |
Chris Lattner | d15dff2 | 2007-04-17 17:21:52 +0000 | [diff] [blame] | 751 | MF.getInfo<X86MachineFunctionInfo>() |
| 752 | ->setBytesToPopOnReturn(BytesToPopOnReturn); |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 753 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 754 | // Return the new list of results. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 755 | return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(), |
Chris Lattner | 14dd4c9 | 2007-02-26 07:50:02 +0000 | [diff] [blame] | 756 | &ArgValues[0], ArgValues.size()).getValue(Op.ResNo); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 757 | } |
| 758 | |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 759 | SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG, |
Chris Lattner | 09c75a4 | 2007-02-25 09:06:15 +0000 | [diff] [blame] | 760 | unsigned CC) { |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 761 | SDOperand Chain = Op.getOperand(0); |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 762 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 763 | bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; |
| 764 | SDOperand Callee = Op.getOperand(4); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 765 | unsigned NumOps = (Op.getNumOperands() - 5) / 2; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 766 | |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 767 | // Analyze operands of the call, assigning locations to each operand. |
Chris Lattner | 423c5f4 | 2007-02-28 05:31:48 +0000 | [diff] [blame] | 768 | SmallVector<CCValAssign, 16> ArgLocs; |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 769 | CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs); |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 770 | CCInfo.AnalyzeCallOperands(Op.Val, CC_X86_32_C); |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 771 | |
Chris Lattner | 423c5f4 | 2007-02-28 05:31:48 +0000 | [diff] [blame] | 772 | // Get a count of how many bytes are to be pushed on the stack. |
| 773 | unsigned NumBytes = CCInfo.getNextStackOffset(); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 774 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 775 | Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 776 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 777 | SmallVector<std::pair<unsigned, SDOperand>, 8> RegsToPass; |
| 778 | SmallVector<SDOperand, 8> MemOpChains; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 779 | |
Chris Lattner | 423c5f4 | 2007-02-28 05:31:48 +0000 | [diff] [blame] | 780 | SDOperand StackPtr; |
Chris Lattner | 423c5f4 | 2007-02-28 05:31:48 +0000 | [diff] [blame] | 781 | |
| 782 | // Walk the register/memloc assignments, inserting copies/loads. |
| 783 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
| 784 | CCValAssign &VA = ArgLocs[i]; |
| 785 | SDOperand Arg = Op.getOperand(5+2*VA.getValNo()); |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 786 | |
Chris Lattner | 423c5f4 | 2007-02-28 05:31:48 +0000 | [diff] [blame] | 787 | // Promote the value if needed. |
| 788 | switch (VA.getLocInfo()) { |
| 789 | default: assert(0 && "Unknown loc info!"); |
| 790 | case CCValAssign::Full: break; |
| 791 | case CCValAssign::SExt: |
| 792 | Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg); |
| 793 | break; |
| 794 | case CCValAssign::ZExt: |
| 795 | Arg = DAG.getNode(ISD::ZERO_EXTEND, VA.getLocVT(), Arg); |
| 796 | break; |
| 797 | case CCValAssign::AExt: |
| 798 | Arg = DAG.getNode(ISD::ANY_EXTEND, VA.getLocVT(), Arg); |
| 799 | break; |
Evan Cheng | 6b5783d | 2006-05-25 18:56:34 +0000 | [diff] [blame] | 800 | } |
Chris Lattner | 423c5f4 | 2007-02-28 05:31:48 +0000 | [diff] [blame] | 801 | |
| 802 | if (VA.isRegLoc()) { |
| 803 | RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); |
| 804 | } else { |
| 805 | assert(VA.isMemLoc()); |
| 806 | if (StackPtr.Val == 0) |
| 807 | StackPtr = DAG.getRegister(getStackPtrReg(), getPointerTy()); |
| 808 | SDOperand PtrOff = DAG.getConstant(VA.getLocMemOffset(), getPointerTy()); |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 809 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
| 810 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 811 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 812 | } |
| 813 | |
Chris Lattner | c0bdf34 | 2007-02-28 05:39:26 +0000 | [diff] [blame] | 814 | // If the first argument is an sret pointer, remember it. |
Anton Korobeynikov | 1d9bacc | 2007-03-06 08:12:33 +0000 | [diff] [blame] | 815 | bool isSRet = NumOps && |
| 816 | (cast<ConstantSDNode>(Op.getOperand(6))->getValue() & |
Anton Korobeynikov | d0b82b3 | 2007-03-07 16:25:09 +0000 | [diff] [blame] | 817 | ISD::ParamFlags::StructReturn); |
Chris Lattner | c0bdf34 | 2007-02-28 05:39:26 +0000 | [diff] [blame] | 818 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 819 | if (!MemOpChains.empty()) |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 820 | Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 821 | &MemOpChains[0], MemOpChains.size()); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 822 | |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 823 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 824 | // and flag operands which copy the outgoing args into registers. |
| 825 | SDOperand InFlag; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 826 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 827 | Chain = DAG.getCopyToReg(Chain, RegsToPass[i].first, RegsToPass[i].second, |
| 828 | InFlag); |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 829 | InFlag = Chain.getValue(1); |
| 830 | } |
| 831 | |
Evan Cheng | f468471 | 2007-02-21 21:18:14 +0000 | [diff] [blame] | 832 | // ELF / PIC requires GOT in the EBX register before function calls via PLT |
| 833 | // GOT pointer. |
Evan Cheng | 706535d | 2007-01-22 21:34:25 +0000 | [diff] [blame] | 834 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |
| 835 | Subtarget->isPICStyleGOT()) { |
Anton Korobeynikov | 7f70559 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 836 | Chain = DAG.getCopyToReg(Chain, X86::EBX, |
| 837 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
| 838 | InFlag); |
| 839 | InFlag = Chain.getValue(1); |
| 840 | } |
| 841 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 842 | // If the callee is a GlobalAddress node (quite common, every direct call is) |
| 843 | // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 844 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
Anton Korobeynikov | 2b2bc68 | 2006-12-22 22:29:05 +0000 | [diff] [blame] | 845 | // We should use extra load for direct calls to dllimported functions in |
| 846 | // non-JIT mode. |
| 847 | if (!Subtarget->GVRequiresExtraLoad(G->getGlobal(), |
| 848 | getTargetMachine(), true)) |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 849 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy()); |
| 850 | } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 851 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); |
| 852 | |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 853 | // Returns a chain & a flag for retval copy to use. |
| 854 | SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 855 | SmallVector<SDOperand, 8> Ops; |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 856 | Ops.push_back(Chain); |
| 857 | Ops.push_back(Callee); |
Evan Cheng | b69d113 | 2006-06-14 18:17:40 +0000 | [diff] [blame] | 858 | |
| 859 | // Add argument registers to the end of the list so that they are known live |
| 860 | // into the call. |
| 861 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 862 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
Evan Cheng | b69d113 | 2006-06-14 18:17:40 +0000 | [diff] [blame] | 863 | RegsToPass[i].second.getValueType())); |
Evan Cheng | f468471 | 2007-02-21 21:18:14 +0000 | [diff] [blame] | 864 | |
| 865 | // Add an implicit use GOT pointer in EBX. |
| 866 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |
| 867 | Subtarget->isPICStyleGOT()) |
| 868 | Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy())); |
Anton Korobeynikov | 7f70559 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 869 | |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 870 | if (InFlag.Val) |
| 871 | Ops.push_back(InFlag); |
Evan Cheng | d90eb7f | 2006-01-05 00:27:02 +0000 | [diff] [blame] | 872 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 873 | Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 874 | NodeTys, &Ops[0], Ops.size()); |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 875 | InFlag = Chain.getValue(1); |
Evan Cheng | d90eb7f | 2006-01-05 00:27:02 +0000 | [diff] [blame] | 876 | |
Chris Lattner | 2d29709 | 2006-05-23 18:50:38 +0000 | [diff] [blame] | 877 | // Create the CALLSEQ_END node. |
| 878 | unsigned NumBytesForCalleeToPush = 0; |
| 879 | |
Chris Lattner | 09c75a4 | 2007-02-25 09:06:15 +0000 | [diff] [blame] | 880 | if (CC == CallingConv::X86_StdCall) { |
| 881 | if (isVarArg) |
Chris Lattner | c0bdf34 | 2007-02-28 05:39:26 +0000 | [diff] [blame] | 882 | NumBytesForCalleeToPush = isSRet ? 4 : 0; |
Chris Lattner | 09c75a4 | 2007-02-25 09:06:15 +0000 | [diff] [blame] | 883 | else |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 884 | NumBytesForCalleeToPush = NumBytes; |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 885 | } else { |
| 886 | // If this is is a call to a struct-return function, the callee |
| 887 | // pops the hidden struct pointer, so we have to push it back. |
| 888 | // This is common for Darwin/X86, Linux & Mingw32 targets. |
Chris Lattner | c0bdf34 | 2007-02-28 05:39:26 +0000 | [diff] [blame] | 889 | NumBytesForCalleeToPush = isSRet ? 4 : 0; |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 890 | } |
| 891 | |
Chris Lattner | 7d53a1c | 2007-02-25 07:18:38 +0000 | [diff] [blame] | 892 | NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 893 | Ops.clear(); |
| 894 | Ops.push_back(Chain); |
| 895 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
Chris Lattner | 2d29709 | 2006-05-23 18:50:38 +0000 | [diff] [blame] | 896 | Ops.push_back(DAG.getConstant(NumBytesForCalleeToPush, getPointerTy())); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 897 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 898 | Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 899 | InFlag = Chain.getValue(1); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 900 | |
Chris Lattner | 3085e15 | 2007-02-25 08:59:22 +0000 | [diff] [blame] | 901 | // Handle result values, copying them out of physregs into vregs that we |
| 902 | // return. |
Chris Lattner | 09c75a4 | 2007-02-25 09:06:15 +0000 | [diff] [blame] | 903 | return SDOperand(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 904 | } |
| 905 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 906 | |
| 907 | //===----------------------------------------------------------------------===// |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 908 | // FastCall Calling Convention implementation |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 909 | //===----------------------------------------------------------------------===// |
| 910 | // |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 911 | // The X86 'fastcall' calling convention passes up to two integer arguments in |
| 912 | // registers (an appropriate portion of ECX/EDX), passes arguments in C order, |
| 913 | // and requires that the callee pop its arguments off the stack (allowing proper |
| 914 | // tail calls), and has the same return value conventions as C calling convs. |
| 915 | // |
| 916 | // This calling convention always arranges for the callee pop value to be 8n+4 |
| 917 | // bytes, which is needed for tail recursion elimination and stack alignment |
| 918 | // reasons. |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 919 | SDOperand |
Chris Lattner | 2db39b8 | 2007-02-28 06:05:16 +0000 | [diff] [blame] | 920 | X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 921 | MachineFunction &MF = DAG.getMachineFunction(); |
| 922 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 923 | SDOperand Root = Op.getOperand(0); |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 924 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 925 | |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 926 | // Assign locations to all of the incoming arguments. |
Chris Lattner | fc664c1 | 2007-02-28 06:21:19 +0000 | [diff] [blame] | 927 | SmallVector<CCValAssign, 16> ArgLocs; |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 928 | CCState CCInfo(MF.getFunction()->getCallingConv(), isVarArg, |
| 929 | getTargetMachine(), ArgLocs); |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 930 | CCInfo.AnalyzeFormalArguments(Op.Val, CC_X86_32_FastCall); |
Chris Lattner | fc664c1 | 2007-02-28 06:21:19 +0000 | [diff] [blame] | 931 | |
| 932 | SmallVector<SDOperand, 8> ArgValues; |
| 933 | unsigned LastVal = ~0U; |
| 934 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
| 935 | CCValAssign &VA = ArgLocs[i]; |
| 936 | // TODO: If an arg is passed in two places (e.g. reg and stack), skip later |
| 937 | // places. |
| 938 | assert(VA.getValNo() != LastVal && |
| 939 | "Don't support value assigned to multiple locs yet"); |
| 940 | LastVal = VA.getValNo(); |
| 941 | |
| 942 | if (VA.isRegLoc()) { |
| 943 | MVT::ValueType RegVT = VA.getLocVT(); |
| 944 | TargetRegisterClass *RC; |
| 945 | if (RegVT == MVT::i32) |
| 946 | RC = X86::GR32RegisterClass; |
| 947 | else { |
| 948 | assert(MVT::isVector(RegVT)); |
| 949 | RC = X86::VR128RegisterClass; |
| 950 | } |
| 951 | |
Chris Lattner | 82932a5 | 2007-03-02 05:12:29 +0000 | [diff] [blame] | 952 | unsigned Reg = AddLiveIn(DAG.getMachineFunction(), VA.getLocReg(), RC); |
| 953 | SDOperand ArgValue = DAG.getCopyFromReg(Root, Reg, RegVT); |
Chris Lattner | fc664c1 | 2007-02-28 06:21:19 +0000 | [diff] [blame] | 954 | |
| 955 | // If this is an 8 or 16-bit value, it is really passed promoted to 32 |
| 956 | // bits. Insert an assert[sz]ext to capture this, then truncate to the |
| 957 | // right size. |
| 958 | if (VA.getLocInfo() == CCValAssign::SExt) |
| 959 | ArgValue = DAG.getNode(ISD::AssertSext, RegVT, ArgValue, |
| 960 | DAG.getValueType(VA.getValVT())); |
| 961 | else if (VA.getLocInfo() == CCValAssign::ZExt) |
| 962 | ArgValue = DAG.getNode(ISD::AssertZext, RegVT, ArgValue, |
| 963 | DAG.getValueType(VA.getValVT())); |
| 964 | |
| 965 | if (VA.getLocInfo() != CCValAssign::Full) |
| 966 | ArgValue = DAG.getNode(ISD::TRUNCATE, VA.getValVT(), ArgValue); |
| 967 | |
| 968 | ArgValues.push_back(ArgValue); |
| 969 | } else { |
| 970 | assert(VA.isMemLoc()); |
| 971 | |
| 972 | // Create the nodes corresponding to a load from this parameter slot. |
| 973 | int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8, |
| 974 | VA.getLocMemOffset()); |
| 975 | SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); |
| 976 | ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0)); |
| 977 | } |
| 978 | } |
| 979 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 980 | ArgValues.push_back(Root); |
| 981 | |
Chris Lattner | fc664c1 | 2007-02-28 06:21:19 +0000 | [diff] [blame] | 982 | unsigned StackSize = CCInfo.getNextStackOffset(); |
Anton Korobeynikov | 9dd9abd | 2007-03-01 16:29:22 +0000 | [diff] [blame] | 983 | |
Anton Korobeynikov | f7dcfa8 | 2007-03-02 21:50:27 +0000 | [diff] [blame] | 984 | if (!Subtarget->isTargetCygMing() && !Subtarget->isTargetWindows()) { |
Anton Korobeynikov | 9dd9abd | 2007-03-01 16:29:22 +0000 | [diff] [blame] | 985 | // Make sure the instruction takes 8n+4 bytes to make sure the start of the |
| 986 | // arguments and the arguments after the retaddr has been pushed are aligned. |
| 987 | if ((StackSize & 7) == 0) |
| 988 | StackSize += 4; |
| 989 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 990 | |
| 991 | VarArgsFrameIndex = 0xAAAAAAA; // fastcc functions can't have varargs. |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 992 | RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only. |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 993 | ReturnAddrIndex = 0; // No return address slot generated yet. |
Chris Lattner | fc664c1 | 2007-02-28 06:21:19 +0000 | [diff] [blame] | 994 | BytesToPopOnReturn = StackSize; // Callee pops all stack arguments. |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 995 | BytesCallerReserves = 0; |
| 996 | |
Chris Lattner | d15dff2 | 2007-04-17 17:21:52 +0000 | [diff] [blame] | 997 | MF.getInfo<X86MachineFunctionInfo>() |
| 998 | ->setBytesToPopOnReturn(BytesToPopOnReturn); |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 999 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1000 | // Return the new list of results. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1001 | return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(), |
Chris Lattner | 14dd4c9 | 2007-02-26 07:50:02 +0000 | [diff] [blame] | 1002 | &ArgValues[0], ArgValues.size()).getValue(Op.ResNo); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1003 | } |
| 1004 | |
Chris Lattner | e87e115 | 2006-09-26 03:57:53 +0000 | [diff] [blame] | 1005 | SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG, |
Chris Lattner | 09c75a4 | 2007-02-25 09:06:15 +0000 | [diff] [blame] | 1006 | unsigned CC) { |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1007 | SDOperand Chain = Op.getOperand(0); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1008 | bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 1009 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1010 | SDOperand Callee = Op.getOperand(4); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1011 | |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 1012 | // Analyze operands of the call, assigning locations to each operand. |
Chris Lattner | f5d280a | 2007-02-28 06:26:33 +0000 | [diff] [blame] | 1013 | SmallVector<CCValAssign, 16> ArgLocs; |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 1014 | CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs); |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 1015 | CCInfo.AnalyzeCallOperands(Op.Val, CC_X86_32_FastCall); |
Chris Lattner | f5d280a | 2007-02-28 06:26:33 +0000 | [diff] [blame] | 1016 | |
| 1017 | // Get a count of how many bytes are to be pushed on the stack. |
| 1018 | unsigned NumBytes = CCInfo.getNextStackOffset(); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1019 | |
Anton Korobeynikov | f7dcfa8 | 2007-03-02 21:50:27 +0000 | [diff] [blame] | 1020 | if (!Subtarget->isTargetCygMing() && !Subtarget->isTargetWindows()) { |
Anton Korobeynikov | 9dd9abd | 2007-03-01 16:29:22 +0000 | [diff] [blame] | 1021 | // Make sure the instruction takes 8n+4 bytes to make sure the start of the |
| 1022 | // arguments and the arguments after the retaddr has been pushed are aligned. |
| 1023 | if ((NumBytes & 7) == 0) |
| 1024 | NumBytes += 4; |
| 1025 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1026 | |
Chris Lattner | 94dd292 | 2006-02-13 09:00:43 +0000 | [diff] [blame] | 1027 | Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); |
Chris Lattner | f5d280a | 2007-02-28 06:26:33 +0000 | [diff] [blame] | 1028 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1029 | SmallVector<std::pair<unsigned, SDOperand>, 8> RegsToPass; |
| 1030 | SmallVector<SDOperand, 8> MemOpChains; |
Chris Lattner | f5d280a | 2007-02-28 06:26:33 +0000 | [diff] [blame] | 1031 | |
| 1032 | SDOperand StackPtr; |
| 1033 | |
| 1034 | // Walk the register/memloc assignments, inserting copies/loads. |
| 1035 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
| 1036 | CCValAssign &VA = ArgLocs[i]; |
| 1037 | SDOperand Arg = Op.getOperand(5+2*VA.getValNo()); |
| 1038 | |
| 1039 | // Promote the value if needed. |
| 1040 | switch (VA.getLocInfo()) { |
| 1041 | default: assert(0 && "Unknown loc info!"); |
| 1042 | case CCValAssign::Full: break; |
| 1043 | case CCValAssign::SExt: |
| 1044 | Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg); |
Chris Lattner | 2db39b8 | 2007-02-28 06:05:16 +0000 | [diff] [blame] | 1045 | break; |
Chris Lattner | f5d280a | 2007-02-28 06:26:33 +0000 | [diff] [blame] | 1046 | case CCValAssign::ZExt: |
| 1047 | Arg = DAG.getNode(ISD::ZERO_EXTEND, VA.getLocVT(), Arg); |
| 1048 | break; |
| 1049 | case CCValAssign::AExt: |
| 1050 | Arg = DAG.getNode(ISD::ANY_EXTEND, VA.getLocVT(), Arg); |
| 1051 | break; |
| 1052 | } |
| 1053 | |
| 1054 | if (VA.isRegLoc()) { |
| 1055 | RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); |
| 1056 | } else { |
| 1057 | assert(VA.isMemLoc()); |
| 1058 | if (StackPtr.Val == 0) |
| 1059 | StackPtr = DAG.getRegister(getStackPtrReg(), getPointerTy()); |
| 1060 | SDOperand PtrOff = DAG.getConstant(VA.getLocMemOffset(), getPointerTy()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1061 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1062 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1063 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1064 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1065 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1066 | if (!MemOpChains.empty()) |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1067 | Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 1068 | &MemOpChains[0], MemOpChains.size()); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1069 | |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1070 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 1071 | // and flag operands which copy the outgoing args into registers. |
| 1072 | SDOperand InFlag; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1073 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 1074 | Chain = DAG.getCopyToReg(Chain, RegsToPass[i].first, RegsToPass[i].second, |
| 1075 | InFlag); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1076 | InFlag = Chain.getValue(1); |
| 1077 | } |
| 1078 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1079 | // If the callee is a GlobalAddress node (quite common, every direct call is) |
| 1080 | // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 1081 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
Anton Korobeynikov | 2b2bc68 | 2006-12-22 22:29:05 +0000 | [diff] [blame] | 1082 | // We should use extra load for direct calls to dllimported functions in |
| 1083 | // non-JIT mode. |
| 1084 | if (!Subtarget->GVRequiresExtraLoad(G->getGlobal(), |
| 1085 | getTargetMachine(), true)) |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 1086 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy()); |
| 1087 | } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1088 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); |
| 1089 | |
Evan Cheng | f468471 | 2007-02-21 21:18:14 +0000 | [diff] [blame] | 1090 | // ELF / PIC requires GOT in the EBX register before function calls via PLT |
| 1091 | // GOT pointer. |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 1092 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |
| 1093 | Subtarget->isPICStyleGOT()) { |
| 1094 | Chain = DAG.getCopyToReg(Chain, X86::EBX, |
| 1095 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
| 1096 | InFlag); |
| 1097 | InFlag = Chain.getValue(1); |
| 1098 | } |
| 1099 | |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 1100 | // Returns a chain & a flag for retval copy to use. |
| 1101 | SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1102 | SmallVector<SDOperand, 8> Ops; |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1103 | Ops.push_back(Chain); |
| 1104 | Ops.push_back(Callee); |
Evan Cheng | b69d113 | 2006-06-14 18:17:40 +0000 | [diff] [blame] | 1105 | |
| 1106 | // Add argument registers to the end of the list so that they are known live |
| 1107 | // into the call. |
| 1108 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1109 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
Evan Cheng | b69d113 | 2006-06-14 18:17:40 +0000 | [diff] [blame] | 1110 | RegsToPass[i].second.getValueType())); |
| 1111 | |
Evan Cheng | f468471 | 2007-02-21 21:18:14 +0000 | [diff] [blame] | 1112 | // Add an implicit use GOT pointer in EBX. |
| 1113 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |
| 1114 | Subtarget->isPICStyleGOT()) |
| 1115 | Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy())); |
| 1116 | |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1117 | if (InFlag.Val) |
| 1118 | Ops.push_back(InFlag); |
| 1119 | |
| 1120 | // FIXME: Do not generate X86ISD::TAILCALL for now. |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 1121 | Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1122 | NodeTys, &Ops[0], Ops.size()); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1123 | InFlag = Chain.getValue(1); |
| 1124 | |
Chris Lattner | 7d53a1c | 2007-02-25 07:18:38 +0000 | [diff] [blame] | 1125 | // Returns a flag for retval copy to use. |
| 1126 | NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1127 | Ops.clear(); |
| 1128 | Ops.push_back(Chain); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1129 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
| 1130 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1131 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1132 | Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); |
Chris Lattner | 339b439 | 2007-02-25 09:10:05 +0000 | [diff] [blame] | 1133 | InFlag = Chain.getValue(1); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1134 | |
Chris Lattner | 339b439 | 2007-02-25 09:10:05 +0000 | [diff] [blame] | 1135 | // Handle result values, copying them out of physregs into vregs that we |
| 1136 | // return. |
| 1137 | return SDOperand(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1138 | } |
| 1139 | |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1140 | |
| 1141 | //===----------------------------------------------------------------------===// |
| 1142 | // X86-64 C Calling Convention implementation |
| 1143 | //===----------------------------------------------------------------------===// |
| 1144 | |
| 1145 | SDOperand |
| 1146 | X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) { |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1147 | MachineFunction &MF = DAG.getMachineFunction(); |
| 1148 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 1149 | SDOperand Root = Op.getOperand(0); |
| 1150 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
| 1151 | |
| 1152 | static const unsigned GPR64ArgRegs[] = { |
| 1153 | X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9 |
| 1154 | }; |
| 1155 | static const unsigned XMMArgRegs[] = { |
| 1156 | X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, |
| 1157 | X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 |
| 1158 | }; |
| 1159 | |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 1160 | |
| 1161 | // Assign locations to all of the incoming arguments. |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1162 | SmallVector<CCValAssign, 16> ArgLocs; |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 1163 | CCState CCInfo(MF.getFunction()->getCallingConv(), isVarArg, |
| 1164 | getTargetMachine(), ArgLocs); |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 1165 | CCInfo.AnalyzeFormalArguments(Op.Val, CC_X86_64_C); |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1166 | |
| 1167 | SmallVector<SDOperand, 8> ArgValues; |
| 1168 | unsigned LastVal = ~0U; |
| 1169 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
| 1170 | CCValAssign &VA = ArgLocs[i]; |
| 1171 | // TODO: If an arg is passed in two places (e.g. reg and stack), skip later |
| 1172 | // places. |
| 1173 | assert(VA.getValNo() != LastVal && |
| 1174 | "Don't support value assigned to multiple locs yet"); |
| 1175 | LastVal = VA.getValNo(); |
| 1176 | |
| 1177 | if (VA.isRegLoc()) { |
| 1178 | MVT::ValueType RegVT = VA.getLocVT(); |
| 1179 | TargetRegisterClass *RC; |
| 1180 | if (RegVT == MVT::i32) |
| 1181 | RC = X86::GR32RegisterClass; |
| 1182 | else if (RegVT == MVT::i64) |
| 1183 | RC = X86::GR64RegisterClass; |
| 1184 | else if (RegVT == MVT::f32) |
| 1185 | RC = X86::FR32RegisterClass; |
| 1186 | else if (RegVT == MVT::f64) |
| 1187 | RC = X86::FR64RegisterClass; |
| 1188 | else { |
| 1189 | assert(MVT::isVector(RegVT)); |
Chris Lattner | fdbe720 | 2007-06-09 05:08:10 +0000 | [diff] [blame] | 1190 | if (MVT::getSizeInBits(RegVT) == 64) { |
| 1191 | RC = X86::GR64RegisterClass; // MMX values are passed in GPRs. |
| 1192 | RegVT = MVT::i64; |
| 1193 | } else |
Chris Lattner | 6b7c21c | 2007-06-09 05:01:50 +0000 | [diff] [blame] | 1194 | RC = X86::VR128RegisterClass; |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1195 | } |
Chris Lattner | 82932a5 | 2007-03-02 05:12:29 +0000 | [diff] [blame] | 1196 | |
| 1197 | unsigned Reg = AddLiveIn(DAG.getMachineFunction(), VA.getLocReg(), RC); |
| 1198 | SDOperand ArgValue = DAG.getCopyFromReg(Root, Reg, RegVT); |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1199 | |
| 1200 | // If this is an 8 or 16-bit value, it is really passed promoted to 32 |
| 1201 | // bits. Insert an assert[sz]ext to capture this, then truncate to the |
| 1202 | // right size. |
| 1203 | if (VA.getLocInfo() == CCValAssign::SExt) |
| 1204 | ArgValue = DAG.getNode(ISD::AssertSext, RegVT, ArgValue, |
| 1205 | DAG.getValueType(VA.getValVT())); |
| 1206 | else if (VA.getLocInfo() == CCValAssign::ZExt) |
| 1207 | ArgValue = DAG.getNode(ISD::AssertZext, RegVT, ArgValue, |
| 1208 | DAG.getValueType(VA.getValVT())); |
| 1209 | |
| 1210 | if (VA.getLocInfo() != CCValAssign::Full) |
| 1211 | ArgValue = DAG.getNode(ISD::TRUNCATE, VA.getValVT(), ArgValue); |
| 1212 | |
Chris Lattner | fdbe720 | 2007-06-09 05:08:10 +0000 | [diff] [blame] | 1213 | // Handle MMX values passed in GPRs. |
| 1214 | if (RegVT != VA.getLocVT() && RC == X86::GR64RegisterClass && |
| 1215 | MVT::getSizeInBits(RegVT) == 64) |
| 1216 | ArgValue = DAG.getNode(ISD::BIT_CONVERT, VA.getLocVT(), ArgValue); |
| 1217 | |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1218 | ArgValues.push_back(ArgValue); |
| 1219 | } else { |
| 1220 | assert(VA.isMemLoc()); |
| 1221 | |
| 1222 | // Create the nodes corresponding to a load from this parameter slot. |
| 1223 | int FI = MFI->CreateFixedObject(MVT::getSizeInBits(VA.getValVT())/8, |
| 1224 | VA.getLocMemOffset()); |
| 1225 | SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); |
| 1226 | ArgValues.push_back(DAG.getLoad(VA.getValVT(), Root, FIN, NULL, 0)); |
| 1227 | } |
| 1228 | } |
| 1229 | |
| 1230 | unsigned StackSize = CCInfo.getNextStackOffset(); |
| 1231 | |
| 1232 | // If the function takes variable number of arguments, make a frame index for |
| 1233 | // the start of the first vararg value... for expansion of llvm.va_start. |
| 1234 | if (isVarArg) { |
| 1235 | unsigned NumIntRegs = CCInfo.getFirstUnallocated(GPR64ArgRegs, 6); |
| 1236 | unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs, 8); |
| 1237 | |
| 1238 | // For X86-64, if there are vararg parameters that are passed via |
| 1239 | // registers, then we must store them to their spots on the stack so they |
| 1240 | // may be loaded by deferencing the result of va_next. |
| 1241 | VarArgsGPOffset = NumIntRegs * 8; |
| 1242 | VarArgsFPOffset = 6 * 8 + NumXMMRegs * 16; |
| 1243 | VarArgsFrameIndex = MFI->CreateFixedObject(1, StackSize); |
| 1244 | RegSaveFrameIndex = MFI->CreateStackObject(6 * 8 + 8 * 16, 16); |
| 1245 | |
| 1246 | // Store the integer parameter registers. |
| 1247 | SmallVector<SDOperand, 8> MemOps; |
| 1248 | SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy()); |
| 1249 | SDOperand FIN = DAG.getNode(ISD::ADD, getPointerTy(), RSFIN, |
| 1250 | DAG.getConstant(VarArgsGPOffset, getPointerTy())); |
| 1251 | for (; NumIntRegs != 6; ++NumIntRegs) { |
| 1252 | unsigned VReg = AddLiveIn(MF, GPR64ArgRegs[NumIntRegs], |
| 1253 | X86::GR64RegisterClass); |
| 1254 | SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i64); |
| 1255 | SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0); |
| 1256 | MemOps.push_back(Store); |
| 1257 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 1258 | DAG.getConstant(8, getPointerTy())); |
| 1259 | } |
| 1260 | |
| 1261 | // Now store the XMM (fp + vector) parameter registers. |
| 1262 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), RSFIN, |
| 1263 | DAG.getConstant(VarArgsFPOffset, getPointerTy())); |
| 1264 | for (; NumXMMRegs != 8; ++NumXMMRegs) { |
| 1265 | unsigned VReg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs], |
| 1266 | X86::VR128RegisterClass); |
| 1267 | SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::v4f32); |
| 1268 | SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0); |
| 1269 | MemOps.push_back(Store); |
| 1270 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 1271 | DAG.getConstant(16, getPointerTy())); |
| 1272 | } |
| 1273 | if (!MemOps.empty()) |
| 1274 | Root = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 1275 | &MemOps[0], MemOps.size()); |
| 1276 | } |
| 1277 | |
| 1278 | ArgValues.push_back(Root); |
| 1279 | |
| 1280 | ReturnAddrIndex = 0; // No return address slot generated yet. |
| 1281 | BytesToPopOnReturn = 0; // Callee pops nothing. |
| 1282 | BytesCallerReserves = StackSize; |
| 1283 | |
| 1284 | // Return the new list of results. |
| 1285 | return DAG.getNode(ISD::MERGE_VALUES, Op.Val->getVTList(), |
| 1286 | &ArgValues[0], ArgValues.size()).getValue(Op.ResNo); |
| 1287 | } |
| 1288 | |
| 1289 | SDOperand |
| 1290 | X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG, |
| 1291 | unsigned CC) { |
| 1292 | SDOperand Chain = Op.getOperand(0); |
| 1293 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
| 1294 | bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; |
| 1295 | SDOperand Callee = Op.getOperand(4); |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 1296 | |
| 1297 | // Analyze operands of the call, assigning locations to each operand. |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1298 | SmallVector<CCValAssign, 16> ArgLocs; |
Chris Lattner | 52387be | 2007-06-19 00:13:10 +0000 | [diff] [blame] | 1299 | CCState CCInfo(CC, isVarArg, getTargetMachine(), ArgLocs); |
Chris Lattner | 638402b | 2007-02-28 07:00:42 +0000 | [diff] [blame] | 1300 | CCInfo.AnalyzeCallOperands(Op.Val, CC_X86_64_C); |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1301 | |
| 1302 | // Get a count of how many bytes are to be pushed on the stack. |
| 1303 | unsigned NumBytes = CCInfo.getNextStackOffset(); |
| 1304 | Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); |
| 1305 | |
| 1306 | SmallVector<std::pair<unsigned, SDOperand>, 8> RegsToPass; |
| 1307 | SmallVector<SDOperand, 8> MemOpChains; |
| 1308 | |
| 1309 | SDOperand StackPtr; |
| 1310 | |
| 1311 | // Walk the register/memloc assignments, inserting copies/loads. |
| 1312 | for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { |
| 1313 | CCValAssign &VA = ArgLocs[i]; |
| 1314 | SDOperand Arg = Op.getOperand(5+2*VA.getValNo()); |
| 1315 | |
| 1316 | // Promote the value if needed. |
| 1317 | switch (VA.getLocInfo()) { |
| 1318 | default: assert(0 && "Unknown loc info!"); |
| 1319 | case CCValAssign::Full: break; |
| 1320 | case CCValAssign::SExt: |
| 1321 | Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg); |
| 1322 | break; |
| 1323 | case CCValAssign::ZExt: |
| 1324 | Arg = DAG.getNode(ISD::ZERO_EXTEND, VA.getLocVT(), Arg); |
| 1325 | break; |
| 1326 | case CCValAssign::AExt: |
| 1327 | Arg = DAG.getNode(ISD::ANY_EXTEND, VA.getLocVT(), Arg); |
| 1328 | break; |
| 1329 | } |
| 1330 | |
| 1331 | if (VA.isRegLoc()) { |
| 1332 | RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); |
| 1333 | } else { |
| 1334 | assert(VA.isMemLoc()); |
| 1335 | if (StackPtr.Val == 0) |
| 1336 | StackPtr = DAG.getRegister(getStackPtrReg(), getPointerTy()); |
| 1337 | SDOperand PtrOff = DAG.getConstant(VA.getLocMemOffset(), getPointerTy()); |
| 1338 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
| 1339 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
| 1340 | } |
| 1341 | } |
| 1342 | |
| 1343 | if (!MemOpChains.empty()) |
| 1344 | Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 1345 | &MemOpChains[0], MemOpChains.size()); |
| 1346 | |
| 1347 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 1348 | // and flag operands which copy the outgoing args into registers. |
| 1349 | SDOperand InFlag; |
| 1350 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 1351 | Chain = DAG.getCopyToReg(Chain, RegsToPass[i].first, RegsToPass[i].second, |
| 1352 | InFlag); |
| 1353 | InFlag = Chain.getValue(1); |
| 1354 | } |
| 1355 | |
| 1356 | if (isVarArg) { |
| 1357 | // From AMD64 ABI document: |
| 1358 | // For calls that may call functions that use varargs or stdargs |
| 1359 | // (prototype-less calls or calls to functions containing ellipsis (...) in |
| 1360 | // the declaration) %al is used as hidden argument to specify the number |
| 1361 | // of SSE registers used. The contents of %al do not need to match exactly |
| 1362 | // the number of registers, but must be an ubound on the number of SSE |
| 1363 | // registers used and is in the range 0 - 8 inclusive. |
| 1364 | |
| 1365 | // Count the number of XMM registers allocated. |
| 1366 | static const unsigned XMMArgRegs[] = { |
| 1367 | X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, |
| 1368 | X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 |
| 1369 | }; |
| 1370 | unsigned NumXMMRegs = CCInfo.getFirstUnallocated(XMMArgRegs, 8); |
| 1371 | |
| 1372 | Chain = DAG.getCopyToReg(Chain, X86::AL, |
| 1373 | DAG.getConstant(NumXMMRegs, MVT::i8), InFlag); |
| 1374 | InFlag = Chain.getValue(1); |
| 1375 | } |
| 1376 | |
| 1377 | // If the callee is a GlobalAddress node (quite common, every direct call is) |
| 1378 | // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. |
| 1379 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
| 1380 | // We should use extra load for direct calls to dllimported functions in |
| 1381 | // non-JIT mode. |
Evan Cheng | ba69300 | 2007-03-14 22:11:11 +0000 | [diff] [blame] | 1382 | if (getTargetMachine().getCodeModel() != CodeModel::Large |
Anton Korobeynikov | bed2946 | 2007-04-16 18:10:23 +0000 | [diff] [blame] | 1383 | && !Subtarget->GVRequiresExtraLoad(G->getGlobal(), |
| 1384 | getTargetMachine(), true)) |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1385 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy()); |
| 1386 | } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) |
Evan Cheng | ba69300 | 2007-03-14 22:11:11 +0000 | [diff] [blame] | 1387 | if (getTargetMachine().getCodeModel() != CodeModel::Large) |
| 1388 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); |
Chris Lattner | fcf1a3d | 2007-02-28 06:10:12 +0000 | [diff] [blame] | 1389 | |
| 1390 | // Returns a chain & a flag for retval copy to use. |
| 1391 | SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); |
| 1392 | SmallVector<SDOperand, 8> Ops; |
| 1393 | Ops.push_back(Chain); |
| 1394 | Ops.push_back(Callee); |
| 1395 | |
| 1396 | // Add argument registers to the end of the list so that they are known live |
| 1397 | // into the call. |
| 1398 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
| 1399 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
| 1400 | RegsToPass[i].second.getValueType())); |
| 1401 | |
| 1402 | if (InFlag.Val) |
| 1403 | Ops.push_back(InFlag); |
| 1404 | |
| 1405 | // FIXME: Do not generate X86ISD::TAILCALL for now. |
| 1406 | Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, |
| 1407 | NodeTys, &Ops[0], Ops.size()); |
| 1408 | InFlag = Chain.getValue(1); |
| 1409 | |
| 1410 | // Returns a flag for retval copy to use. |
| 1411 | NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); |
| 1412 | Ops.clear(); |
| 1413 | Ops.push_back(Chain); |
| 1414 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
| 1415 | Ops.push_back(DAG.getConstant(0, getPointerTy())); |
| 1416 | Ops.push_back(InFlag); |
| 1417 | Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); |
| 1418 | InFlag = Chain.getValue(1); |
| 1419 | |
| 1420 | // Handle result values, copying them out of physregs into vregs that we |
| 1421 | // return. |
| 1422 | return SDOperand(LowerCallResult(Chain, InFlag, Op.Val, CC, DAG), Op.ResNo); |
| 1423 | } |
| 1424 | |
| 1425 | |
| 1426 | //===----------------------------------------------------------------------===// |
| 1427 | // Other Lowering Hooks |
| 1428 | //===----------------------------------------------------------------------===// |
| 1429 | |
| 1430 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1431 | SDOperand X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) { |
| 1432 | if (ReturnAddrIndex == 0) { |
| 1433 | // Set up a frame object for the return address. |
| 1434 | MachineFunction &MF = DAG.getMachineFunction(); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1435 | if (Subtarget->is64Bit()) |
| 1436 | ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(8, -8); |
| 1437 | else |
| 1438 | ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(4, -4); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1439 | } |
| 1440 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1441 | return DAG.getFrameIndex(ReturnAddrIndex, getPointerTy()); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1442 | } |
| 1443 | |
| 1444 | |
| 1445 | |
Evan Cheng | 6dfa999 | 2006-01-30 23:41:35 +0000 | [diff] [blame] | 1446 | /// translateX86CC - do a one to one translation of a ISD::CondCode to the X86 |
| 1447 | /// specific condition code. It returns a false if it cannot do a direct |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 1448 | /// translation. X86CC is the translated CondCode. LHS/RHS are modified as |
| 1449 | /// needed. |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 1450 | static bool translateX86CC(ISD::CondCode SetCCOpcode, bool isFP, |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 1451 | unsigned &X86CC, SDOperand &LHS, SDOperand &RHS, |
| 1452 | SelectionDAG &DAG) { |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1453 | X86CC = X86::COND_INVALID; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1454 | if (!isFP) { |
Chris Lattner | bfd68a7 | 2006-09-13 17:04:54 +0000 | [diff] [blame] | 1455 | if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) { |
| 1456 | if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnesValue()) { |
| 1457 | // X > -1 -> X == 0, jump !sign. |
| 1458 | RHS = DAG.getConstant(0, RHS.getValueType()); |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1459 | X86CC = X86::COND_NS; |
Chris Lattner | bfd68a7 | 2006-09-13 17:04:54 +0000 | [diff] [blame] | 1460 | return true; |
| 1461 | } else if (SetCCOpcode == ISD::SETLT && RHSC->isNullValue()) { |
| 1462 | // X < 0 -> X == 0, jump on sign. |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1463 | X86CC = X86::COND_S; |
Chris Lattner | bfd68a7 | 2006-09-13 17:04:54 +0000 | [diff] [blame] | 1464 | return true; |
| 1465 | } |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 1466 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1467 | |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1468 | switch (SetCCOpcode) { |
| 1469 | default: break; |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1470 | case ISD::SETEQ: X86CC = X86::COND_E; break; |
| 1471 | case ISD::SETGT: X86CC = X86::COND_G; break; |
| 1472 | case ISD::SETGE: X86CC = X86::COND_GE; break; |
| 1473 | case ISD::SETLT: X86CC = X86::COND_L; break; |
| 1474 | case ISD::SETLE: X86CC = X86::COND_LE; break; |
| 1475 | case ISD::SETNE: X86CC = X86::COND_NE; break; |
| 1476 | case ISD::SETULT: X86CC = X86::COND_B; break; |
| 1477 | case ISD::SETUGT: X86CC = X86::COND_A; break; |
| 1478 | case ISD::SETULE: X86CC = X86::COND_BE; break; |
| 1479 | case ISD::SETUGE: X86CC = X86::COND_AE; break; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1480 | } |
| 1481 | } else { |
| 1482 | // On a floating point condition, the flags are set as follows: |
| 1483 | // ZF PF CF op |
| 1484 | // 0 | 0 | 0 | X > Y |
| 1485 | // 0 | 0 | 1 | X < Y |
| 1486 | // 1 | 0 | 0 | X == Y |
| 1487 | // 1 | 1 | 1 | unordered |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 1488 | bool Flip = false; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1489 | switch (SetCCOpcode) { |
| 1490 | default: break; |
| 1491 | case ISD::SETUEQ: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1492 | case ISD::SETEQ: X86CC = X86::COND_E; break; |
Evan Cheng | 5001ea1 | 2006-04-17 07:24:10 +0000 | [diff] [blame] | 1493 | case ISD::SETOLT: Flip = true; // Fallthrough |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1494 | case ISD::SETOGT: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1495 | case ISD::SETGT: X86CC = X86::COND_A; break; |
Evan Cheng | 5001ea1 | 2006-04-17 07:24:10 +0000 | [diff] [blame] | 1496 | case ISD::SETOLE: Flip = true; // Fallthrough |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1497 | case ISD::SETOGE: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1498 | case ISD::SETGE: X86CC = X86::COND_AE; break; |
Evan Cheng | 5001ea1 | 2006-04-17 07:24:10 +0000 | [diff] [blame] | 1499 | case ISD::SETUGT: Flip = true; // Fallthrough |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1500 | case ISD::SETULT: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1501 | case ISD::SETLT: X86CC = X86::COND_B; break; |
Evan Cheng | 5001ea1 | 2006-04-17 07:24:10 +0000 | [diff] [blame] | 1502 | case ISD::SETUGE: Flip = true; // Fallthrough |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1503 | case ISD::SETULE: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1504 | case ISD::SETLE: X86CC = X86::COND_BE; break; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1505 | case ISD::SETONE: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1506 | case ISD::SETNE: X86CC = X86::COND_NE; break; |
| 1507 | case ISD::SETUO: X86CC = X86::COND_P; break; |
| 1508 | case ISD::SETO: X86CC = X86::COND_NP; break; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1509 | } |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 1510 | if (Flip) |
| 1511 | std::swap(LHS, RHS); |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1512 | } |
Evan Cheng | 6dfa999 | 2006-01-30 23:41:35 +0000 | [diff] [blame] | 1513 | |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1514 | return X86CC != X86::COND_INVALID; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1515 | } |
| 1516 | |
Evan Cheng | 4a46080 | 2006-01-11 00:33:36 +0000 | [diff] [blame] | 1517 | /// hasFPCMov - is there a floating point cmov for the specific X86 condition |
| 1518 | /// code. Current x86 isa includes the following FP cmov instructions: |
Evan Cheng | aaca22c | 2006-01-10 20:26:56 +0000 | [diff] [blame] | 1519 | /// fcmovb, fcomvbe, fcomve, fcmovu, fcmovae, fcmova, fcmovne, fcmovnu. |
Evan Cheng | 4a46080 | 2006-01-11 00:33:36 +0000 | [diff] [blame] | 1520 | static bool hasFPCMov(unsigned X86CC) { |
Evan Cheng | aaca22c | 2006-01-10 20:26:56 +0000 | [diff] [blame] | 1521 | switch (X86CC) { |
| 1522 | default: |
| 1523 | return false; |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 1524 | case X86::COND_B: |
| 1525 | case X86::COND_BE: |
| 1526 | case X86::COND_E: |
| 1527 | case X86::COND_P: |
| 1528 | case X86::COND_A: |
| 1529 | case X86::COND_AE: |
| 1530 | case X86::COND_NE: |
| 1531 | case X86::COND_NP: |
Evan Cheng | aaca22c | 2006-01-10 20:26:56 +0000 | [diff] [blame] | 1532 | return true; |
| 1533 | } |
| 1534 | } |
| 1535 | |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1536 | /// isUndefOrInRange - Op is either an undef node or a ConstantSDNode. Return |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1537 | /// true if Op is undef or if its value falls within the specified range (L, H]. |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1538 | static bool isUndefOrInRange(SDOperand Op, unsigned Low, unsigned Hi) { |
| 1539 | if (Op.getOpcode() == ISD::UNDEF) |
| 1540 | return true; |
| 1541 | |
| 1542 | unsigned Val = cast<ConstantSDNode>(Op)->getValue(); |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1543 | return (Val >= Low && Val < Hi); |
| 1544 | } |
| 1545 | |
| 1546 | /// isUndefOrEqual - Op is either an undef node or a ConstantSDNode. Return |
| 1547 | /// true if Op is undef or if its value equal to the specified value. |
| 1548 | static bool isUndefOrEqual(SDOperand Op, unsigned Val) { |
| 1549 | if (Op.getOpcode() == ISD::UNDEF) |
| 1550 | return true; |
| 1551 | return cast<ConstantSDNode>(Op)->getValue() == Val; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1552 | } |
| 1553 | |
Evan Cheng | 0188ecb | 2006-03-22 18:59:22 +0000 | [diff] [blame] | 1554 | /// isPSHUFDMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1555 | /// specifies a shuffle of elements that is suitable for input to PSHUFD. |
| 1556 | bool X86::isPSHUFDMask(SDNode *N) { |
| 1557 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1558 | |
| 1559 | if (N->getNumOperands() != 4) |
| 1560 | return false; |
| 1561 | |
| 1562 | // Check if the value doesn't reference the second vector. |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1563 | for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 1564 | SDOperand Arg = N->getOperand(i); |
| 1565 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 1566 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 1567 | if (cast<ConstantSDNode>(Arg)->getValue() >= 4) |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1568 | return false; |
| 1569 | } |
| 1570 | |
| 1571 | return true; |
| 1572 | } |
| 1573 | |
| 1574 | /// isPSHUFHWMask - Return true if the specified VECTOR_SHUFFLE operand |
Evan Cheng | c21a053 | 2006-04-05 01:47:37 +0000 | [diff] [blame] | 1575 | /// specifies a shuffle of elements that is suitable for input to PSHUFHW. |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1576 | bool X86::isPSHUFHWMask(SDNode *N) { |
| 1577 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1578 | |
| 1579 | if (N->getNumOperands() != 8) |
| 1580 | return false; |
| 1581 | |
| 1582 | // Lower quadword copied in order. |
| 1583 | for (unsigned i = 0; i != 4; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 1584 | SDOperand Arg = N->getOperand(i); |
| 1585 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 1586 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 1587 | if (cast<ConstantSDNode>(Arg)->getValue() != i) |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1588 | return false; |
| 1589 | } |
| 1590 | |
| 1591 | // Upper quadword shuffled. |
| 1592 | for (unsigned i = 4; i != 8; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 1593 | SDOperand Arg = N->getOperand(i); |
| 1594 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 1595 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 1596 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1597 | if (Val < 4 || Val > 7) |
| 1598 | return false; |
| 1599 | } |
| 1600 | |
| 1601 | return true; |
| 1602 | } |
| 1603 | |
| 1604 | /// isPSHUFLWMask - Return true if the specified VECTOR_SHUFFLE operand |
Evan Cheng | c21a053 | 2006-04-05 01:47:37 +0000 | [diff] [blame] | 1605 | /// specifies a shuffle of elements that is suitable for input to PSHUFLW. |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1606 | bool X86::isPSHUFLWMask(SDNode *N) { |
| 1607 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1608 | |
| 1609 | if (N->getNumOperands() != 8) |
| 1610 | return false; |
| 1611 | |
| 1612 | // Upper quadword copied in order. |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1613 | for (unsigned i = 4; i != 8; ++i) |
| 1614 | if (!isUndefOrEqual(N->getOperand(i), i)) |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1615 | return false; |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1616 | |
| 1617 | // Lower quadword shuffled. |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1618 | for (unsigned i = 0; i != 4; ++i) |
| 1619 | if (!isUndefOrInRange(N->getOperand(i), 0, 4)) |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 1620 | return false; |
Evan Cheng | 0188ecb | 2006-03-22 18:59:22 +0000 | [diff] [blame] | 1621 | |
| 1622 | return true; |
| 1623 | } |
| 1624 | |
Evan Cheng | 14aed5e | 2006-03-24 01:18:28 +0000 | [diff] [blame] | 1625 | /// isSHUFPMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1626 | /// specifies a shuffle of elements that is suitable for input to SHUFP*. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1627 | static bool isSHUFPMask(const SDOperand *Elems, unsigned NumElems) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1628 | if (NumElems != 2 && NumElems != 4) return false; |
Evan Cheng | 14aed5e | 2006-03-24 01:18:28 +0000 | [diff] [blame] | 1629 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1630 | unsigned Half = NumElems / 2; |
| 1631 | for (unsigned i = 0; i < Half; ++i) |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1632 | if (!isUndefOrInRange(Elems[i], 0, NumElems)) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1633 | return false; |
| 1634 | for (unsigned i = Half; i < NumElems; ++i) |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1635 | if (!isUndefOrInRange(Elems[i], NumElems, NumElems*2)) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1636 | return false; |
Evan Cheng | 14aed5e | 2006-03-24 01:18:28 +0000 | [diff] [blame] | 1637 | |
| 1638 | return true; |
| 1639 | } |
| 1640 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1641 | bool X86::isSHUFPMask(SDNode *N) { |
| 1642 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1643 | return ::isSHUFPMask(N->op_begin(), N->getNumOperands()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1644 | } |
| 1645 | |
Evan Cheng | 213d2cf | 2007-05-17 18:45:50 +0000 | [diff] [blame] | 1646 | /// isCommutedSHUFP - Returns true if the shuffle mask is exactly |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1647 | /// the reverse of what x86 shuffles want. x86 shuffles requires the lower |
| 1648 | /// half elements to come from vector 1 (which would equal the dest.) and |
| 1649 | /// the upper half to come from vector 2. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1650 | static bool isCommutedSHUFP(const SDOperand *Ops, unsigned NumOps) { |
| 1651 | if (NumOps != 2 && NumOps != 4) return false; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1652 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1653 | unsigned Half = NumOps / 2; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1654 | for (unsigned i = 0; i < Half; ++i) |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1655 | if (!isUndefOrInRange(Ops[i], NumOps, NumOps*2)) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1656 | return false; |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1657 | for (unsigned i = Half; i < NumOps; ++i) |
| 1658 | if (!isUndefOrInRange(Ops[i], 0, NumOps)) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1659 | return false; |
| 1660 | return true; |
| 1661 | } |
| 1662 | |
| 1663 | static bool isCommutedSHUFP(SDNode *N) { |
| 1664 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1665 | return isCommutedSHUFP(N->op_begin(), N->getNumOperands()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1666 | } |
| 1667 | |
Evan Cheng | 2c0dbd0 | 2006-03-24 02:58:06 +0000 | [diff] [blame] | 1668 | /// isMOVHLPSMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1669 | /// specifies a shuffle of elements that is suitable for input to MOVHLPS. |
| 1670 | bool X86::isMOVHLPSMask(SDNode *N) { |
| 1671 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1672 | |
Evan Cheng | 2064a2b | 2006-03-28 06:50:32 +0000 | [diff] [blame] | 1673 | if (N->getNumOperands() != 4) |
Evan Cheng | 2c0dbd0 | 2006-03-24 02:58:06 +0000 | [diff] [blame] | 1674 | return false; |
| 1675 | |
Evan Cheng | 2064a2b | 2006-03-28 06:50:32 +0000 | [diff] [blame] | 1676 | // Expect bit0 == 6, bit1 == 7, bit2 == 2, bit3 == 3 |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1677 | return isUndefOrEqual(N->getOperand(0), 6) && |
| 1678 | isUndefOrEqual(N->getOperand(1), 7) && |
| 1679 | isUndefOrEqual(N->getOperand(2), 2) && |
| 1680 | isUndefOrEqual(N->getOperand(3), 3); |
Evan Cheng | 2064a2b | 2006-03-28 06:50:32 +0000 | [diff] [blame] | 1681 | } |
| 1682 | |
Evan Cheng | 6e56e2c | 2006-11-07 22:14:24 +0000 | [diff] [blame] | 1683 | /// isMOVHLPS_v_undef_Mask - Special case of isMOVHLPSMask for canonical form |
| 1684 | /// of vector_shuffle v, v, <2, 3, 2, 3>, i.e. vector_shuffle v, undef, |
| 1685 | /// <2, 3, 2, 3> |
| 1686 | bool X86::isMOVHLPS_v_undef_Mask(SDNode *N) { |
| 1687 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1688 | |
| 1689 | if (N->getNumOperands() != 4) |
| 1690 | return false; |
| 1691 | |
| 1692 | // Expect bit0 == 2, bit1 == 3, bit2 == 2, bit3 == 3 |
| 1693 | return isUndefOrEqual(N->getOperand(0), 2) && |
| 1694 | isUndefOrEqual(N->getOperand(1), 3) && |
| 1695 | isUndefOrEqual(N->getOperand(2), 2) && |
| 1696 | isUndefOrEqual(N->getOperand(3), 3); |
| 1697 | } |
| 1698 | |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1699 | /// isMOVLPMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1700 | /// specifies a shuffle of elements that is suitable for input to MOVLP{S|D}. |
| 1701 | bool X86::isMOVLPMask(SDNode *N) { |
| 1702 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1703 | |
| 1704 | unsigned NumElems = N->getNumOperands(); |
| 1705 | if (NumElems != 2 && NumElems != 4) |
| 1706 | return false; |
| 1707 | |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1708 | for (unsigned i = 0; i < NumElems/2; ++i) |
| 1709 | if (!isUndefOrEqual(N->getOperand(i), i + NumElems)) |
| 1710 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1711 | |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1712 | for (unsigned i = NumElems/2; i < NumElems; ++i) |
| 1713 | if (!isUndefOrEqual(N->getOperand(i), i)) |
| 1714 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1715 | |
| 1716 | return true; |
| 1717 | } |
| 1718 | |
| 1719 | /// isMOVHPMask - Return true if the specified VECTOR_SHUFFLE operand |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 1720 | /// specifies a shuffle of elements that is suitable for input to MOVHP{S|D} |
| 1721 | /// and MOVLHPS. |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1722 | bool X86::isMOVHPMask(SDNode *N) { |
| 1723 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1724 | |
| 1725 | unsigned NumElems = N->getNumOperands(); |
| 1726 | if (NumElems != 2 && NumElems != 4) |
| 1727 | return false; |
| 1728 | |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1729 | for (unsigned i = 0; i < NumElems/2; ++i) |
| 1730 | if (!isUndefOrEqual(N->getOperand(i), i)) |
| 1731 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1732 | |
| 1733 | for (unsigned i = 0; i < NumElems/2; ++i) { |
| 1734 | SDOperand Arg = N->getOperand(i + NumElems/2); |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1735 | if (!isUndefOrEqual(Arg, i + NumElems)) |
| 1736 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 1737 | } |
| 1738 | |
| 1739 | return true; |
| 1740 | } |
| 1741 | |
Evan Cheng | 0038e59 | 2006-03-28 00:39:58 +0000 | [diff] [blame] | 1742 | /// isUNPCKLMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1743 | /// specifies a shuffle of elements that is suitable for input to UNPCKL. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1744 | bool static isUNPCKLMask(const SDOperand *Elts, unsigned NumElts, |
| 1745 | bool V2IsSplat = false) { |
| 1746 | if (NumElts != 2 && NumElts != 4 && NumElts != 8 && NumElts != 16) |
Evan Cheng | 0038e59 | 2006-03-28 00:39:58 +0000 | [diff] [blame] | 1747 | return false; |
| 1748 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1749 | for (unsigned i = 0, j = 0; i != NumElts; i += 2, ++j) { |
| 1750 | SDOperand BitI = Elts[i]; |
| 1751 | SDOperand BitI1 = Elts[i+1]; |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1752 | if (!isUndefOrEqual(BitI, j)) |
| 1753 | return false; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1754 | if (V2IsSplat) { |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1755 | if (isUndefOrEqual(BitI1, NumElts)) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1756 | return false; |
| 1757 | } else { |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1758 | if (!isUndefOrEqual(BitI1, j + NumElts)) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1759 | return false; |
| 1760 | } |
Evan Cheng | 0038e59 | 2006-03-28 00:39:58 +0000 | [diff] [blame] | 1761 | } |
| 1762 | |
| 1763 | return true; |
| 1764 | } |
| 1765 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1766 | bool X86::isUNPCKLMask(SDNode *N, bool V2IsSplat) { |
| 1767 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1768 | return ::isUNPCKLMask(N->op_begin(), N->getNumOperands(), V2IsSplat); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1769 | } |
| 1770 | |
Evan Cheng | 4fcb922 | 2006-03-28 02:43:26 +0000 | [diff] [blame] | 1771 | /// isUNPCKHMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1772 | /// specifies a shuffle of elements that is suitable for input to UNPCKH. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1773 | bool static isUNPCKHMask(const SDOperand *Elts, unsigned NumElts, |
| 1774 | bool V2IsSplat = false) { |
| 1775 | if (NumElts != 2 && NumElts != 4 && NumElts != 8 && NumElts != 16) |
Evan Cheng | 4fcb922 | 2006-03-28 02:43:26 +0000 | [diff] [blame] | 1776 | return false; |
| 1777 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1778 | for (unsigned i = 0, j = 0; i != NumElts; i += 2, ++j) { |
| 1779 | SDOperand BitI = Elts[i]; |
| 1780 | SDOperand BitI1 = Elts[i+1]; |
| 1781 | if (!isUndefOrEqual(BitI, j + NumElts/2)) |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1782 | return false; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1783 | if (V2IsSplat) { |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1784 | if (isUndefOrEqual(BitI1, NumElts)) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1785 | return false; |
| 1786 | } else { |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1787 | if (!isUndefOrEqual(BitI1, j + NumElts/2 + NumElts)) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1788 | return false; |
| 1789 | } |
Evan Cheng | 4fcb922 | 2006-03-28 02:43:26 +0000 | [diff] [blame] | 1790 | } |
| 1791 | |
| 1792 | return true; |
| 1793 | } |
| 1794 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1795 | bool X86::isUNPCKHMask(SDNode *N, bool V2IsSplat) { |
| 1796 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1797 | return ::isUNPCKHMask(N->op_begin(), N->getNumOperands(), V2IsSplat); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1798 | } |
| 1799 | |
Evan Cheng | 1d5a8cc | 2006-04-05 07:20:06 +0000 | [diff] [blame] | 1800 | /// isUNPCKL_v_undef_Mask - Special case of isUNPCKLMask for canonical form |
| 1801 | /// of vector_shuffle v, v, <0, 4, 1, 5>, i.e. vector_shuffle v, undef, |
| 1802 | /// <0, 0, 1, 1> |
| 1803 | bool X86::isUNPCKL_v_undef_Mask(SDNode *N) { |
| 1804 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1805 | |
| 1806 | unsigned NumElems = N->getNumOperands(); |
Bill Wendling | 2f9bb1a | 2007-04-24 21:16:55 +0000 | [diff] [blame] | 1807 | if (NumElems != 2 && NumElems != 4 && NumElems != 8 && NumElems != 16) |
Evan Cheng | 1d5a8cc | 2006-04-05 07:20:06 +0000 | [diff] [blame] | 1808 | return false; |
| 1809 | |
| 1810 | for (unsigned i = 0, j = 0; i != NumElems; i += 2, ++j) { |
| 1811 | SDOperand BitI = N->getOperand(i); |
| 1812 | SDOperand BitI1 = N->getOperand(i+1); |
| 1813 | |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 1814 | if (!isUndefOrEqual(BitI, j)) |
| 1815 | return false; |
| 1816 | if (!isUndefOrEqual(BitI1, j)) |
| 1817 | return false; |
Evan Cheng | 1d5a8cc | 2006-04-05 07:20:06 +0000 | [diff] [blame] | 1818 | } |
| 1819 | |
| 1820 | return true; |
| 1821 | } |
| 1822 | |
Bill Wendling | 2f9bb1a | 2007-04-24 21:16:55 +0000 | [diff] [blame] | 1823 | /// isUNPCKH_v_undef_Mask - Special case of isUNPCKHMask for canonical form |
| 1824 | /// of vector_shuffle v, v, <2, 6, 3, 7>, i.e. vector_shuffle v, undef, |
| 1825 | /// <2, 2, 3, 3> |
| 1826 | bool X86::isUNPCKH_v_undef_Mask(SDNode *N) { |
| 1827 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1828 | |
| 1829 | unsigned NumElems = N->getNumOperands(); |
| 1830 | if (NumElems != 2 && NumElems != 4 && NumElems != 8 && NumElems != 16) |
| 1831 | return false; |
| 1832 | |
| 1833 | for (unsigned i = 0, j = NumElems / 2; i != NumElems; i += 2, ++j) { |
| 1834 | SDOperand BitI = N->getOperand(i); |
| 1835 | SDOperand BitI1 = N->getOperand(i + 1); |
| 1836 | |
| 1837 | if (!isUndefOrEqual(BitI, j)) |
| 1838 | return false; |
| 1839 | if (!isUndefOrEqual(BitI1, j)) |
| 1840 | return false; |
| 1841 | } |
| 1842 | |
| 1843 | return true; |
| 1844 | } |
| 1845 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 1846 | /// isMOVLMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1847 | /// specifies a shuffle of elements that is suitable for input to MOVSS, |
| 1848 | /// MOVSD, and MOVD, i.e. setting the lowest element. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1849 | static bool isMOVLMask(const SDOperand *Elts, unsigned NumElts) { |
| 1850 | if (NumElts != 2 && NumElts != 4 && NumElts != 8 && NumElts != 16) |
Evan Cheng | d6d1cbd | 2006-04-11 00:19:04 +0000 | [diff] [blame] | 1851 | return false; |
| 1852 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1853 | if (!isUndefOrEqual(Elts[0], NumElts)) |
Evan Cheng | d6d1cbd | 2006-04-11 00:19:04 +0000 | [diff] [blame] | 1854 | return false; |
| 1855 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1856 | for (unsigned i = 1; i < NumElts; ++i) { |
| 1857 | if (!isUndefOrEqual(Elts[i], i)) |
Evan Cheng | d6d1cbd | 2006-04-11 00:19:04 +0000 | [diff] [blame] | 1858 | return false; |
| 1859 | } |
| 1860 | |
| 1861 | return true; |
| 1862 | } |
Evan Cheng | 1d5a8cc | 2006-04-05 07:20:06 +0000 | [diff] [blame] | 1863 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 1864 | bool X86::isMOVLMask(SDNode *N) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1865 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1866 | return ::isMOVLMask(N->op_begin(), N->getNumOperands()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1867 | } |
| 1868 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 1869 | /// isCommutedMOVL - Returns true if the shuffle mask is except the reverse |
| 1870 | /// of what x86 movss want. X86 movs requires the lowest element to be lowest |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1871 | /// element of vector 2 and the other elements to come from vector 1 in order. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1872 | static bool isCommutedMOVL(const SDOperand *Ops, unsigned NumOps, |
| 1873 | bool V2IsSplat = false, |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 1874 | bool V2IsUndef = false) { |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1875 | if (NumOps != 2 && NumOps != 4 && NumOps != 8 && NumOps != 16) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1876 | return false; |
| 1877 | |
| 1878 | if (!isUndefOrEqual(Ops[0], 0)) |
| 1879 | return false; |
| 1880 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1881 | for (unsigned i = 1; i < NumOps; ++i) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1882 | SDOperand Arg = Ops[i]; |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1883 | if (!(isUndefOrEqual(Arg, i+NumOps) || |
| 1884 | (V2IsUndef && isUndefOrInRange(Arg, NumOps, NumOps*2)) || |
| 1885 | (V2IsSplat && isUndefOrEqual(Arg, NumOps)))) |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 1886 | return false; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1887 | } |
| 1888 | |
| 1889 | return true; |
| 1890 | } |
| 1891 | |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 1892 | static bool isCommutedMOVL(SDNode *N, bool V2IsSplat = false, |
| 1893 | bool V2IsUndef = false) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1894 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 1895 | return isCommutedMOVL(N->op_begin(), N->getNumOperands(), |
| 1896 | V2IsSplat, V2IsUndef); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 1897 | } |
| 1898 | |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 1899 | /// isMOVSHDUPMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1900 | /// specifies a shuffle of elements that is suitable for input to MOVSHDUP. |
| 1901 | bool X86::isMOVSHDUPMask(SDNode *N) { |
| 1902 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1903 | |
| 1904 | if (N->getNumOperands() != 4) |
| 1905 | return false; |
| 1906 | |
| 1907 | // Expect 1, 1, 3, 3 |
| 1908 | for (unsigned i = 0; i < 2; ++i) { |
| 1909 | SDOperand Arg = N->getOperand(i); |
| 1910 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 1911 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 1912 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 1913 | if (Val != 1) return false; |
| 1914 | } |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 1915 | |
| 1916 | bool HasHi = false; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 1917 | for (unsigned i = 2; i < 4; ++i) { |
| 1918 | SDOperand Arg = N->getOperand(i); |
| 1919 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 1920 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 1921 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 1922 | if (Val != 3) return false; |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 1923 | HasHi = true; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 1924 | } |
Evan Cheng | 39fc145 | 2006-04-15 03:13:24 +0000 | [diff] [blame] | 1925 | |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 1926 | // Don't use movshdup if it can be done with a shufps. |
| 1927 | return HasHi; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 1928 | } |
| 1929 | |
| 1930 | /// isMOVSLDUPMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1931 | /// specifies a shuffle of elements that is suitable for input to MOVSLDUP. |
| 1932 | bool X86::isMOVSLDUPMask(SDNode *N) { |
| 1933 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1934 | |
| 1935 | if (N->getNumOperands() != 4) |
| 1936 | return false; |
| 1937 | |
| 1938 | // Expect 0, 0, 2, 2 |
| 1939 | for (unsigned i = 0; i < 2; ++i) { |
| 1940 | SDOperand Arg = N->getOperand(i); |
| 1941 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 1942 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 1943 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 1944 | if (Val != 0) return false; |
| 1945 | } |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 1946 | |
| 1947 | bool HasHi = false; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 1948 | for (unsigned i = 2; i < 4; ++i) { |
| 1949 | SDOperand Arg = N->getOperand(i); |
| 1950 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 1951 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 1952 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 1953 | if (Val != 2) return false; |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 1954 | HasHi = true; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 1955 | } |
Evan Cheng | 39fc145 | 2006-04-15 03:13:24 +0000 | [diff] [blame] | 1956 | |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 1957 | // Don't use movshdup if it can be done with a shufps. |
| 1958 | return HasHi; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 1959 | } |
| 1960 | |
Evan Cheng | 49892af | 2007-06-19 00:02:56 +0000 | [diff] [blame] | 1961 | /// isIdentityMask - Return true if the specified VECTOR_SHUFFLE operand |
| 1962 | /// specifies a identity operation on the LHS or RHS. |
| 1963 | static bool isIdentityMask(SDNode *N, bool RHS = false) { |
| 1964 | unsigned NumElems = N->getNumOperands(); |
| 1965 | for (unsigned i = 0; i < NumElems; ++i) |
| 1966 | if (!isUndefOrEqual(N->getOperand(i), i + (RHS ? NumElems : 0))) |
| 1967 | return false; |
| 1968 | return true; |
| 1969 | } |
| 1970 | |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 1971 | /// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies |
| 1972 | /// a splat of a single element. |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 1973 | static bool isSplatMask(SDNode *N) { |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 1974 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 1975 | |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 1976 | // This is a splat operation if each element of the permute is the same, and |
| 1977 | // if the value doesn't reference the second vector. |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 1978 | unsigned NumElems = N->getNumOperands(); |
| 1979 | SDOperand ElementBase; |
| 1980 | unsigned i = 0; |
| 1981 | for (; i != NumElems; ++i) { |
| 1982 | SDOperand Elt = N->getOperand(i); |
Reid Spencer | 3ed469c | 2006-11-02 20:25:50 +0000 | [diff] [blame] | 1983 | if (isa<ConstantSDNode>(Elt)) { |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 1984 | ElementBase = Elt; |
| 1985 | break; |
| 1986 | } |
| 1987 | } |
| 1988 | |
| 1989 | if (!ElementBase.Val) |
| 1990 | return false; |
| 1991 | |
| 1992 | for (; i != NumElems; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 1993 | SDOperand Arg = N->getOperand(i); |
| 1994 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 1995 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 1996 | if (Arg != ElementBase) return false; |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 1997 | } |
| 1998 | |
| 1999 | // Make sure it is a splat of the first vector operand. |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 2000 | return cast<ConstantSDNode>(ElementBase)->getValue() < NumElems; |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 2001 | } |
| 2002 | |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2003 | /// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies |
| 2004 | /// a splat of a single element and it's a 2 or 4 element mask. |
| 2005 | bool X86::isSplatMask(SDNode *N) { |
| 2006 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2007 | |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 2008 | // We can only splat 64-bit, and 32-bit quantities with a single instruction. |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2009 | if (N->getNumOperands() != 4 && N->getNumOperands() != 2) |
| 2010 | return false; |
| 2011 | return ::isSplatMask(N); |
| 2012 | } |
| 2013 | |
Evan Cheng | f686d9b | 2006-10-27 21:08:32 +0000 | [diff] [blame] | 2014 | /// isSplatLoMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2015 | /// specifies a splat of zero element. |
| 2016 | bool X86::isSplatLoMask(SDNode *N) { |
| 2017 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2018 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2019 | for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) |
Evan Cheng | f686d9b | 2006-10-27 21:08:32 +0000 | [diff] [blame] | 2020 | if (!isUndefOrEqual(N->getOperand(i), 0)) |
| 2021 | return false; |
| 2022 | return true; |
| 2023 | } |
| 2024 | |
Evan Cheng | 63d3300 | 2006-03-22 08:01:21 +0000 | [diff] [blame] | 2025 | /// getShuffleSHUFImmediate - Return the appropriate immediate to shuffle |
| 2026 | /// the specified isShuffleMask VECTOR_SHUFFLE mask with PSHUF* and SHUFP* |
| 2027 | /// instructions. |
| 2028 | unsigned X86::getShuffleSHUFImmediate(SDNode *N) { |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 2029 | unsigned NumOperands = N->getNumOperands(); |
| 2030 | unsigned Shift = (NumOperands == 4) ? 2 : 1; |
| 2031 | unsigned Mask = 0; |
Evan Cheng | 36b27f3 | 2006-03-28 23:41:33 +0000 | [diff] [blame] | 2032 | for (unsigned i = 0; i < NumOperands; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2033 | unsigned Val = 0; |
| 2034 | SDOperand Arg = N->getOperand(NumOperands-i-1); |
| 2035 | if (Arg.getOpcode() != ISD::UNDEF) |
| 2036 | Val = cast<ConstantSDNode>(Arg)->getValue(); |
Evan Cheng | 14aed5e | 2006-03-24 01:18:28 +0000 | [diff] [blame] | 2037 | if (Val >= NumOperands) Val -= NumOperands; |
Evan Cheng | 63d3300 | 2006-03-22 08:01:21 +0000 | [diff] [blame] | 2038 | Mask |= Val; |
Evan Cheng | 36b27f3 | 2006-03-28 23:41:33 +0000 | [diff] [blame] | 2039 | if (i != NumOperands - 1) |
| 2040 | Mask <<= Shift; |
| 2041 | } |
Evan Cheng | 63d3300 | 2006-03-22 08:01:21 +0000 | [diff] [blame] | 2042 | |
| 2043 | return Mask; |
| 2044 | } |
| 2045 | |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2046 | /// getShufflePSHUFHWImmediate - Return the appropriate immediate to shuffle |
| 2047 | /// the specified isShuffleMask VECTOR_SHUFFLE mask with PSHUFHW |
| 2048 | /// instructions. |
| 2049 | unsigned X86::getShufflePSHUFHWImmediate(SDNode *N) { |
| 2050 | unsigned Mask = 0; |
| 2051 | // 8 nodes, but we only care about the last 4. |
| 2052 | for (unsigned i = 7; i >= 4; --i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2053 | unsigned Val = 0; |
| 2054 | SDOperand Arg = N->getOperand(i); |
| 2055 | if (Arg.getOpcode() != ISD::UNDEF) |
| 2056 | Val = cast<ConstantSDNode>(Arg)->getValue(); |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2057 | Mask |= (Val - 4); |
| 2058 | if (i != 4) |
| 2059 | Mask <<= 2; |
| 2060 | } |
| 2061 | |
| 2062 | return Mask; |
| 2063 | } |
| 2064 | |
| 2065 | /// getShufflePSHUFLWImmediate - Return the appropriate immediate to shuffle |
| 2066 | /// the specified isShuffleMask VECTOR_SHUFFLE mask with PSHUFLW |
| 2067 | /// instructions. |
| 2068 | unsigned X86::getShufflePSHUFLWImmediate(SDNode *N) { |
| 2069 | unsigned Mask = 0; |
| 2070 | // 8 nodes, but we only care about the first 4. |
| 2071 | for (int i = 3; i >= 0; --i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2072 | unsigned Val = 0; |
| 2073 | SDOperand Arg = N->getOperand(i); |
| 2074 | if (Arg.getOpcode() != ISD::UNDEF) |
| 2075 | Val = cast<ConstantSDNode>(Arg)->getValue(); |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2076 | Mask |= Val; |
| 2077 | if (i != 0) |
| 2078 | Mask <<= 2; |
| 2079 | } |
| 2080 | |
| 2081 | return Mask; |
| 2082 | } |
| 2083 | |
Evan Cheng | c21a053 | 2006-04-05 01:47:37 +0000 | [diff] [blame] | 2084 | /// isPSHUFHW_PSHUFLWMask - true if the specified VECTOR_SHUFFLE operand |
| 2085 | /// specifies a 8 element shuffle that can be broken into a pair of |
| 2086 | /// PSHUFHW and PSHUFLW. |
| 2087 | static bool isPSHUFHW_PSHUFLWMask(SDNode *N) { |
| 2088 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2089 | |
| 2090 | if (N->getNumOperands() != 8) |
| 2091 | return false; |
| 2092 | |
| 2093 | // Lower quadword shuffled. |
| 2094 | for (unsigned i = 0; i != 4; ++i) { |
| 2095 | SDOperand Arg = N->getOperand(i); |
| 2096 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2097 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2098 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2099 | if (Val > 4) |
| 2100 | return false; |
| 2101 | } |
| 2102 | |
| 2103 | // Upper quadword shuffled. |
| 2104 | for (unsigned i = 4; i != 8; ++i) { |
| 2105 | SDOperand Arg = N->getOperand(i); |
| 2106 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2107 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2108 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2109 | if (Val < 4 || Val > 7) |
| 2110 | return false; |
| 2111 | } |
| 2112 | |
| 2113 | return true; |
| 2114 | } |
| 2115 | |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2116 | /// CommuteVectorShuffle - Swap vector_shuffle operandsas well as |
| 2117 | /// values in ther permute mask. |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2118 | static SDOperand CommuteVectorShuffle(SDOperand Op, SDOperand &V1, |
| 2119 | SDOperand &V2, SDOperand &Mask, |
| 2120 | SelectionDAG &DAG) { |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2121 | MVT::ValueType VT = Op.getValueType(); |
| 2122 | MVT::ValueType MaskVT = Mask.getValueType(); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2123 | MVT::ValueType EltVT = MVT::getVectorElementType(MaskVT); |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2124 | unsigned NumElems = Mask.getNumOperands(); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2125 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2126 | |
| 2127 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2128 | SDOperand Arg = Mask.getOperand(i); |
Evan Cheng | 80d428c | 2006-04-19 22:48:17 +0000 | [diff] [blame] | 2129 | if (Arg.getOpcode() == ISD::UNDEF) { |
| 2130 | MaskVec.push_back(DAG.getNode(ISD::UNDEF, EltVT)); |
| 2131 | continue; |
| 2132 | } |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2133 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2134 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2135 | if (Val < NumElems) |
| 2136 | MaskVec.push_back(DAG.getConstant(Val + NumElems, EltVT)); |
| 2137 | else |
| 2138 | MaskVec.push_back(DAG.getConstant(Val - NumElems, EltVT)); |
| 2139 | } |
| 2140 | |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2141 | std::swap(V1, V2); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 2142 | Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2143 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2144 | } |
| 2145 | |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 2146 | /// ShouldXformToMOVHLPS - Return true if the node should be transformed to |
| 2147 | /// match movhlps. The lower half elements should come from upper half of |
| 2148 | /// V1 (and in order), and the upper half elements should come from the upper |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2149 | /// half of V2 (and in order). |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 2150 | static bool ShouldXformToMOVHLPS(SDNode *Mask) { |
| 2151 | unsigned NumElems = Mask->getNumOperands(); |
| 2152 | if (NumElems != 4) |
| 2153 | return false; |
| 2154 | for (unsigned i = 0, e = 2; i != e; ++i) |
| 2155 | if (!isUndefOrEqual(Mask->getOperand(i), i+2)) |
| 2156 | return false; |
| 2157 | for (unsigned i = 2; i != 4; ++i) |
| 2158 | if (!isUndefOrEqual(Mask->getOperand(i), i+4)) |
| 2159 | return false; |
| 2160 | return true; |
| 2161 | } |
| 2162 | |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2163 | /// isScalarLoadToVector - Returns true if the node is a scalar load that |
| 2164 | /// is promoted to a vector. |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 2165 | static inline bool isScalarLoadToVector(SDNode *N) { |
| 2166 | if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) { |
| 2167 | N = N->getOperand(0).Val; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 2168 | return ISD::isNON_EXTLoad(N); |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2169 | } |
| 2170 | return false; |
| 2171 | } |
| 2172 | |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 2173 | /// ShouldXformToMOVLP{S|D} - Return true if the node should be transformed to |
| 2174 | /// match movlp{s|d}. The lower half elements should come from lower half of |
| 2175 | /// V1 (and in order), and the upper half elements should come from the upper |
| 2176 | /// half of V2 (and in order). And since V1 will become the source of the |
| 2177 | /// MOVLP, it must be either a vector load or a scalar load to vector. |
Evan Cheng | 23425f5 | 2006-10-09 21:39:25 +0000 | [diff] [blame] | 2178 | static bool ShouldXformToMOVLP(SDNode *V1, SDNode *V2, SDNode *Mask) { |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 2179 | if (!ISD::isNON_EXTLoad(V1) && !isScalarLoadToVector(V1)) |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 2180 | return false; |
Evan Cheng | 23425f5 | 2006-10-09 21:39:25 +0000 | [diff] [blame] | 2181 | // Is V2 is a vector load, don't do this transformation. We will try to use |
| 2182 | // load folding shufps op. |
| 2183 | if (ISD::isNON_EXTLoad(V2)) |
| 2184 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2185 | |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 2186 | unsigned NumElems = Mask->getNumOperands(); |
| 2187 | if (NumElems != 2 && NumElems != 4) |
| 2188 | return false; |
| 2189 | for (unsigned i = 0, e = NumElems/2; i != e; ++i) |
| 2190 | if (!isUndefOrEqual(Mask->getOperand(i), i)) |
| 2191 | return false; |
| 2192 | for (unsigned i = NumElems/2; i != NumElems; ++i) |
| 2193 | if (!isUndefOrEqual(Mask->getOperand(i), i+NumElems)) |
| 2194 | return false; |
| 2195 | return true; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2196 | } |
| 2197 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2198 | /// isSplatVector - Returns true if N is a BUILD_VECTOR node whose elements are |
| 2199 | /// all the same. |
| 2200 | static bool isSplatVector(SDNode *N) { |
| 2201 | if (N->getOpcode() != ISD::BUILD_VECTOR) |
| 2202 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2203 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2204 | SDOperand SplatValue = N->getOperand(0); |
| 2205 | for (unsigned i = 1, e = N->getNumOperands(); i != e; ++i) |
| 2206 | if (N->getOperand(i) != SplatValue) |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2207 | return false; |
| 2208 | return true; |
| 2209 | } |
| 2210 | |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 2211 | /// isUndefShuffle - Returns true if N is a VECTOR_SHUFFLE that can be resolved |
| 2212 | /// to an undef. |
| 2213 | static bool isUndefShuffle(SDNode *N) { |
Evan Cheng | 213d2cf | 2007-05-17 18:45:50 +0000 | [diff] [blame] | 2214 | if (N->getOpcode() != ISD::VECTOR_SHUFFLE) |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 2215 | return false; |
| 2216 | |
| 2217 | SDOperand V1 = N->getOperand(0); |
| 2218 | SDOperand V2 = N->getOperand(1); |
| 2219 | SDOperand Mask = N->getOperand(2); |
| 2220 | unsigned NumElems = Mask.getNumOperands(); |
| 2221 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2222 | SDOperand Arg = Mask.getOperand(i); |
| 2223 | if (Arg.getOpcode() != ISD::UNDEF) { |
| 2224 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2225 | if (Val < NumElems && V1.getOpcode() != ISD::UNDEF) |
| 2226 | return false; |
| 2227 | else if (Val >= NumElems && V2.getOpcode() != ISD::UNDEF) |
| 2228 | return false; |
| 2229 | } |
| 2230 | } |
| 2231 | return true; |
| 2232 | } |
| 2233 | |
Evan Cheng | 213d2cf | 2007-05-17 18:45:50 +0000 | [diff] [blame] | 2234 | /// isZeroNode - Returns true if Elt is a constant zero or a floating point |
| 2235 | /// constant +0.0. |
| 2236 | static inline bool isZeroNode(SDOperand Elt) { |
| 2237 | return ((isa<ConstantSDNode>(Elt) && |
| 2238 | cast<ConstantSDNode>(Elt)->getValue() == 0) || |
| 2239 | (isa<ConstantFPSDNode>(Elt) && |
| 2240 | cast<ConstantFPSDNode>(Elt)->isExactlyValue(0.0))); |
| 2241 | } |
| 2242 | |
| 2243 | /// isZeroShuffle - Returns true if N is a VECTOR_SHUFFLE that can be resolved |
| 2244 | /// to an zero vector. |
| 2245 | static bool isZeroShuffle(SDNode *N) { |
| 2246 | if (N->getOpcode() != ISD::VECTOR_SHUFFLE) |
| 2247 | return false; |
| 2248 | |
| 2249 | SDOperand V1 = N->getOperand(0); |
| 2250 | SDOperand V2 = N->getOperand(1); |
| 2251 | SDOperand Mask = N->getOperand(2); |
| 2252 | unsigned NumElems = Mask.getNumOperands(); |
| 2253 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2254 | SDOperand Arg = Mask.getOperand(i); |
| 2255 | if (Arg.getOpcode() != ISD::UNDEF) { |
| 2256 | unsigned Idx = cast<ConstantSDNode>(Arg)->getValue(); |
| 2257 | if (Idx < NumElems) { |
| 2258 | unsigned Opc = V1.Val->getOpcode(); |
| 2259 | if (Opc == ISD::UNDEF) |
| 2260 | continue; |
| 2261 | if (Opc != ISD::BUILD_VECTOR || |
| 2262 | !isZeroNode(V1.Val->getOperand(Idx))) |
| 2263 | return false; |
| 2264 | } else if (Idx >= NumElems) { |
| 2265 | unsigned Opc = V2.Val->getOpcode(); |
| 2266 | if (Opc == ISD::UNDEF) |
| 2267 | continue; |
| 2268 | if (Opc != ISD::BUILD_VECTOR || |
| 2269 | !isZeroNode(V2.Val->getOperand(Idx - NumElems))) |
| 2270 | return false; |
| 2271 | } |
| 2272 | } |
| 2273 | } |
| 2274 | return true; |
| 2275 | } |
| 2276 | |
| 2277 | /// getZeroVector - Returns a vector of specified type with all zero elements. |
| 2278 | /// |
| 2279 | static SDOperand getZeroVector(MVT::ValueType VT, SelectionDAG &DAG) { |
| 2280 | assert(MVT::isVector(VT) && "Expected a vector type"); |
Dan Gohman | 237898a | 2007-05-24 14:33:05 +0000 | [diff] [blame] | 2281 | unsigned NumElems = MVT::getVectorNumElements(VT); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2282 | MVT::ValueType EVT = MVT::getVectorElementType(VT); |
Evan Cheng | 213d2cf | 2007-05-17 18:45:50 +0000 | [diff] [blame] | 2283 | bool isFP = MVT::isFloatingPoint(EVT); |
| 2284 | SDOperand Zero = isFP ? DAG.getConstantFP(0.0, EVT) : DAG.getConstant(0, EVT); |
| 2285 | SmallVector<SDOperand, 8> ZeroVec(NumElems, Zero); |
| 2286 | return DAG.getNode(ISD::BUILD_VECTOR, VT, &ZeroVec[0], ZeroVec.size()); |
| 2287 | } |
| 2288 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2289 | /// NormalizeMask - V2 is a splat, modify the mask (if needed) so all elements |
| 2290 | /// that point to V2 points to its first element. |
| 2291 | static SDOperand NormalizeMask(SDOperand Mask, SelectionDAG &DAG) { |
| 2292 | assert(Mask.getOpcode() == ISD::BUILD_VECTOR); |
| 2293 | |
| 2294 | bool Changed = false; |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2295 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2296 | unsigned NumElems = Mask.getNumOperands(); |
| 2297 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2298 | SDOperand Arg = Mask.getOperand(i); |
| 2299 | if (Arg.getOpcode() != ISD::UNDEF) { |
| 2300 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2301 | if (Val > NumElems) { |
| 2302 | Arg = DAG.getConstant(NumElems, Arg.getValueType()); |
| 2303 | Changed = true; |
| 2304 | } |
| 2305 | } |
| 2306 | MaskVec.push_back(Arg); |
| 2307 | } |
| 2308 | |
| 2309 | if (Changed) |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 2310 | Mask = DAG.getNode(ISD::BUILD_VECTOR, Mask.getValueType(), |
| 2311 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2312 | return Mask; |
| 2313 | } |
| 2314 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2315 | /// getMOVLMask - Returns a vector_shuffle mask for an movs{s|d}, movd |
| 2316 | /// operation of specified width. |
| 2317 | static SDOperand getMOVLMask(unsigned NumElems, SelectionDAG &DAG) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2318 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2319 | MVT::ValueType BaseVT = MVT::getVectorElementType(MaskVT); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2320 | |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2321 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2322 | MaskVec.push_back(DAG.getConstant(NumElems, BaseVT)); |
| 2323 | for (unsigned i = 1; i != NumElems; ++i) |
| 2324 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 2325 | return DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2326 | } |
| 2327 | |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2328 | /// getUnpacklMask - Returns a vector_shuffle mask for an unpackl operation |
| 2329 | /// of specified width. |
| 2330 | static SDOperand getUnpacklMask(unsigned NumElems, SelectionDAG &DAG) { |
| 2331 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2332 | MVT::ValueType BaseVT = MVT::getVectorElementType(MaskVT); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2333 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2334 | for (unsigned i = 0, e = NumElems/2; i != e; ++i) { |
| 2335 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
| 2336 | MaskVec.push_back(DAG.getConstant(i + NumElems, BaseVT)); |
| 2337 | } |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 2338 | return DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2339 | } |
| 2340 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2341 | /// getUnpackhMask - Returns a vector_shuffle mask for an unpackh operation |
| 2342 | /// of specified width. |
| 2343 | static SDOperand getUnpackhMask(unsigned NumElems, SelectionDAG &DAG) { |
| 2344 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2345 | MVT::ValueType BaseVT = MVT::getVectorElementType(MaskVT); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2346 | unsigned Half = NumElems/2; |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2347 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2348 | for (unsigned i = 0; i != Half; ++i) { |
| 2349 | MaskVec.push_back(DAG.getConstant(i + Half, BaseVT)); |
| 2350 | MaskVec.push_back(DAG.getConstant(i + NumElems + Half, BaseVT)); |
| 2351 | } |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 2352 | return DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2353 | } |
| 2354 | |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2355 | /// PromoteSplat - Promote a splat of v8i16 or v16i8 to v4i32. |
| 2356 | /// |
| 2357 | static SDOperand PromoteSplat(SDOperand Op, SelectionDAG &DAG) { |
| 2358 | SDOperand V1 = Op.getOperand(0); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2359 | SDOperand Mask = Op.getOperand(2); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2360 | MVT::ValueType VT = Op.getValueType(); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2361 | unsigned NumElems = Mask.getNumOperands(); |
| 2362 | Mask = getUnpacklMask(NumElems, DAG); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2363 | while (NumElems != 4) { |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2364 | V1 = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V1, Mask); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2365 | NumElems >>= 1; |
| 2366 | } |
| 2367 | V1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, V1); |
| 2368 | |
| 2369 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2370 | Mask = getZeroVector(MaskVT, DAG); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2371 | SDOperand Shuffle = DAG.getNode(ISD::VECTOR_SHUFFLE, MVT::v4i32, V1, |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2372 | DAG.getNode(ISD::UNDEF, MVT::v4i32), Mask); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2373 | return DAG.getNode(ISD::BIT_CONVERT, VT, Shuffle); |
| 2374 | } |
| 2375 | |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 2376 | /// getShuffleVectorZeroOrUndef - Return a vector_shuffle of the specified |
Evan Cheng | 213d2cf | 2007-05-17 18:45:50 +0000 | [diff] [blame] | 2377 | /// vector of zero or undef vector. |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 2378 | static SDOperand getShuffleVectorZeroOrUndef(SDOperand V2, MVT::ValueType VT, |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2379 | unsigned NumElems, unsigned Idx, |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 2380 | bool isZero, SelectionDAG &DAG) { |
| 2381 | SDOperand V1 = isZero ? getZeroVector(VT, DAG) : DAG.getNode(ISD::UNDEF, VT); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2382 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2383 | MVT::ValueType EVT = MVT::getVectorElementType(MaskVT); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2384 | SDOperand Zero = DAG.getConstant(0, EVT); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2385 | SmallVector<SDOperand, 8> MaskVec(NumElems, Zero); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2386 | MaskVec[Idx] = DAG.getConstant(NumElems, EVT); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 2387 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2388 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 2389 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2390 | } |
| 2391 | |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 2392 | /// LowerBuildVectorv16i8 - Custom lower build_vector of v16i8. |
| 2393 | /// |
| 2394 | static SDOperand LowerBuildVectorv16i8(SDOperand Op, unsigned NonZeros, |
| 2395 | unsigned NumNonZero, unsigned NumZero, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2396 | SelectionDAG &DAG, TargetLowering &TLI) { |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 2397 | if (NumNonZero > 8) |
| 2398 | return SDOperand(); |
| 2399 | |
| 2400 | SDOperand V(0, 0); |
| 2401 | bool First = true; |
| 2402 | for (unsigned i = 0; i < 16; ++i) { |
| 2403 | bool ThisIsNonZero = (NonZeros & (1 << i)) != 0; |
| 2404 | if (ThisIsNonZero && First) { |
| 2405 | if (NumZero) |
| 2406 | V = getZeroVector(MVT::v8i16, DAG); |
| 2407 | else |
| 2408 | V = DAG.getNode(ISD::UNDEF, MVT::v8i16); |
| 2409 | First = false; |
| 2410 | } |
| 2411 | |
| 2412 | if ((i & 1) != 0) { |
| 2413 | SDOperand ThisElt(0, 0), LastElt(0, 0); |
| 2414 | bool LastIsNonZero = (NonZeros & (1 << (i-1))) != 0; |
| 2415 | if (LastIsNonZero) { |
| 2416 | LastElt = DAG.getNode(ISD::ZERO_EXTEND, MVT::i16, Op.getOperand(i-1)); |
| 2417 | } |
| 2418 | if (ThisIsNonZero) { |
| 2419 | ThisElt = DAG.getNode(ISD::ZERO_EXTEND, MVT::i16, Op.getOperand(i)); |
| 2420 | ThisElt = DAG.getNode(ISD::SHL, MVT::i16, |
| 2421 | ThisElt, DAG.getConstant(8, MVT::i8)); |
| 2422 | if (LastIsNonZero) |
| 2423 | ThisElt = DAG.getNode(ISD::OR, MVT::i16, ThisElt, LastElt); |
| 2424 | } else |
| 2425 | ThisElt = LastElt; |
| 2426 | |
| 2427 | if (ThisElt.Val) |
| 2428 | V = DAG.getNode(ISD::INSERT_VECTOR_ELT, MVT::v8i16, V, ThisElt, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2429 | DAG.getConstant(i/2, TLI.getPointerTy())); |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 2430 | } |
| 2431 | } |
| 2432 | |
| 2433 | return DAG.getNode(ISD::BIT_CONVERT, MVT::v16i8, V); |
| 2434 | } |
| 2435 | |
Bill Wendling | a348c56 | 2007-03-22 18:42:45 +0000 | [diff] [blame] | 2436 | /// LowerBuildVectorv8i16 - Custom lower build_vector of v8i16. |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 2437 | /// |
| 2438 | static SDOperand LowerBuildVectorv8i16(SDOperand Op, unsigned NonZeros, |
| 2439 | unsigned NumNonZero, unsigned NumZero, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2440 | SelectionDAG &DAG, TargetLowering &TLI) { |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 2441 | if (NumNonZero > 4) |
| 2442 | return SDOperand(); |
| 2443 | |
| 2444 | SDOperand V(0, 0); |
| 2445 | bool First = true; |
| 2446 | for (unsigned i = 0; i < 8; ++i) { |
| 2447 | bool isNonZero = (NonZeros & (1 << i)) != 0; |
| 2448 | if (isNonZero) { |
| 2449 | if (First) { |
| 2450 | if (NumZero) |
| 2451 | V = getZeroVector(MVT::v8i16, DAG); |
| 2452 | else |
| 2453 | V = DAG.getNode(ISD::UNDEF, MVT::v8i16); |
| 2454 | First = false; |
| 2455 | } |
| 2456 | V = DAG.getNode(ISD::INSERT_VECTOR_ELT, MVT::v8i16, V, Op.getOperand(i), |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2457 | DAG.getConstant(i, TLI.getPointerTy())); |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 2458 | } |
| 2459 | } |
| 2460 | |
| 2461 | return V; |
| 2462 | } |
| 2463 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2464 | SDOperand |
| 2465 | X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { |
| 2466 | // All zero's are handled with pxor. |
| 2467 | if (ISD::isBuildVectorAllZeros(Op.Val)) |
| 2468 | return Op; |
| 2469 | |
| 2470 | // All one's are handled with pcmpeqd. |
| 2471 | if (ISD::isBuildVectorAllOnes(Op.Val)) |
| 2472 | return Op; |
| 2473 | |
| 2474 | MVT::ValueType VT = Op.getValueType(); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2475 | MVT::ValueType EVT = MVT::getVectorElementType(VT); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2476 | unsigned EVTBits = MVT::getSizeInBits(EVT); |
| 2477 | |
| 2478 | unsigned NumElems = Op.getNumOperands(); |
| 2479 | unsigned NumZero = 0; |
| 2480 | unsigned NumNonZero = 0; |
| 2481 | unsigned NonZeros = 0; |
| 2482 | std::set<SDOperand> Values; |
| 2483 | for (unsigned i = 0; i < NumElems; ++i) { |
| 2484 | SDOperand Elt = Op.getOperand(i); |
| 2485 | if (Elt.getOpcode() != ISD::UNDEF) { |
| 2486 | Values.insert(Elt); |
| 2487 | if (isZeroNode(Elt)) |
| 2488 | NumZero++; |
| 2489 | else { |
| 2490 | NonZeros |= (1 << i); |
| 2491 | NumNonZero++; |
| 2492 | } |
| 2493 | } |
| 2494 | } |
| 2495 | |
Dan Gohman | 7f32156 | 2007-06-25 16:23:39 +0000 | [diff] [blame] | 2496 | if (NumNonZero == 0) { |
| 2497 | if (NumZero == 0) |
| 2498 | // All undef vector. Return an UNDEF. |
| 2499 | return DAG.getNode(ISD::UNDEF, VT); |
| 2500 | else |
| 2501 | // A mix of zero and undef. Return a zero vector. |
| 2502 | return getZeroVector(VT, DAG); |
| 2503 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2504 | |
| 2505 | // Splat is obviously ok. Let legalizer expand it to a shuffle. |
| 2506 | if (Values.size() == 1) |
| 2507 | return SDOperand(); |
| 2508 | |
| 2509 | // Special case for single non-zero element. |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2510 | if (NumNonZero == 1) { |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2511 | unsigned Idx = CountTrailingZeros_32(NonZeros); |
| 2512 | SDOperand Item = Op.getOperand(Idx); |
| 2513 | Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); |
| 2514 | if (Idx == 0) |
| 2515 | // Turn it into a MOVL (i.e. movss, movsd, or movd) to a zero vector. |
| 2516 | return getShuffleVectorZeroOrUndef(Item, VT, NumElems, Idx, |
| 2517 | NumZero > 0, DAG); |
| 2518 | |
| 2519 | if (EVTBits == 32) { |
| 2520 | // Turn it into a shuffle of zero and zero-extended scalar to vector. |
| 2521 | Item = getShuffleVectorZeroOrUndef(Item, VT, NumElems, 0, NumZero > 0, |
| 2522 | DAG); |
| 2523 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2524 | MVT::ValueType MaskEVT = MVT::getVectorElementType(MaskVT); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2525 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2526 | for (unsigned i = 0; i < NumElems; i++) |
| 2527 | MaskVec.push_back(DAG.getConstant((i == Idx) ? 0 : 1, MaskEVT)); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 2528 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2529 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2530 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, Item, |
| 2531 | DAG.getNode(ISD::UNDEF, VT), Mask); |
| 2532 | } |
| 2533 | } |
| 2534 | |
Bill Wendling | 2f9bb1a | 2007-04-24 21:16:55 +0000 | [diff] [blame] | 2535 | // Let legalizer expand 2-wide build_vectors. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2536 | if (EVTBits == 64) |
| 2537 | return SDOperand(); |
| 2538 | |
| 2539 | // If element VT is < 32 bits, convert it to inserts into a zero vector. |
Bill Wendling | 826f36f | 2007-03-28 00:57:11 +0000 | [diff] [blame] | 2540 | if (EVTBits == 8 && NumElems == 16) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2541 | SDOperand V = LowerBuildVectorv16i8(Op, NonZeros,NumNonZero,NumZero, DAG, |
| 2542 | *this); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2543 | if (V.Val) return V; |
| 2544 | } |
| 2545 | |
Bill Wendling | 826f36f | 2007-03-28 00:57:11 +0000 | [diff] [blame] | 2546 | if (EVTBits == 16 && NumElems == 8) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2547 | SDOperand V = LowerBuildVectorv8i16(Op, NonZeros,NumNonZero,NumZero, DAG, |
| 2548 | *this); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2549 | if (V.Val) return V; |
| 2550 | } |
| 2551 | |
| 2552 | // If element VT is == 32 bits, turn it into a number of shuffles. |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2553 | SmallVector<SDOperand, 8> V; |
| 2554 | V.resize(NumElems); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2555 | if (NumElems == 4 && NumZero > 0) { |
| 2556 | for (unsigned i = 0; i < 4; ++i) { |
| 2557 | bool isZero = !(NonZeros & (1 << i)); |
| 2558 | if (isZero) |
| 2559 | V[i] = getZeroVector(VT, DAG); |
| 2560 | else |
| 2561 | V[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Op.getOperand(i)); |
| 2562 | } |
| 2563 | |
| 2564 | for (unsigned i = 0; i < 2; ++i) { |
| 2565 | switch ((NonZeros & (0x3 << i*2)) >> (i*2)) { |
| 2566 | default: break; |
| 2567 | case 0: |
| 2568 | V[i] = V[i*2]; // Must be a zero vector. |
| 2569 | break; |
| 2570 | case 1: |
| 2571 | V[i] = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[i*2+1], V[i*2], |
| 2572 | getMOVLMask(NumElems, DAG)); |
| 2573 | break; |
| 2574 | case 2: |
| 2575 | V[i] = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[i*2], V[i*2+1], |
| 2576 | getMOVLMask(NumElems, DAG)); |
| 2577 | break; |
| 2578 | case 3: |
| 2579 | V[i] = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[i*2], V[i*2+1], |
| 2580 | getUnpacklMask(NumElems, DAG)); |
| 2581 | break; |
| 2582 | } |
| 2583 | } |
| 2584 | |
Evan Cheng | 069287d | 2006-05-16 07:21:53 +0000 | [diff] [blame] | 2585 | // Take advantage of the fact GR32 to VR128 scalar_to_vector (i.e. movd) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2586 | // clears the upper bits. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2587 | // FIXME: we can do the same for v4f32 case when we know both parts of |
| 2588 | // the lower half come from scalar_to_vector (loadf32). We should do |
| 2589 | // that in post legalizer dag combiner with target specific hooks. |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2590 | if (MVT::isInteger(EVT) && (NonZeros & (0x3 << 2)) == 0) |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2591 | return V[0]; |
| 2592 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2593 | MVT::ValueType EVT = MVT::getVectorElementType(MaskVT); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2594 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2595 | bool Reverse = (NonZeros & 0x3) == 2; |
| 2596 | for (unsigned i = 0; i < 2; ++i) |
| 2597 | if (Reverse) |
| 2598 | MaskVec.push_back(DAG.getConstant(1-i, EVT)); |
| 2599 | else |
| 2600 | MaskVec.push_back(DAG.getConstant(i, EVT)); |
| 2601 | Reverse = ((NonZeros & (0x3 << 2)) >> 2) == 2; |
| 2602 | for (unsigned i = 0; i < 2; ++i) |
| 2603 | if (Reverse) |
| 2604 | MaskVec.push_back(DAG.getConstant(1-i+NumElems, EVT)); |
| 2605 | else |
| 2606 | MaskVec.push_back(DAG.getConstant(i+NumElems, EVT)); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2607 | SDOperand ShufMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2608 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2609 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[0], V[1], ShufMask); |
| 2610 | } |
| 2611 | |
| 2612 | if (Values.size() > 2) { |
| 2613 | // Expand into a number of unpckl*. |
| 2614 | // e.g. for v4f32 |
| 2615 | // Step 1: unpcklps 0, 2 ==> X: <?, ?, 2, 0> |
| 2616 | // : unpcklps 1, 3 ==> Y: <?, ?, 3, 1> |
| 2617 | // Step 2: unpcklps X, Y ==> <3, 2, 1, 0> |
| 2618 | SDOperand UnpckMask = getUnpacklMask(NumElems, DAG); |
| 2619 | for (unsigned i = 0; i < NumElems; ++i) |
| 2620 | V[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Op.getOperand(i)); |
| 2621 | NumElems >>= 1; |
| 2622 | while (NumElems != 0) { |
| 2623 | for (unsigned i = 0; i < NumElems; ++i) |
| 2624 | V[i] = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[i], V[i + NumElems], |
| 2625 | UnpckMask); |
| 2626 | NumElems >>= 1; |
| 2627 | } |
| 2628 | return V[0]; |
| 2629 | } |
| 2630 | |
| 2631 | return SDOperand(); |
| 2632 | } |
| 2633 | |
| 2634 | SDOperand |
| 2635 | X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) { |
| 2636 | SDOperand V1 = Op.getOperand(0); |
| 2637 | SDOperand V2 = Op.getOperand(1); |
| 2638 | SDOperand PermMask = Op.getOperand(2); |
| 2639 | MVT::ValueType VT = Op.getValueType(); |
| 2640 | unsigned NumElems = PermMask.getNumOperands(); |
| 2641 | bool V1IsUndef = V1.getOpcode() == ISD::UNDEF; |
| 2642 | bool V2IsUndef = V2.getOpcode() == ISD::UNDEF; |
Evan Cheng | d9b8e40 | 2006-10-16 06:36:00 +0000 | [diff] [blame] | 2643 | bool V1IsSplat = false; |
| 2644 | bool V2IsSplat = false; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2645 | |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 2646 | if (isUndefShuffle(Op.Val)) |
| 2647 | return DAG.getNode(ISD::UNDEF, VT); |
| 2648 | |
Evan Cheng | 213d2cf | 2007-05-17 18:45:50 +0000 | [diff] [blame] | 2649 | if (isZeroShuffle(Op.Val)) |
| 2650 | return getZeroVector(VT, DAG); |
| 2651 | |
Evan Cheng | 49892af | 2007-06-19 00:02:56 +0000 | [diff] [blame] | 2652 | if (isIdentityMask(PermMask.Val)) |
| 2653 | return V1; |
| 2654 | else if (isIdentityMask(PermMask.Val, true)) |
| 2655 | return V2; |
| 2656 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2657 | if (isSplatMask(PermMask.Val)) { |
| 2658 | if (NumElems <= 4) return Op; |
| 2659 | // Promote it to a v4i32 splat. |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2660 | return PromoteSplat(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2661 | } |
| 2662 | |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2663 | if (X86::isMOVLMask(PermMask.Val)) |
| 2664 | return (V1IsUndef) ? V2 : Op; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2665 | |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2666 | if (X86::isMOVSHDUPMask(PermMask.Val) || |
| 2667 | X86::isMOVSLDUPMask(PermMask.Val) || |
| 2668 | X86::isMOVHLPSMask(PermMask.Val) || |
| 2669 | X86::isMOVHPMask(PermMask.Val) || |
| 2670 | X86::isMOVLPMask(PermMask.Val)) |
| 2671 | return Op; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2672 | |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2673 | if (ShouldXformToMOVHLPS(PermMask.Val) || |
| 2674 | ShouldXformToMOVLP(V1.Val, V2.Val, PermMask.Val)) |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2675 | return CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2676 | |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2677 | bool Commuted = false; |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2678 | V1IsSplat = isSplatVector(V1.Val); |
| 2679 | V2IsSplat = isSplatVector(V2.Val); |
| 2680 | if ((V1IsSplat || V1IsUndef) && !(V2IsSplat || V2IsUndef)) { |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2681 | Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2682 | std::swap(V1IsSplat, V2IsSplat); |
| 2683 | std::swap(V1IsUndef, V2IsUndef); |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2684 | Commuted = true; |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2685 | } |
| 2686 | |
| 2687 | if (isCommutedMOVL(PermMask.Val, V2IsSplat, V2IsUndef)) { |
| 2688 | if (V2IsUndef) return V1; |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2689 | Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2690 | if (V2IsSplat) { |
| 2691 | // V2 is a splat, so the mask may be malformed. That is, it may point |
| 2692 | // to any V2 element. The instruction selectior won't like this. Get |
| 2693 | // a corrected mask and commute to form a proper MOVS{S|D}. |
| 2694 | SDOperand NewMask = getMOVLMask(NumElems, DAG); |
| 2695 | if (NewMask.Val != PermMask.Val) |
| 2696 | Op = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, NewMask); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2697 | } |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2698 | return Op; |
Evan Cheng | d9b8e40 | 2006-10-16 06:36:00 +0000 | [diff] [blame] | 2699 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2700 | |
Evan Cheng | d9b8e40 | 2006-10-16 06:36:00 +0000 | [diff] [blame] | 2701 | if (X86::isUNPCKL_v_undef_Mask(PermMask.Val) || |
Bill Wendling | 2f9bb1a | 2007-04-24 21:16:55 +0000 | [diff] [blame] | 2702 | X86::isUNPCKH_v_undef_Mask(PermMask.Val) || |
Evan Cheng | d9b8e40 | 2006-10-16 06:36:00 +0000 | [diff] [blame] | 2703 | X86::isUNPCKLMask(PermMask.Val) || |
| 2704 | X86::isUNPCKHMask(PermMask.Val)) |
| 2705 | return Op; |
Evan Cheng | e111303 | 2006-10-04 18:33:38 +0000 | [diff] [blame] | 2706 | |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2707 | if (V2IsSplat) { |
| 2708 | // Normalize mask so all entries that point to V2 points to its first |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2709 | // element then try to match unpck{h|l} again. If match, return a |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 2710 | // new vector_shuffle with the corrected mask. |
| 2711 | SDOperand NewMask = NormalizeMask(PermMask, DAG); |
| 2712 | if (NewMask.Val != PermMask.Val) { |
| 2713 | if (X86::isUNPCKLMask(PermMask.Val, true)) { |
| 2714 | SDOperand NewMask = getUnpacklMask(NumElems, DAG); |
| 2715 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, NewMask); |
| 2716 | } else if (X86::isUNPCKHMask(PermMask.Val, true)) { |
| 2717 | SDOperand NewMask = getUnpackhMask(NumElems, DAG); |
| 2718 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, NewMask); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2719 | } |
| 2720 | } |
| 2721 | } |
| 2722 | |
| 2723 | // Normalize the node to match x86 shuffle ops if needed |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2724 | if (V2.getOpcode() != ISD::UNDEF && isCommutedSHUFP(PermMask.Val)) |
| 2725 | Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
| 2726 | |
| 2727 | if (Commuted) { |
| 2728 | // Commute is back and try unpck* again. |
| 2729 | Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
| 2730 | if (X86::isUNPCKL_v_undef_Mask(PermMask.Val) || |
Bill Wendling | 2f9bb1a | 2007-04-24 21:16:55 +0000 | [diff] [blame] | 2731 | X86::isUNPCKH_v_undef_Mask(PermMask.Val) || |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2732 | X86::isUNPCKLMask(PermMask.Val) || |
| 2733 | X86::isUNPCKHMask(PermMask.Val)) |
| 2734 | return Op; |
| 2735 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2736 | |
| 2737 | // If VT is integer, try PSHUF* first, then SHUFP*. |
| 2738 | if (MVT::isInteger(VT)) { |
| 2739 | if (X86::isPSHUFDMask(PermMask.Val) || |
| 2740 | X86::isPSHUFHWMask(PermMask.Val) || |
| 2741 | X86::isPSHUFLWMask(PermMask.Val)) { |
| 2742 | if (V2.getOpcode() != ISD::UNDEF) |
| 2743 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, |
| 2744 | DAG.getNode(ISD::UNDEF, V1.getValueType()),PermMask); |
| 2745 | return Op; |
| 2746 | } |
| 2747 | |
Chris Lattner | 07c70cd | 2007-05-17 17:13:13 +0000 | [diff] [blame] | 2748 | if (X86::isSHUFPMask(PermMask.Val) && |
| 2749 | MVT::getSizeInBits(VT) != 64) // Don't do this for MMX. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2750 | return Op; |
| 2751 | |
| 2752 | // Handle v8i16 shuffle high / low shuffle node pair. |
| 2753 | if (VT == MVT::v8i16 && isPSHUFHW_PSHUFLWMask(PermMask.Val)) { |
| 2754 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2755 | MVT::ValueType BaseVT = MVT::getVectorElementType(MaskVT); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2756 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2757 | for (unsigned i = 0; i != 4; ++i) |
| 2758 | MaskVec.push_back(PermMask.getOperand(i)); |
| 2759 | for (unsigned i = 4; i != 8; ++i) |
| 2760 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2761 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2762 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2763 | V1 = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); |
| 2764 | MaskVec.clear(); |
| 2765 | for (unsigned i = 0; i != 4; ++i) |
| 2766 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
| 2767 | for (unsigned i = 4; i != 8; ++i) |
| 2768 | MaskVec.push_back(PermMask.getOperand(i)); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2769 | Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0],MaskVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2770 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); |
| 2771 | } |
| 2772 | } else { |
| 2773 | // Floating point cases in the other order. |
| 2774 | if (X86::isSHUFPMask(PermMask.Val)) |
| 2775 | return Op; |
| 2776 | if (X86::isPSHUFDMask(PermMask.Val) || |
| 2777 | X86::isPSHUFHWMask(PermMask.Val) || |
| 2778 | X86::isPSHUFLWMask(PermMask.Val)) { |
| 2779 | if (V2.getOpcode() != ISD::UNDEF) |
| 2780 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, |
| 2781 | DAG.getNode(ISD::UNDEF, V1.getValueType()),PermMask); |
| 2782 | return Op; |
| 2783 | } |
| 2784 | } |
| 2785 | |
Chris Lattner | 07c70cd | 2007-05-17 17:13:13 +0000 | [diff] [blame] | 2786 | if (NumElems == 4 && |
| 2787 | // Don't do this for MMX. |
| 2788 | MVT::getSizeInBits(VT) != 64) { |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2789 | MVT::ValueType MaskVT = PermMask.getValueType(); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2790 | MVT::ValueType MaskEVT = MVT::getVectorElementType(MaskVT); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2791 | SmallVector<std::pair<int, int>, 8> Locs; |
Evan Cheng | 43f3bd3 | 2006-04-28 07:03:38 +0000 | [diff] [blame] | 2792 | Locs.reserve(NumElems); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2793 | SmallVector<SDOperand, 8> Mask1(NumElems, DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 2794 | SmallVector<SDOperand, 8> Mask2(NumElems, DAG.getNode(ISD::UNDEF, MaskEVT)); |
Evan Cheng | 43f3bd3 | 2006-04-28 07:03:38 +0000 | [diff] [blame] | 2795 | unsigned NumHi = 0; |
| 2796 | unsigned NumLo = 0; |
| 2797 | // If no more than two elements come from either vector. This can be |
| 2798 | // implemented with two shuffles. First shuffle gather the elements. |
| 2799 | // The second shuffle, which takes the first shuffle as both of its |
| 2800 | // vector operands, put the elements into the right order. |
| 2801 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2802 | SDOperand Elt = PermMask.getOperand(i); |
| 2803 | if (Elt.getOpcode() == ISD::UNDEF) { |
| 2804 | Locs[i] = std::make_pair(-1, -1); |
| 2805 | } else { |
| 2806 | unsigned Val = cast<ConstantSDNode>(Elt)->getValue(); |
| 2807 | if (Val < NumElems) { |
| 2808 | Locs[i] = std::make_pair(0, NumLo); |
| 2809 | Mask1[NumLo] = Elt; |
| 2810 | NumLo++; |
| 2811 | } else { |
| 2812 | Locs[i] = std::make_pair(1, NumHi); |
| 2813 | if (2+NumHi < NumElems) |
| 2814 | Mask1[2+NumHi] = Elt; |
| 2815 | NumHi++; |
| 2816 | } |
| 2817 | } |
| 2818 | } |
| 2819 | if (NumLo <= 2 && NumHi <= 2) { |
| 2820 | V1 = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2821 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2822 | &Mask1[0], Mask1.size())); |
Evan Cheng | 43f3bd3 | 2006-04-28 07:03:38 +0000 | [diff] [blame] | 2823 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2824 | if (Locs[i].first == -1) |
| 2825 | continue; |
| 2826 | else { |
| 2827 | unsigned Idx = (i < NumElems/2) ? 0 : NumElems; |
| 2828 | Idx += Locs[i].first * (NumElems/2) + Locs[i].second; |
| 2829 | Mask2[i] = DAG.getConstant(Idx, MaskEVT); |
| 2830 | } |
| 2831 | } |
| 2832 | |
| 2833 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V1, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2834 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2835 | &Mask2[0], Mask2.size())); |
Evan Cheng | 43f3bd3 | 2006-04-28 07:03:38 +0000 | [diff] [blame] | 2836 | } |
| 2837 | |
| 2838 | // Break it into (shuffle shuffle_hi, shuffle_lo). |
| 2839 | Locs.clear(); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2840 | SmallVector<SDOperand,8> LoMask(NumElems, DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 2841 | SmallVector<SDOperand,8> HiMask(NumElems, DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 2842 | SmallVector<SDOperand,8> *MaskPtr = &LoMask; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2843 | unsigned MaskIdx = 0; |
| 2844 | unsigned LoIdx = 0; |
| 2845 | unsigned HiIdx = NumElems/2; |
| 2846 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2847 | if (i == NumElems/2) { |
| 2848 | MaskPtr = &HiMask; |
| 2849 | MaskIdx = 1; |
| 2850 | LoIdx = 0; |
| 2851 | HiIdx = NumElems/2; |
| 2852 | } |
| 2853 | SDOperand Elt = PermMask.getOperand(i); |
| 2854 | if (Elt.getOpcode() == ISD::UNDEF) { |
| 2855 | Locs[i] = std::make_pair(-1, -1); |
| 2856 | } else if (cast<ConstantSDNode>(Elt)->getValue() < NumElems) { |
| 2857 | Locs[i] = std::make_pair(MaskIdx, LoIdx); |
| 2858 | (*MaskPtr)[LoIdx] = Elt; |
| 2859 | LoIdx++; |
| 2860 | } else { |
| 2861 | Locs[i] = std::make_pair(MaskIdx, HiIdx); |
| 2862 | (*MaskPtr)[HiIdx] = Elt; |
| 2863 | HiIdx++; |
| 2864 | } |
| 2865 | } |
| 2866 | |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 2867 | SDOperand LoShuffle = |
| 2868 | DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2869 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2870 | &LoMask[0], LoMask.size())); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2871 | SDOperand HiShuffle = |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 2872 | DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2873 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2874 | &HiMask[0], HiMask.size())); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2875 | SmallVector<SDOperand, 8> MaskOps; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2876 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2877 | if (Locs[i].first == -1) { |
| 2878 | MaskOps.push_back(DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 2879 | } else { |
| 2880 | unsigned Idx = Locs[i].first * NumElems + Locs[i].second; |
| 2881 | MaskOps.push_back(DAG.getConstant(Idx, MaskEVT)); |
| 2882 | } |
| 2883 | } |
| 2884 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, LoShuffle, HiShuffle, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2885 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2886 | &MaskOps[0], MaskOps.size())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2887 | } |
| 2888 | |
| 2889 | return SDOperand(); |
| 2890 | } |
| 2891 | |
| 2892 | SDOperand |
| 2893 | X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) { |
| 2894 | if (!isa<ConstantSDNode>(Op.getOperand(1))) |
| 2895 | return SDOperand(); |
| 2896 | |
| 2897 | MVT::ValueType VT = Op.getValueType(); |
| 2898 | // TODO: handle v16i8. |
| 2899 | if (MVT::getSizeInBits(VT) == 16) { |
| 2900 | // Transform it so it match pextrw which produces a 32-bit result. |
| 2901 | MVT::ValueType EVT = (MVT::ValueType)(VT+1); |
| 2902 | SDOperand Extract = DAG.getNode(X86ISD::PEXTRW, EVT, |
| 2903 | Op.getOperand(0), Op.getOperand(1)); |
| 2904 | SDOperand Assert = DAG.getNode(ISD::AssertZext, EVT, Extract, |
| 2905 | DAG.getValueType(VT)); |
| 2906 | return DAG.getNode(ISD::TRUNCATE, VT, Assert); |
| 2907 | } else if (MVT::getSizeInBits(VT) == 32) { |
| 2908 | SDOperand Vec = Op.getOperand(0); |
| 2909 | unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
| 2910 | if (Idx == 0) |
| 2911 | return Op; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2912 | // SHUFPS the element to the lowest double word, then movss. |
| 2913 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2914 | SmallVector<SDOperand, 8> IdxVec; |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2915 | IdxVec.push_back(DAG.getConstant(Idx, MVT::getVectorElementType(MaskVT))); |
| 2916 | IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorElementType(MaskVT))); |
| 2917 | IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorElementType(MaskVT))); |
| 2918 | IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorElementType(MaskVT))); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2919 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2920 | &IdxVec[0], IdxVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2921 | Vec = DAG.getNode(ISD::VECTOR_SHUFFLE, Vec.getValueType(), |
Evan Cheng | 6e56e2c | 2006-11-07 22:14:24 +0000 | [diff] [blame] | 2922 | Vec, DAG.getNode(ISD::UNDEF, Vec.getValueType()), Mask); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2923 | return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, VT, Vec, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 2924 | DAG.getConstant(0, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2925 | } else if (MVT::getSizeInBits(VT) == 64) { |
| 2926 | SDOperand Vec = Op.getOperand(0); |
| 2927 | unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
| 2928 | if (Idx == 0) |
| 2929 | return Op; |
| 2930 | |
| 2931 | // UNPCKHPD the element to the lowest double word, then movsd. |
| 2932 | // Note if the lower 64 bits of the result of the UNPCKHPD is then stored |
| 2933 | // to a f64mem, the whole operation is folded into a single MOVHPDmr. |
| 2934 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2935 | SmallVector<SDOperand, 8> IdxVec; |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2936 | IdxVec.push_back(DAG.getConstant(1, MVT::getVectorElementType(MaskVT))); |
| 2937 | IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorElementType(MaskVT))); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2938 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2939 | &IdxVec[0], IdxVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2940 | Vec = DAG.getNode(ISD::VECTOR_SHUFFLE, Vec.getValueType(), |
| 2941 | Vec, DAG.getNode(ISD::UNDEF, Vec.getValueType()), Mask); |
| 2942 | return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, VT, Vec, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 2943 | DAG.getConstant(0, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2944 | } |
| 2945 | |
| 2946 | return SDOperand(); |
| 2947 | } |
| 2948 | |
| 2949 | SDOperand |
| 2950 | X86TargetLowering::LowerINSERT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 069287d | 2006-05-16 07:21:53 +0000 | [diff] [blame] | 2951 | // Transform it so it match pinsrw which expects a 16-bit value in a GR32 |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2952 | // as its second argument. |
| 2953 | MVT::ValueType VT = Op.getValueType(); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2954 | MVT::ValueType BaseVT = MVT::getVectorElementType(VT); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2955 | SDOperand N0 = Op.getOperand(0); |
| 2956 | SDOperand N1 = Op.getOperand(1); |
| 2957 | SDOperand N2 = Op.getOperand(2); |
| 2958 | if (MVT::getSizeInBits(BaseVT) == 16) { |
| 2959 | if (N1.getValueType() != MVT::i32) |
| 2960 | N1 = DAG.getNode(ISD::ANY_EXTEND, MVT::i32, N1); |
| 2961 | if (N2.getValueType() != MVT::i32) |
Evan Cheng | 0db5862 | 2007-06-29 00:01:20 +0000 | [diff] [blame] | 2962 | N2 = DAG.getConstant(cast<ConstantSDNode>(N2)->getValue(),getPointerTy()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2963 | return DAG.getNode(X86ISD::PINSRW, VT, N0, N1, N2); |
| 2964 | } else if (MVT::getSizeInBits(BaseVT) == 32) { |
| 2965 | unsigned Idx = cast<ConstantSDNode>(N2)->getValue(); |
| 2966 | if (Idx == 0) { |
| 2967 | // Use a movss. |
| 2968 | N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, N1); |
| 2969 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 2970 | MVT::ValueType BaseVT = MVT::getVectorElementType(MaskVT); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 2971 | SmallVector<SDOperand, 8> MaskVec; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2972 | MaskVec.push_back(DAG.getConstant(4, BaseVT)); |
| 2973 | for (unsigned i = 1; i <= 3; ++i) |
| 2974 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
| 2975 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, N0, N1, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 2976 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 2977 | &MaskVec[0], MaskVec.size())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2978 | } else { |
| 2979 | // Use two pinsrw instructions to insert a 32 bit value. |
| 2980 | Idx <<= 1; |
| 2981 | if (MVT::isFloatingPoint(N1.getValueType())) { |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 2982 | if (ISD::isNON_EXTLoad(N1.Val)) { |
Evan Cheng | 069287d | 2006-05-16 07:21:53 +0000 | [diff] [blame] | 2983 | // Just load directly from f32mem to GR32. |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 2984 | LoadSDNode *LD = cast<LoadSDNode>(N1); |
| 2985 | N1 = DAG.getLoad(MVT::i32, LD->getChain(), LD->getBasePtr(), |
| 2986 | LD->getSrcValue(), LD->getSrcValueOffset()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2987 | } else { |
| 2988 | N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, N1); |
| 2989 | N1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, N1); |
| 2990 | N1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i32, N1, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 2991 | DAG.getConstant(0, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2992 | } |
| 2993 | } |
| 2994 | N0 = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, N0); |
| 2995 | N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 2996 | DAG.getConstant(Idx, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 2997 | N1 = DAG.getNode(ISD::SRL, MVT::i32, N1, DAG.getConstant(16, MVT::i8)); |
| 2998 | N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 2999 | DAG.getConstant(Idx+1, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3000 | return DAG.getNode(ISD::BIT_CONVERT, VT, N0); |
| 3001 | } |
| 3002 | } |
| 3003 | |
| 3004 | return SDOperand(); |
| 3005 | } |
| 3006 | |
| 3007 | SDOperand |
| 3008 | X86TargetLowering::LowerSCALAR_TO_VECTOR(SDOperand Op, SelectionDAG &DAG) { |
| 3009 | SDOperand AnyExt = DAG.getNode(ISD::ANY_EXTEND, MVT::i32, Op.getOperand(0)); |
| 3010 | return DAG.getNode(X86ISD::S2VEC, Op.getValueType(), AnyExt); |
| 3011 | } |
| 3012 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3013 | // ConstantPool, JumpTable, GlobalAddress, and ExternalSymbol are lowered as |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3014 | // their target countpart wrapped in the X86ISD::Wrapper node. Suppose N is |
| 3015 | // one of the above mentioned nodes. It has to be wrapped because otherwise |
| 3016 | // Select(N) returns N. So the raw TargetGlobalAddress nodes, etc. can only |
| 3017 | // be used to form addressing mode. These wrapped nodes will be selected |
| 3018 | // into MOV32ri. |
| 3019 | SDOperand |
| 3020 | X86TargetLowering::LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { |
| 3021 | ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op); |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3022 | SDOperand Result = DAG.getTargetConstantPool(CP->getConstVal(), |
| 3023 | getPointerTy(), |
| 3024 | CP->getAlignment()); |
Evan Cheng | 19f2ffc | 2006-12-05 04:01:03 +0000 | [diff] [blame] | 3025 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
Anton Korobeynikov | 7f70559 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 3026 | // With PIC, the address is actually $g + Offset. |
| 3027 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |
| 3028 | !Subtarget->isPICStyleRIPRel()) { |
| 3029 | Result = DAG.getNode(ISD::ADD, getPointerTy(), |
| 3030 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
| 3031 | Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3032 | } |
| 3033 | |
| 3034 | return Result; |
| 3035 | } |
| 3036 | |
| 3037 | SDOperand |
| 3038 | X86TargetLowering::LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) { |
| 3039 | GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3040 | SDOperand Result = DAG.getTargetGlobalAddress(GV, getPointerTy()); |
Evan Cheng | 19f2ffc | 2006-12-05 04:01:03 +0000 | [diff] [blame] | 3041 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
Anton Korobeynikov | 7f70559 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 3042 | // With PIC, the address is actually $g + Offset. |
| 3043 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |
| 3044 | !Subtarget->isPICStyleRIPRel()) { |
| 3045 | Result = DAG.getNode(ISD::ADD, getPointerTy(), |
| 3046 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
| 3047 | Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3048 | } |
Anton Korobeynikov | 2b2bc68 | 2006-12-22 22:29:05 +0000 | [diff] [blame] | 3049 | |
| 3050 | // For Darwin & Mingw32, external and weak symbols are indirect, so we want to |
| 3051 | // load the value at address GV, not the value of GV itself. This means that |
| 3052 | // the GlobalAddress must be in the base or index register of the address, not |
| 3053 | // the GV offset field. Platform check is inside GVRequiresExtraLoad() call |
Anton Korobeynikov | 7f70559 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 3054 | // The same applies for external symbols during PIC codegen |
Anton Korobeynikov | 2b2bc68 | 2006-12-22 22:29:05 +0000 | [diff] [blame] | 3055 | if (Subtarget->GVRequiresExtraLoad(GV, getTargetMachine(), false)) |
| 3056 | Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result, NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3057 | |
| 3058 | return Result; |
| 3059 | } |
| 3060 | |
Lauro Ramos Venancio | b3a0417 | 2007-04-20 21:38:10 +0000 | [diff] [blame] | 3061 | // Lower ISD::GlobalTLSAddress using the "general dynamic" model |
| 3062 | static SDOperand |
| 3063 | LowerToTLSGeneralDynamicModel(GlobalAddressSDNode *GA, SelectionDAG &DAG, |
| 3064 | const MVT::ValueType PtrVT) { |
| 3065 | SDOperand InFlag; |
| 3066 | SDOperand Chain = DAG.getCopyToReg(DAG.getEntryNode(), X86::EBX, |
| 3067 | DAG.getNode(X86ISD::GlobalBaseReg, |
| 3068 | PtrVT), InFlag); |
| 3069 | InFlag = Chain.getValue(1); |
| 3070 | |
| 3071 | // emit leal symbol@TLSGD(,%ebx,1), %eax |
| 3072 | SDVTList NodeTys = DAG.getVTList(PtrVT, MVT::Other, MVT::Flag); |
| 3073 | SDOperand TGA = DAG.getTargetGlobalAddress(GA->getGlobal(), |
| 3074 | GA->getValueType(0), |
| 3075 | GA->getOffset()); |
| 3076 | SDOperand Ops[] = { Chain, TGA, InFlag }; |
| 3077 | SDOperand Result = DAG.getNode(X86ISD::TLSADDR, NodeTys, Ops, 3); |
| 3078 | InFlag = Result.getValue(2); |
| 3079 | Chain = Result.getValue(1); |
| 3080 | |
| 3081 | // call ___tls_get_addr. This function receives its argument in |
| 3082 | // the register EAX. |
| 3083 | Chain = DAG.getCopyToReg(Chain, X86::EAX, Result, InFlag); |
| 3084 | InFlag = Chain.getValue(1); |
| 3085 | |
| 3086 | NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); |
| 3087 | SDOperand Ops1[] = { Chain, |
| 3088 | DAG.getTargetExternalSymbol("___tls_get_addr", |
| 3089 | PtrVT), |
| 3090 | DAG.getRegister(X86::EAX, PtrVT), |
| 3091 | DAG.getRegister(X86::EBX, PtrVT), |
| 3092 | InFlag }; |
| 3093 | Chain = DAG.getNode(X86ISD::CALL, NodeTys, Ops1, 5); |
| 3094 | InFlag = Chain.getValue(1); |
| 3095 | |
| 3096 | return DAG.getCopyFromReg(Chain, X86::EAX, PtrVT, InFlag); |
| 3097 | } |
| 3098 | |
| 3099 | // Lower ISD::GlobalTLSAddress using the "initial exec" (for no-pic) or |
| 3100 | // "local exec" model. |
| 3101 | static SDOperand |
| 3102 | LowerToTLSExecModel(GlobalAddressSDNode *GA, SelectionDAG &DAG, |
| 3103 | const MVT::ValueType PtrVT) { |
| 3104 | // Get the Thread Pointer |
| 3105 | SDOperand ThreadPointer = DAG.getNode(X86ISD::THREAD_POINTER, PtrVT); |
| 3106 | // emit "addl x@ntpoff,%eax" (local exec) or "addl x@indntpoff,%eax" (initial |
| 3107 | // exec) |
| 3108 | SDOperand TGA = DAG.getTargetGlobalAddress(GA->getGlobal(), |
| 3109 | GA->getValueType(0), |
| 3110 | GA->getOffset()); |
| 3111 | SDOperand Offset = DAG.getNode(X86ISD::Wrapper, PtrVT, TGA); |
Lauro Ramos Venancio | 7d2cc2b | 2007-04-22 22:50:52 +0000 | [diff] [blame] | 3112 | |
| 3113 | if (GA->getGlobal()->isDeclaration()) // initial exec TLS model |
| 3114 | Offset = DAG.getLoad(PtrVT, DAG.getEntryNode(), Offset, NULL, 0); |
| 3115 | |
Lauro Ramos Venancio | b3a0417 | 2007-04-20 21:38:10 +0000 | [diff] [blame] | 3116 | // The address of the thread local variable is the add of the thread |
| 3117 | // pointer with the offset of the variable. |
| 3118 | return DAG.getNode(ISD::ADD, PtrVT, ThreadPointer, Offset); |
| 3119 | } |
| 3120 | |
| 3121 | SDOperand |
| 3122 | X86TargetLowering::LowerGlobalTLSAddress(SDOperand Op, SelectionDAG &DAG) { |
| 3123 | // TODO: implement the "local dynamic" model |
Lauro Ramos Venancio | 2c5c111 | 2007-04-21 20:56:26 +0000 | [diff] [blame] | 3124 | // TODO: implement the "initial exec"model for pic executables |
| 3125 | assert(!Subtarget->is64Bit() && Subtarget->isTargetELF() && |
| 3126 | "TLS not implemented for non-ELF and 64-bit targets"); |
Lauro Ramos Venancio | b3a0417 | 2007-04-20 21:38:10 +0000 | [diff] [blame] | 3127 | GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op); |
| 3128 | // If the relocation model is PIC, use the "General Dynamic" TLS Model, |
| 3129 | // otherwise use the "Local Exec"TLS Model |
| 3130 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_) |
| 3131 | return LowerToTLSGeneralDynamicModel(GA, DAG, getPointerTy()); |
| 3132 | else |
| 3133 | return LowerToTLSExecModel(GA, DAG, getPointerTy()); |
| 3134 | } |
| 3135 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3136 | SDOperand |
| 3137 | X86TargetLowering::LowerExternalSymbol(SDOperand Op, SelectionDAG &DAG) { |
| 3138 | const char *Sym = cast<ExternalSymbolSDNode>(Op)->getSymbol(); |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3139 | SDOperand Result = DAG.getTargetExternalSymbol(Sym, getPointerTy()); |
Evan Cheng | 19f2ffc | 2006-12-05 04:01:03 +0000 | [diff] [blame] | 3140 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
Anton Korobeynikov | 7f70559 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 3141 | // With PIC, the address is actually $g + Offset. |
| 3142 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |
| 3143 | !Subtarget->isPICStyleRIPRel()) { |
| 3144 | Result = DAG.getNode(ISD::ADD, getPointerTy(), |
| 3145 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
| 3146 | Result); |
| 3147 | } |
| 3148 | |
| 3149 | return Result; |
| 3150 | } |
| 3151 | |
| 3152 | SDOperand X86TargetLowering::LowerJumpTable(SDOperand Op, SelectionDAG &DAG) { |
| 3153 | JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); |
| 3154 | SDOperand Result = DAG.getTargetJumpTable(JT->getIndex(), getPointerTy()); |
| 3155 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
| 3156 | // With PIC, the address is actually $g + Offset. |
| 3157 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_ && |
| 3158 | !Subtarget->isPICStyleRIPRel()) { |
| 3159 | Result = DAG.getNode(ISD::ADD, getPointerTy(), |
| 3160 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
| 3161 | Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3162 | } |
| 3163 | |
| 3164 | return Result; |
| 3165 | } |
| 3166 | |
| 3167 | SDOperand X86TargetLowering::LowerShift(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3168 | assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && |
| 3169 | "Not an i64 shift!"); |
| 3170 | bool isSRA = Op.getOpcode() == ISD::SRA_PARTS; |
| 3171 | SDOperand ShOpLo = Op.getOperand(0); |
| 3172 | SDOperand ShOpHi = Op.getOperand(1); |
| 3173 | SDOperand ShAmt = Op.getOperand(2); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3174 | SDOperand Tmp1 = isSRA ? |
| 3175 | DAG.getNode(ISD::SRA, MVT::i32, ShOpHi, DAG.getConstant(31, MVT::i8)) : |
| 3176 | DAG.getConstant(0, MVT::i32); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3177 | |
| 3178 | SDOperand Tmp2, Tmp3; |
| 3179 | if (Op.getOpcode() == ISD::SHL_PARTS) { |
| 3180 | Tmp2 = DAG.getNode(X86ISD::SHLD, MVT::i32, ShOpHi, ShOpLo, ShAmt); |
| 3181 | Tmp3 = DAG.getNode(ISD::SHL, MVT::i32, ShOpLo, ShAmt); |
| 3182 | } else { |
| 3183 | Tmp2 = DAG.getNode(X86ISD::SHRD, MVT::i32, ShOpLo, ShOpHi, ShAmt); |
Evan Cheng | b7b5706 | 2006-01-19 01:46:14 +0000 | [diff] [blame] | 3184 | Tmp3 = DAG.getNode(isSRA ? ISD::SRA : ISD::SRL, MVT::i32, ShOpHi, ShAmt); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3185 | } |
| 3186 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3187 | const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
| 3188 | SDOperand AndNode = DAG.getNode(ISD::AND, MVT::i8, ShAmt, |
| 3189 | DAG.getConstant(32, MVT::i8)); |
| 3190 | SDOperand COps[]={DAG.getEntryNode(), AndNode, DAG.getConstant(0, MVT::i8)}; |
| 3191 | SDOperand InFlag = DAG.getNode(X86ISD::CMP, VTs, 2, COps, 3).getValue(1); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3192 | |
| 3193 | SDOperand Hi, Lo; |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 3194 | SDOperand CC = DAG.getConstant(X86::COND_NE, MVT::i8); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3195 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3196 | VTs = DAG.getNodeValueTypes(MVT::i32, MVT::Flag); |
| 3197 | SmallVector<SDOperand, 4> Ops; |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3198 | if (Op.getOpcode() == ISD::SHL_PARTS) { |
| 3199 | Ops.push_back(Tmp2); |
| 3200 | Ops.push_back(Tmp3); |
| 3201 | Ops.push_back(CC); |
| 3202 | Ops.push_back(InFlag); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3203 | Hi = DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3204 | InFlag = Hi.getValue(1); |
| 3205 | |
| 3206 | Ops.clear(); |
| 3207 | Ops.push_back(Tmp3); |
| 3208 | Ops.push_back(Tmp1); |
| 3209 | Ops.push_back(CC); |
| 3210 | Ops.push_back(InFlag); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3211 | Lo = DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3212 | } else { |
| 3213 | Ops.push_back(Tmp2); |
| 3214 | Ops.push_back(Tmp3); |
| 3215 | Ops.push_back(CC); |
Evan Cheng | 910cd3c | 2006-01-09 22:29:54 +0000 | [diff] [blame] | 3216 | Ops.push_back(InFlag); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3217 | Lo = DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3218 | InFlag = Lo.getValue(1); |
| 3219 | |
| 3220 | Ops.clear(); |
| 3221 | Ops.push_back(Tmp3); |
| 3222 | Ops.push_back(Tmp1); |
| 3223 | Ops.push_back(CC); |
| 3224 | Ops.push_back(InFlag); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3225 | Hi = DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3226 | } |
| 3227 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3228 | VTs = DAG.getNodeValueTypes(MVT::i32, MVT::i32); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3229 | Ops.clear(); |
| 3230 | Ops.push_back(Lo); |
| 3231 | Ops.push_back(Hi); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3232 | return DAG.getNode(ISD::MERGE_VALUES, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3233 | } |
Evan Cheng | a3195e8 | 2006-01-12 22:54:21 +0000 | [diff] [blame] | 3234 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3235 | SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { |
| 3236 | assert(Op.getOperand(0).getValueType() <= MVT::i64 && |
| 3237 | Op.getOperand(0).getValueType() >= MVT::i16 && |
| 3238 | "Unknown SINT_TO_FP to lower!"); |
| 3239 | |
| 3240 | SDOperand Result; |
| 3241 | MVT::ValueType SrcVT = Op.getOperand(0).getValueType(); |
| 3242 | unsigned Size = MVT::getSizeInBits(SrcVT)/8; |
| 3243 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3244 | int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); |
| 3245 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 3246 | SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Op.getOperand(0), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3247 | StackSlot, NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3248 | |
| 3249 | // Build the FILD |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3250 | SDVTList Tys; |
| 3251 | if (X86ScalarSSE) |
| 3252 | Tys = DAG.getVTList(MVT::f64, MVT::Other, MVT::Flag); |
| 3253 | else |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 3254 | Tys = DAG.getVTList(Op.getValueType(), MVT::Other); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3255 | SmallVector<SDOperand, 8> Ops; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3256 | Ops.push_back(Chain); |
| 3257 | Ops.push_back(StackSlot); |
| 3258 | Ops.push_back(DAG.getValueType(SrcVT)); |
| 3259 | Result = DAG.getNode(X86ScalarSSE ? X86ISD::FILD_FLAG :X86ISD::FILD, |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3260 | Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3261 | |
| 3262 | if (X86ScalarSSE) { |
| 3263 | Chain = Result.getValue(1); |
| 3264 | SDOperand InFlag = Result.getValue(2); |
| 3265 | |
| 3266 | // FIXME: Currently the FST is flagged to the FILD_FLAG. This |
| 3267 | // shouldn't be necessary except that RFP cannot be live across |
| 3268 | // multiple blocks. When stackifier is fixed, they can be uncoupled. |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3269 | MachineFunction &MF = DAG.getMachineFunction(); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3270 | int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3271 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3272 | Tys = DAG.getVTList(MVT::Other); |
| 3273 | SmallVector<SDOperand, 8> Ops; |
Evan Cheng | a3195e8 | 2006-01-12 22:54:21 +0000 | [diff] [blame] | 3274 | Ops.push_back(Chain); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3275 | Ops.push_back(Result); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3276 | Ops.push_back(StackSlot); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3277 | Ops.push_back(DAG.getValueType(Op.getValueType())); |
| 3278 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3279 | Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3280 | Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot, NULL, 0); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3281 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3282 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3283 | return Result; |
| 3284 | } |
| 3285 | |
| 3286 | SDOperand X86TargetLowering::LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) { |
| 3287 | assert(Op.getValueType() <= MVT::i64 && Op.getValueType() >= MVT::i16 && |
| 3288 | "Unknown FP_TO_SINT to lower!"); |
| 3289 | // We lower FP->sint64 into FISTP64, followed by a load, all to a temporary |
| 3290 | // stack slot. |
| 3291 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3292 | unsigned MemSize = MVT::getSizeInBits(Op.getValueType())/8; |
| 3293 | int SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize); |
| 3294 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 3295 | |
| 3296 | unsigned Opc; |
| 3297 | switch (Op.getValueType()) { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3298 | default: assert(0 && "Invalid FP_TO_SINT to lower!"); |
| 3299 | case MVT::i16: Opc = X86ISD::FP_TO_INT16_IN_MEM; break; |
| 3300 | case MVT::i32: Opc = X86ISD::FP_TO_INT32_IN_MEM; break; |
| 3301 | case MVT::i64: Opc = X86ISD::FP_TO_INT64_IN_MEM; break; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3302 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3303 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3304 | SDOperand Chain = DAG.getEntryNode(); |
| 3305 | SDOperand Value = Op.getOperand(0); |
| 3306 | if (X86ScalarSSE) { |
| 3307 | assert(Op.getValueType() == MVT::i64 && "Invalid FP_TO_SINT to lower!"); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3308 | Chain = DAG.getStore(Chain, Value, StackSlot, NULL, 0); |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 3309 | SDVTList Tys = DAG.getVTList(Op.getOperand(0).getValueType(), MVT::Other); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3310 | SDOperand Ops[] = { |
| 3311 | Chain, StackSlot, DAG.getValueType(Op.getOperand(0).getValueType()) |
| 3312 | }; |
| 3313 | Value = DAG.getNode(X86ISD::FLD, Tys, Ops, 3); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3314 | Chain = Value.getValue(1); |
| 3315 | SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize); |
| 3316 | StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 3317 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3318 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3319 | // Build the FP_TO_INT*_IN_MEM |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3320 | SDOperand Ops[] = { Chain, Value, StackSlot }; |
| 3321 | SDOperand FIST = DAG.getNode(Opc, MVT::Other, Ops, 3); |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 3322 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3323 | // Load the result. |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3324 | return DAG.getLoad(Op.getValueType(), FIST, StackSlot, NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3325 | } |
| 3326 | |
| 3327 | SDOperand X86TargetLowering::LowerFABS(SDOperand Op, SelectionDAG &DAG) { |
| 3328 | MVT::ValueType VT = Op.getValueType(); |
| 3329 | const Type *OpNTy = MVT::getTypeForValueType(VT); |
| 3330 | std::vector<Constant*> CV; |
| 3331 | if (VT == MVT::f64) { |
| 3332 | CV.push_back(ConstantFP::get(OpNTy, BitsToDouble(~(1ULL << 63)))); |
| 3333 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 3334 | } else { |
| 3335 | CV.push_back(ConstantFP::get(OpNTy, BitsToFloat(~(1U << 31)))); |
| 3336 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 3337 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 3338 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 3339 | } |
| 3340 | Constant *CS = ConstantStruct::get(CV); |
| 3341 | SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3342 | SDVTList Tys = DAG.getVTList(VT, MVT::Other); |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 3343 | SmallVector<SDOperand, 3> Ops; |
| 3344 | Ops.push_back(DAG.getEntryNode()); |
| 3345 | Ops.push_back(CPIdx); |
| 3346 | Ops.push_back(DAG.getSrcValue(NULL)); |
| 3347 | SDOperand Mask = DAG.getNode(X86ISD::LOAD_PACK, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3348 | return DAG.getNode(X86ISD::FAND, VT, Op.getOperand(0), Mask); |
| 3349 | } |
| 3350 | |
| 3351 | SDOperand X86TargetLowering::LowerFNEG(SDOperand Op, SelectionDAG &DAG) { |
| 3352 | MVT::ValueType VT = Op.getValueType(); |
| 3353 | const Type *OpNTy = MVT::getTypeForValueType(VT); |
| 3354 | std::vector<Constant*> CV; |
| 3355 | if (VT == MVT::f64) { |
| 3356 | CV.push_back(ConstantFP::get(OpNTy, BitsToDouble(1ULL << 63))); |
| 3357 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 3358 | } else { |
| 3359 | CV.push_back(ConstantFP::get(OpNTy, BitsToFloat(1U << 31))); |
| 3360 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 3361 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 3362 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 3363 | } |
| 3364 | Constant *CS = ConstantStruct::get(CV); |
| 3365 | SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3366 | SDVTList Tys = DAG.getVTList(VT, MVT::Other); |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 3367 | SmallVector<SDOperand, 3> Ops; |
| 3368 | Ops.push_back(DAG.getEntryNode()); |
| 3369 | Ops.push_back(CPIdx); |
| 3370 | Ops.push_back(DAG.getSrcValue(NULL)); |
| 3371 | SDOperand Mask = DAG.getNode(X86ISD::LOAD_PACK, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3372 | return DAG.getNode(X86ISD::FXOR, VT, Op.getOperand(0), Mask); |
| 3373 | } |
| 3374 | |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 3375 | SDOperand X86TargetLowering::LowerFCOPYSIGN(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 73d6cf1 | 2007-01-05 21:37:56 +0000 | [diff] [blame] | 3376 | SDOperand Op0 = Op.getOperand(0); |
| 3377 | SDOperand Op1 = Op.getOperand(1); |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 3378 | MVT::ValueType VT = Op.getValueType(); |
Evan Cheng | 73d6cf1 | 2007-01-05 21:37:56 +0000 | [diff] [blame] | 3379 | MVT::ValueType SrcVT = Op1.getValueType(); |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 3380 | const Type *SrcTy = MVT::getTypeForValueType(SrcVT); |
Evan Cheng | 73d6cf1 | 2007-01-05 21:37:56 +0000 | [diff] [blame] | 3381 | |
| 3382 | // If second operand is smaller, extend it first. |
| 3383 | if (MVT::getSizeInBits(SrcVT) < MVT::getSizeInBits(VT)) { |
| 3384 | Op1 = DAG.getNode(ISD::FP_EXTEND, VT, Op1); |
| 3385 | SrcVT = VT; |
| 3386 | } |
| 3387 | |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 3388 | // First get the sign bit of second operand. |
| 3389 | std::vector<Constant*> CV; |
| 3390 | if (SrcVT == MVT::f64) { |
| 3391 | CV.push_back(ConstantFP::get(SrcTy, BitsToDouble(1ULL << 63))); |
| 3392 | CV.push_back(ConstantFP::get(SrcTy, 0.0)); |
| 3393 | } else { |
| 3394 | CV.push_back(ConstantFP::get(SrcTy, BitsToFloat(1U << 31))); |
| 3395 | CV.push_back(ConstantFP::get(SrcTy, 0.0)); |
| 3396 | CV.push_back(ConstantFP::get(SrcTy, 0.0)); |
| 3397 | CV.push_back(ConstantFP::get(SrcTy, 0.0)); |
| 3398 | } |
| 3399 | Constant *CS = ConstantStruct::get(CV); |
| 3400 | SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4); |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 3401 | SDVTList Tys = DAG.getVTList(SrcVT, MVT::Other); |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 3402 | SmallVector<SDOperand, 3> Ops; |
| 3403 | Ops.push_back(DAG.getEntryNode()); |
| 3404 | Ops.push_back(CPIdx); |
| 3405 | Ops.push_back(DAG.getSrcValue(NULL)); |
Evan Cheng | 73d6cf1 | 2007-01-05 21:37:56 +0000 | [diff] [blame] | 3406 | SDOperand Mask1 = DAG.getNode(X86ISD::LOAD_PACK, Tys, &Ops[0], Ops.size()); |
| 3407 | SDOperand SignBit = DAG.getNode(X86ISD::FAND, SrcVT, Op1, Mask1); |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 3408 | |
| 3409 | // Shift sign bit right or left if the two operands have different types. |
| 3410 | if (MVT::getSizeInBits(SrcVT) > MVT::getSizeInBits(VT)) { |
| 3411 | // Op0 is MVT::f32, Op1 is MVT::f64. |
| 3412 | SignBit = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v2f64, SignBit); |
| 3413 | SignBit = DAG.getNode(X86ISD::FSRL, MVT::v2f64, SignBit, |
| 3414 | DAG.getConstant(32, MVT::i32)); |
| 3415 | SignBit = DAG.getNode(ISD::BIT_CONVERT, MVT::v4f32, SignBit); |
| 3416 | SignBit = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::f32, SignBit, |
| 3417 | DAG.getConstant(0, getPointerTy())); |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 3418 | } |
| 3419 | |
Evan Cheng | 73d6cf1 | 2007-01-05 21:37:56 +0000 | [diff] [blame] | 3420 | // Clear first operand sign bit. |
| 3421 | CV.clear(); |
| 3422 | if (VT == MVT::f64) { |
| 3423 | CV.push_back(ConstantFP::get(SrcTy, BitsToDouble(~(1ULL << 63)))); |
| 3424 | CV.push_back(ConstantFP::get(SrcTy, 0.0)); |
| 3425 | } else { |
| 3426 | CV.push_back(ConstantFP::get(SrcTy, BitsToFloat(~(1U << 31)))); |
| 3427 | CV.push_back(ConstantFP::get(SrcTy, 0.0)); |
| 3428 | CV.push_back(ConstantFP::get(SrcTy, 0.0)); |
| 3429 | CV.push_back(ConstantFP::get(SrcTy, 0.0)); |
| 3430 | } |
| 3431 | CS = ConstantStruct::get(CV); |
| 3432 | CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4); |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 3433 | Tys = DAG.getVTList(VT, MVT::Other); |
Evan Cheng | 73d6cf1 | 2007-01-05 21:37:56 +0000 | [diff] [blame] | 3434 | Ops.clear(); |
| 3435 | Ops.push_back(DAG.getEntryNode()); |
| 3436 | Ops.push_back(CPIdx); |
| 3437 | Ops.push_back(DAG.getSrcValue(NULL)); |
| 3438 | SDOperand Mask2 = DAG.getNode(X86ISD::LOAD_PACK, Tys, &Ops[0], Ops.size()); |
| 3439 | SDOperand Val = DAG.getNode(X86ISD::FAND, VT, Op0, Mask2); |
| 3440 | |
| 3441 | // Or the value with the sign bit. |
| 3442 | return DAG.getNode(X86ISD::FOR, VT, Val, SignBit); |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 3443 | } |
| 3444 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3445 | SDOperand X86TargetLowering::LowerSETCC(SDOperand Op, SelectionDAG &DAG, |
| 3446 | SDOperand Chain) { |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3447 | assert(Op.getValueType() == MVT::i8 && "SetCC type must be 8-bit integer"); |
| 3448 | SDOperand Cond; |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3449 | SDOperand Op0 = Op.getOperand(0); |
| 3450 | SDOperand Op1 = Op.getOperand(1); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3451 | SDOperand CC = Op.getOperand(2); |
| 3452 | ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get(); |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 3453 | const MVT::ValueType *VTs1 = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
| 3454 | const MVT::ValueType *VTs2 = DAG.getNodeValueTypes(MVT::i8, MVT::Flag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3455 | bool isFP = MVT::isFloatingPoint(Op.getOperand(1).getValueType()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3456 | unsigned X86CC; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3457 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3458 | if (translateX86CC(cast<CondCodeSDNode>(CC)->get(), isFP, X86CC, |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 3459 | Op0, Op1, DAG)) { |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3460 | SDOperand Ops1[] = { Chain, Op0, Op1 }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 3461 | Cond = DAG.getNode(X86ISD::CMP, VTs1, 2, Ops1, 3).getValue(1); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3462 | SDOperand Ops2[] = { DAG.getConstant(X86CC, MVT::i8), Cond }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 3463 | return DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops2, 2); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3464 | } |
| 3465 | |
| 3466 | assert(isFP && "Illegal integer SetCC!"); |
| 3467 | |
| 3468 | SDOperand COps[] = { Chain, Op0, Op1 }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 3469 | Cond = DAG.getNode(X86ISD::CMP, VTs1, 2, COps, 3).getValue(1); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3470 | |
| 3471 | switch (SetCCOpcode) { |
| 3472 | default: assert(false && "Illegal floating point SetCC!"); |
| 3473 | case ISD::SETOEQ: { // !PF & ZF |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 3474 | SDOperand Ops1[] = { DAG.getConstant(X86::COND_NP, MVT::i8), Cond }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 3475 | SDOperand Tmp1 = DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops1, 2); |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 3476 | SDOperand Ops2[] = { DAG.getConstant(X86::COND_E, MVT::i8), |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3477 | Tmp1.getValue(1) }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 3478 | SDOperand Tmp2 = DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops2, 2); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3479 | return DAG.getNode(ISD::AND, MVT::i8, Tmp1, Tmp2); |
| 3480 | } |
| 3481 | case ISD::SETUNE: { // PF | !ZF |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 3482 | SDOperand Ops1[] = { DAG.getConstant(X86::COND_P, MVT::i8), Cond }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 3483 | SDOperand Tmp1 = DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops1, 2); |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 3484 | SDOperand Ops2[] = { DAG.getConstant(X86::COND_NE, MVT::i8), |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3485 | Tmp1.getValue(1) }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 3486 | SDOperand Tmp2 = DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops2, 2); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3487 | return DAG.getNode(ISD::OR, MVT::i8, Tmp1, Tmp2); |
| 3488 | } |
Evan Cheng | d5781fc | 2005-12-21 20:21:51 +0000 | [diff] [blame] | 3489 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3490 | } |
Evan Cheng | 6dfa999 | 2006-01-30 23:41:35 +0000 | [diff] [blame] | 3491 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3492 | SDOperand X86TargetLowering::LowerSELECT(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3493 | bool addTest = true; |
| 3494 | SDOperand Chain = DAG.getEntryNode(); |
| 3495 | SDOperand Cond = Op.getOperand(0); |
| 3496 | SDOperand CC; |
| 3497 | const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
Evan Cheng | 9bba894 | 2006-01-26 02:13:10 +0000 | [diff] [blame] | 3498 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3499 | if (Cond.getOpcode() == ISD::SETCC) |
| 3500 | Cond = LowerSETCC(Cond, DAG, Chain); |
| 3501 | |
| 3502 | if (Cond.getOpcode() == X86ISD::SETCC) { |
| 3503 | CC = Cond.getOperand(0); |
| 3504 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3505 | // If condition flag is set by a X86ISD::CMP, then make a copy of it |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3506 | // (since flag operand cannot be shared). Use it as the condition setting |
| 3507 | // operand in place of the X86ISD::SETCC. |
| 3508 | // If the X86ISD::SETCC has more than one use, then perhaps it's better |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3509 | // to use a test instead of duplicating the X86ISD::CMP (for register |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3510 | // pressure reason)? |
| 3511 | SDOperand Cmp = Cond.getOperand(1); |
| 3512 | unsigned Opc = Cmp.getOpcode(); |
| 3513 | bool IllegalFPCMov = !X86ScalarSSE && |
| 3514 | MVT::isFloatingPoint(Op.getValueType()) && |
| 3515 | !hasFPCMov(cast<ConstantSDNode>(CC)->getSignExtended()); |
| 3516 | if ((Opc == X86ISD::CMP || Opc == X86ISD::COMI || Opc == X86ISD::UCOMI) && |
| 3517 | !IllegalFPCMov) { |
| 3518 | SDOperand Ops[] = { Chain, Cmp.getOperand(1), Cmp.getOperand(2) }; |
| 3519 | Cond = DAG.getNode(Opc, VTs, 2, Ops, 3); |
| 3520 | addTest = false; |
| 3521 | } |
| 3522 | } |
Evan Cheng | aaca22c | 2006-01-10 20:26:56 +0000 | [diff] [blame] | 3523 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3524 | if (addTest) { |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 3525 | CC = DAG.getConstant(X86::COND_NE, MVT::i8); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3526 | SDOperand Ops[] = { Chain, Cond, DAG.getConstant(0, MVT::i8) }; |
| 3527 | Cond = DAG.getNode(X86ISD::CMP, VTs, 2, Ops, 3); |
Evan Cheng | 7df96d6 | 2005-12-17 01:21:05 +0000 | [diff] [blame] | 3528 | } |
Evan Cheng | 6dfa999 | 2006-01-30 23:41:35 +0000 | [diff] [blame] | 3529 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3530 | VTs = DAG.getNodeValueTypes(Op.getValueType(), MVT::Flag); |
| 3531 | SmallVector<SDOperand, 4> Ops; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3532 | // X86ISD::CMOV means set the result (which is operand 1) to the RHS if |
| 3533 | // condition is true. |
| 3534 | Ops.push_back(Op.getOperand(2)); |
| 3535 | Ops.push_back(Op.getOperand(1)); |
| 3536 | Ops.push_back(CC); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3537 | Ops.push_back(Cond.getValue(1)); |
| 3538 | return DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3539 | } |
Evan Cheng | 9bba894 | 2006-01-26 02:13:10 +0000 | [diff] [blame] | 3540 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3541 | SDOperand X86TargetLowering::LowerBRCOND(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3542 | bool addTest = true; |
| 3543 | SDOperand Chain = Op.getOperand(0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3544 | SDOperand Cond = Op.getOperand(1); |
| 3545 | SDOperand Dest = Op.getOperand(2); |
| 3546 | SDOperand CC; |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3547 | const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
| 3548 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3549 | if (Cond.getOpcode() == ISD::SETCC) |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3550 | Cond = LowerSETCC(Cond, DAG, Chain); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3551 | |
| 3552 | if (Cond.getOpcode() == X86ISD::SETCC) { |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3553 | CC = Cond.getOperand(0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3554 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3555 | // If condition flag is set by a X86ISD::CMP, then make a copy of it |
| 3556 | // (since flag operand cannot be shared). Use it as the condition setting |
| 3557 | // operand in place of the X86ISD::SETCC. |
| 3558 | // If the X86ISD::SETCC has more than one use, then perhaps it's better |
| 3559 | // to use a test instead of duplicating the X86ISD::CMP (for register |
| 3560 | // pressure reason)? |
| 3561 | SDOperand Cmp = Cond.getOperand(1); |
| 3562 | unsigned Opc = Cmp.getOpcode(); |
| 3563 | if (Opc == X86ISD::CMP || Opc == X86ISD::COMI || Opc == X86ISD::UCOMI) { |
| 3564 | SDOperand Ops[] = { Chain, Cmp.getOperand(1), Cmp.getOperand(2) }; |
| 3565 | Cond = DAG.getNode(Opc, VTs, 2, Ops, 3); |
| 3566 | addTest = false; |
| 3567 | } |
| 3568 | } |
Evan Cheng | 1bcee36 | 2006-01-13 01:03:02 +0000 | [diff] [blame] | 3569 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3570 | if (addTest) { |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 3571 | CC = DAG.getConstant(X86::COND_NE, MVT::i8); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3572 | SDOperand Ops[] = { Chain, Cond, DAG.getConstant(0, MVT::i8) }; |
| 3573 | Cond = DAG.getNode(X86ISD::CMP, VTs, 2, Ops, 3); |
Evan Cheng | 898101c | 2005-12-19 23:12:38 +0000 | [diff] [blame] | 3574 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3575 | return DAG.getNode(X86ISD::BRCOND, Op.getValueType(), |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3576 | Cond, Op.getOperand(2), CC, Cond.getValue(1)); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3577 | } |
Evan Cheng | 67f92a7 | 2006-01-11 22:15:48 +0000 | [diff] [blame] | 3578 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 3579 | SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { |
| 3580 | unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3581 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3582 | if (Subtarget->is64Bit()) |
Chris Lattner | 09c75a4 | 2007-02-25 09:06:15 +0000 | [diff] [blame] | 3583 | return LowerX86_64CCCCallTo(Op, DAG, CallingConv); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 3584 | else |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 3585 | switch (CallingConv) { |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 3586 | default: |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3587 | assert(0 && "Unsupported calling convention"); |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 3588 | case CallingConv::Fast: |
Chris Lattner | 2db39b8 | 2007-02-28 06:05:16 +0000 | [diff] [blame] | 3589 | // TODO: Implement fastcc |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 3590 | // Falls through |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 3591 | case CallingConv::C: |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3592 | case CallingConv::X86_StdCall: |
Chris Lattner | 09c75a4 | 2007-02-25 09:06:15 +0000 | [diff] [blame] | 3593 | return LowerCCCCallTo(Op, DAG, CallingConv); |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 3594 | case CallingConv::X86_FastCall: |
Chris Lattner | 09c75a4 | 2007-02-25 09:06:15 +0000 | [diff] [blame] | 3595 | return LowerFastCCCallTo(Op, DAG, CallingConv); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 3596 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 3597 | } |
| 3598 | |
Anton Korobeynikov | e060b53 | 2007-04-17 19:34:00 +0000 | [diff] [blame] | 3599 | |
| 3600 | // Lower dynamic stack allocation to _alloca call for Cygwin/Mingw targets. |
| 3601 | // Calls to _alloca is needed to probe the stack when allocating more than 4k |
| 3602 | // bytes in one go. Touching the stack at 4K increments is necessary to ensure |
| 3603 | // that the guard pages used by the OS virtual memory manager are allocated in |
| 3604 | // correct sequence. |
Anton Korobeynikov | 4304bcc | 2007-07-05 20:36:08 +0000 | [diff] [blame^] | 3605 | SDOperand |
| 3606 | X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDOperand Op, |
| 3607 | SelectionDAG &DAG) { |
Anton Korobeynikov | e060b53 | 2007-04-17 19:34:00 +0000 | [diff] [blame] | 3608 | assert(Subtarget->isTargetCygMing() && |
| 3609 | "This should be used only on Cygwin/Mingw targets"); |
| 3610 | |
Anton Korobeynikov | 57fc00d | 2007-04-17 09:20:00 +0000 | [diff] [blame] | 3611 | // Get the inputs. |
| 3612 | SDOperand Chain = Op.getOperand(0); |
| 3613 | SDOperand Size = Op.getOperand(1); |
| 3614 | // FIXME: Ensure alignment here |
| 3615 | |
Anton Korobeynikov | 4304bcc | 2007-07-05 20:36:08 +0000 | [diff] [blame^] | 3616 | SDOperand Flag; |
| 3617 | |
Anton Korobeynikov | 57fc00d | 2007-04-17 09:20:00 +0000 | [diff] [blame] | 3618 | MVT::ValueType IntPtr = getPointerTy(); |
| 3619 | MVT::ValueType SPTy = (Subtarget->is64Bit() ? MVT::i64 : MVT::i32); |
Anton Korobeynikov | 57fc00d | 2007-04-17 09:20:00 +0000 | [diff] [blame] | 3620 | |
Anton Korobeynikov | 4304bcc | 2007-07-05 20:36:08 +0000 | [diff] [blame^] | 3621 | Chain = DAG.getCopyToReg(Chain, X86::EAX, Size, Flag); |
| 3622 | Flag = Chain.getValue(1); |
| 3623 | |
| 3624 | SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Flag); |
| 3625 | SDOperand Ops[] = { Chain, |
| 3626 | DAG.getTargetExternalSymbol("_alloca", IntPtr), |
| 3627 | DAG.getRegister(X86::EAX, IntPtr), |
| 3628 | Flag }; |
| 3629 | Chain = DAG.getNode(X86ISD::CALL, NodeTys, Ops, 4); |
| 3630 | Flag = Chain.getValue(1); |
| 3631 | |
| 3632 | Chain = DAG.getCopyFromReg(Chain, X86StackPtr, SPTy).getValue(1); |
Anton Korobeynikov | 57fc00d | 2007-04-17 09:20:00 +0000 | [diff] [blame] | 3633 | |
| 3634 | std::vector<MVT::ValueType> Tys; |
| 3635 | Tys.push_back(SPTy); |
| 3636 | Tys.push_back(MVT::Other); |
Anton Korobeynikov | 4304bcc | 2007-07-05 20:36:08 +0000 | [diff] [blame^] | 3637 | SDOperand Ops1[2] = { Chain.getValue(0), Chain }; |
| 3638 | return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops1, 2); |
Anton Korobeynikov | 57fc00d | 2007-04-17 09:20:00 +0000 | [diff] [blame] | 3639 | } |
| 3640 | |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 3641 | SDOperand |
| 3642 | X86TargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | e8bd0a3 | 2006-06-06 23:30:24 +0000 | [diff] [blame] | 3643 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3644 | const Function* Fn = MF.getFunction(); |
| 3645 | if (Fn->hasExternalLinkage() && |
Anton Korobeynikov | 317848f | 2007-01-03 11:43:14 +0000 | [diff] [blame] | 3646 | Subtarget->isTargetCygMing() && |
Evan Cheng | b12223e | 2006-06-09 06:24:42 +0000 | [diff] [blame] | 3647 | Fn->getName() == "main") |
Chris Lattner | d15dff2 | 2007-04-17 17:21:52 +0000 | [diff] [blame] | 3648 | MF.getInfo<X86MachineFunctionInfo>()->setForceFramePointer(true); |
Evan Cheng | e8bd0a3 | 2006-06-06 23:30:24 +0000 | [diff] [blame] | 3649 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 3650 | unsigned CC = cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3651 | if (Subtarget->is64Bit()) |
| 3652 | return LowerX86_64CCCArguments(Op, DAG); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 3653 | else |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 3654 | switch(CC) { |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 3655 | default: |
| 3656 | assert(0 && "Unsupported calling convention"); |
| 3657 | case CallingConv::Fast: |
Chris Lattner | 2db39b8 | 2007-02-28 06:05:16 +0000 | [diff] [blame] | 3658 | // TODO: implement fastcc. |
| 3659 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 3660 | // Falls through |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 3661 | case CallingConv::C: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 3662 | return LowerCCCArguments(Op, DAG); |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 3663 | case CallingConv::X86_StdCall: |
Chris Lattner | d15dff2 | 2007-04-17 17:21:52 +0000 | [diff] [blame] | 3664 | MF.getInfo<X86MachineFunctionInfo>()->setDecorationStyle(StdCall); |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 3665 | return LowerCCCArguments(Op, DAG, true); |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 3666 | case CallingConv::X86_FastCall: |
Chris Lattner | d15dff2 | 2007-04-17 17:21:52 +0000 | [diff] [blame] | 3667 | MF.getInfo<X86MachineFunctionInfo>()->setDecorationStyle(FastCall); |
Chris Lattner | 2db39b8 | 2007-02-28 06:05:16 +0000 | [diff] [blame] | 3668 | return LowerFastCCArguments(Op, DAG); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 3669 | } |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 3670 | } |
| 3671 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3672 | SDOperand X86TargetLowering::LowerMEMSET(SDOperand Op, SelectionDAG &DAG) { |
| 3673 | SDOperand InFlag(0, 0); |
| 3674 | SDOperand Chain = Op.getOperand(0); |
| 3675 | unsigned Align = |
| 3676 | (unsigned)cast<ConstantSDNode>(Op.getOperand(4))->getValue(); |
| 3677 | if (Align == 0) Align = 1; |
| 3678 | |
| 3679 | ConstantSDNode *I = dyn_cast<ConstantSDNode>(Op.getOperand(3)); |
| 3680 | // If not DWORD aligned, call memset if size is less than the threshold. |
| 3681 | // It knows how to align to the right boundary first. |
| 3682 | if ((Align & 3) != 0 || |
| 3683 | (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) { |
| 3684 | MVT::ValueType IntPtr = getPointerTy(); |
Owen Anderson | a69571c | 2006-05-03 01:29:57 +0000 | [diff] [blame] | 3685 | const Type *IntPtrTy = getTargetData()->getIntPtrType(); |
Reid Spencer | 4785781 | 2006-12-31 05:55:36 +0000 | [diff] [blame] | 3686 | TargetLowering::ArgListTy Args; |
| 3687 | TargetLowering::ArgListEntry Entry; |
| 3688 | Entry.Node = Op.getOperand(1); |
| 3689 | Entry.Ty = IntPtrTy; |
Reid Spencer | 4785781 | 2006-12-31 05:55:36 +0000 | [diff] [blame] | 3690 | Args.push_back(Entry); |
Reid Spencer | aff9387 | 2007-01-03 17:24:59 +0000 | [diff] [blame] | 3691 | // Extend the unsigned i8 argument to be an int value for the call. |
Reid Spencer | 4785781 | 2006-12-31 05:55:36 +0000 | [diff] [blame] | 3692 | Entry.Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Op.getOperand(2)); |
| 3693 | Entry.Ty = IntPtrTy; |
Reid Spencer | 4785781 | 2006-12-31 05:55:36 +0000 | [diff] [blame] | 3694 | Args.push_back(Entry); |
| 3695 | Entry.Node = Op.getOperand(3); |
| 3696 | Args.push_back(Entry); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3697 | std::pair<SDOperand,SDOperand> CallResult = |
Reid Spencer | 4785781 | 2006-12-31 05:55:36 +0000 | [diff] [blame] | 3698 | LowerCallTo(Chain, Type::VoidTy, false, false, CallingConv::C, false, |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3699 | DAG.getExternalSymbol("memset", IntPtr), Args, DAG); |
| 3700 | return CallResult.second; |
Evan Cheng | 48090aa | 2006-03-21 23:01:21 +0000 | [diff] [blame] | 3701 | } |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 3702 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3703 | MVT::ValueType AVT; |
| 3704 | SDOperand Count; |
| 3705 | ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Op.getOperand(2)); |
| 3706 | unsigned BytesLeft = 0; |
| 3707 | bool TwoRepStos = false; |
| 3708 | if (ValC) { |
| 3709 | unsigned ValReg; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3710 | uint64_t Val = ValC->getValue() & 255; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 3711 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3712 | // If the value is a constant, then we can potentially use larger sets. |
| 3713 | switch (Align & 3) { |
| 3714 | case 2: // WORD aligned |
| 3715 | AVT = MVT::i16; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3716 | ValReg = X86::AX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3717 | Val = (Val << 8) | Val; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3718 | break; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3719 | case 0: // DWORD aligned |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3720 | AVT = MVT::i32; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3721 | ValReg = X86::EAX; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3722 | Val = (Val << 8) | Val; |
| 3723 | Val = (Val << 16) | Val; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3724 | if (Subtarget->is64Bit() && ((Align & 0xF) == 0)) { // QWORD aligned |
| 3725 | AVT = MVT::i64; |
| 3726 | ValReg = X86::RAX; |
| 3727 | Val = (Val << 32) | Val; |
| 3728 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3729 | break; |
| 3730 | default: // Byte aligned |
| 3731 | AVT = MVT::i8; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3732 | ValReg = X86::AL; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3733 | Count = Op.getOperand(3); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3734 | break; |
Evan Cheng | 80d428c | 2006-04-19 22:48:17 +0000 | [diff] [blame] | 3735 | } |
| 3736 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3737 | if (AVT > MVT::i8) { |
| 3738 | if (I) { |
| 3739 | unsigned UBytes = MVT::getSizeInBits(AVT) / 8; |
| 3740 | Count = DAG.getConstant(I->getValue() / UBytes, getPointerTy()); |
| 3741 | BytesLeft = I->getValue() % UBytes; |
| 3742 | } else { |
| 3743 | assert(AVT >= MVT::i32 && |
| 3744 | "Do not use rep;stos if not at least DWORD aligned"); |
| 3745 | Count = DAG.getNode(ISD::SRL, Op.getOperand(3).getValueType(), |
| 3746 | Op.getOperand(3), DAG.getConstant(2, MVT::i8)); |
| 3747 | TwoRepStos = true; |
| 3748 | } |
| 3749 | } |
| 3750 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3751 | Chain = DAG.getCopyToReg(Chain, ValReg, DAG.getConstant(Val, AVT), |
| 3752 | InFlag); |
| 3753 | InFlag = Chain.getValue(1); |
| 3754 | } else { |
| 3755 | AVT = MVT::i8; |
| 3756 | Count = Op.getOperand(3); |
| 3757 | Chain = DAG.getCopyToReg(Chain, X86::AL, Op.getOperand(2), InFlag); |
| 3758 | InFlag = Chain.getValue(1); |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 3759 | } |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 3760 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3761 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RCX : X86::ECX, |
| 3762 | Count, InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3763 | InFlag = Chain.getValue(1); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3764 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RDI : X86::EDI, |
| 3765 | Op.getOperand(1), InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3766 | InFlag = Chain.getValue(1); |
Evan Cheng | a0b3afb | 2006-03-27 07:00:16 +0000 | [diff] [blame] | 3767 | |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 3768 | SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3769 | SmallVector<SDOperand, 8> Ops; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3770 | Ops.push_back(Chain); |
| 3771 | Ops.push_back(DAG.getValueType(AVT)); |
| 3772 | Ops.push_back(InFlag); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 3773 | Chain = DAG.getNode(X86ISD::REP_STOS, Tys, &Ops[0], Ops.size()); |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 3774 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3775 | if (TwoRepStos) { |
| 3776 | InFlag = Chain.getValue(1); |
| 3777 | Count = Op.getOperand(3); |
| 3778 | MVT::ValueType CVT = Count.getValueType(); |
| 3779 | SDOperand Left = DAG.getNode(ISD::AND, CVT, Count, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3780 | DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT)); |
| 3781 | Chain = DAG.getCopyToReg(Chain, (CVT == MVT::i64) ? X86::RCX : X86::ECX, |
| 3782 | Left, InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3783 | InFlag = Chain.getValue(1); |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 3784 | Tys = DAG.getVTList(MVT::Other, MVT::Flag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3785 | Ops.clear(); |
| 3786 | Ops.push_back(Chain); |
| 3787 | Ops.push_back(DAG.getValueType(MVT::i8)); |
| 3788 | Ops.push_back(InFlag); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 3789 | Chain = DAG.getNode(X86ISD::REP_STOS, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3790 | } else if (BytesLeft) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3791 | // Issue stores for the last 1 - 7 bytes. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3792 | SDOperand Value; |
| 3793 | unsigned Val = ValC->getValue() & 255; |
| 3794 | unsigned Offset = I->getValue() - BytesLeft; |
| 3795 | SDOperand DstAddr = Op.getOperand(1); |
| 3796 | MVT::ValueType AddrVT = DstAddr.getValueType(); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3797 | if (BytesLeft >= 4) { |
| 3798 | Val = (Val << 8) | Val; |
| 3799 | Val = (Val << 16) | Val; |
| 3800 | Value = DAG.getConstant(Val, MVT::i32); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 3801 | Chain = DAG.getStore(Chain, Value, |
| 3802 | DAG.getNode(ISD::ADD, AddrVT, DstAddr, |
| 3803 | DAG.getConstant(Offset, AddrVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3804 | NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3805 | BytesLeft -= 4; |
| 3806 | Offset += 4; |
| 3807 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3808 | if (BytesLeft >= 2) { |
| 3809 | Value = DAG.getConstant((Val << 8) | Val, MVT::i16); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 3810 | Chain = DAG.getStore(Chain, Value, |
| 3811 | DAG.getNode(ISD::ADD, AddrVT, DstAddr, |
| 3812 | DAG.getConstant(Offset, AddrVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3813 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3814 | BytesLeft -= 2; |
| 3815 | Offset += 2; |
Evan Cheng | 386031a | 2006-03-24 07:29:27 +0000 | [diff] [blame] | 3816 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3817 | if (BytesLeft == 1) { |
| 3818 | Value = DAG.getConstant(Val, MVT::i8); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 3819 | Chain = DAG.getStore(Chain, Value, |
| 3820 | DAG.getNode(ISD::ADD, AddrVT, DstAddr, |
| 3821 | DAG.getConstant(Offset, AddrVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3822 | NULL, 0); |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 3823 | } |
Evan Cheng | 386031a | 2006-03-24 07:29:27 +0000 | [diff] [blame] | 3824 | } |
Evan Cheng | 11e15b3 | 2006-04-03 20:53:28 +0000 | [diff] [blame] | 3825 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3826 | return Chain; |
| 3827 | } |
Evan Cheng | 11e15b3 | 2006-04-03 20:53:28 +0000 | [diff] [blame] | 3828 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3829 | SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) { |
| 3830 | SDOperand Chain = Op.getOperand(0); |
| 3831 | unsigned Align = |
| 3832 | (unsigned)cast<ConstantSDNode>(Op.getOperand(4))->getValue(); |
| 3833 | if (Align == 0) Align = 1; |
Evan Cheng | 11e15b3 | 2006-04-03 20:53:28 +0000 | [diff] [blame] | 3834 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3835 | ConstantSDNode *I = dyn_cast<ConstantSDNode>(Op.getOperand(3)); |
| 3836 | // If not DWORD aligned, call memcpy if size is less than the threshold. |
| 3837 | // It knows how to align to the right boundary first. |
| 3838 | if ((Align & 3) != 0 || |
| 3839 | (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) { |
| 3840 | MVT::ValueType IntPtr = getPointerTy(); |
Reid Spencer | 4785781 | 2006-12-31 05:55:36 +0000 | [diff] [blame] | 3841 | TargetLowering::ArgListTy Args; |
| 3842 | TargetLowering::ArgListEntry Entry; |
Anton Korobeynikov | b10308e | 2007-01-28 13:31:35 +0000 | [diff] [blame] | 3843 | Entry.Ty = getTargetData()->getIntPtrType(); |
Reid Spencer | 4785781 | 2006-12-31 05:55:36 +0000 | [diff] [blame] | 3844 | Entry.Node = Op.getOperand(1); Args.push_back(Entry); |
| 3845 | Entry.Node = Op.getOperand(2); Args.push_back(Entry); |
| 3846 | Entry.Node = Op.getOperand(3); Args.push_back(Entry); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3847 | std::pair<SDOperand,SDOperand> CallResult = |
Reid Spencer | 4785781 | 2006-12-31 05:55:36 +0000 | [diff] [blame] | 3848 | LowerCallTo(Chain, Type::VoidTy, false, false, CallingConv::C, false, |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3849 | DAG.getExternalSymbol("memcpy", IntPtr), Args, DAG); |
| 3850 | return CallResult.second; |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 3851 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3852 | |
| 3853 | MVT::ValueType AVT; |
| 3854 | SDOperand Count; |
| 3855 | unsigned BytesLeft = 0; |
| 3856 | bool TwoRepMovs = false; |
| 3857 | switch (Align & 3) { |
| 3858 | case 2: // WORD aligned |
| 3859 | AVT = MVT::i16; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3860 | break; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3861 | case 0: // DWORD aligned |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3862 | AVT = MVT::i32; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3863 | if (Subtarget->is64Bit() && ((Align & 0xF) == 0)) // QWORD aligned |
| 3864 | AVT = MVT::i64; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3865 | break; |
| 3866 | default: // Byte aligned |
| 3867 | AVT = MVT::i8; |
| 3868 | Count = Op.getOperand(3); |
| 3869 | break; |
| 3870 | } |
| 3871 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3872 | if (AVT > MVT::i8) { |
| 3873 | if (I) { |
| 3874 | unsigned UBytes = MVT::getSizeInBits(AVT) / 8; |
| 3875 | Count = DAG.getConstant(I->getValue() / UBytes, getPointerTy()); |
| 3876 | BytesLeft = I->getValue() % UBytes; |
| 3877 | } else { |
| 3878 | assert(AVT >= MVT::i32 && |
| 3879 | "Do not use rep;movs if not at least DWORD aligned"); |
| 3880 | Count = DAG.getNode(ISD::SRL, Op.getOperand(3).getValueType(), |
| 3881 | Op.getOperand(3), DAG.getConstant(2, MVT::i8)); |
| 3882 | TwoRepMovs = true; |
| 3883 | } |
| 3884 | } |
| 3885 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3886 | SDOperand InFlag(0, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3887 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RCX : X86::ECX, |
| 3888 | Count, InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3889 | InFlag = Chain.getValue(1); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3890 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RDI : X86::EDI, |
| 3891 | Op.getOperand(1), InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3892 | InFlag = Chain.getValue(1); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3893 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RSI : X86::ESI, |
| 3894 | Op.getOperand(2), InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3895 | InFlag = Chain.getValue(1); |
| 3896 | |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 3897 | SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3898 | SmallVector<SDOperand, 8> Ops; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3899 | Ops.push_back(Chain); |
| 3900 | Ops.push_back(DAG.getValueType(AVT)); |
| 3901 | Ops.push_back(InFlag); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 3902 | Chain = DAG.getNode(X86ISD::REP_MOVS, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3903 | |
| 3904 | if (TwoRepMovs) { |
| 3905 | InFlag = Chain.getValue(1); |
| 3906 | Count = Op.getOperand(3); |
| 3907 | MVT::ValueType CVT = Count.getValueType(); |
| 3908 | SDOperand Left = DAG.getNode(ISD::AND, CVT, Count, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3909 | DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT)); |
| 3910 | Chain = DAG.getCopyToReg(Chain, (CVT == MVT::i64) ? X86::RCX : X86::ECX, |
| 3911 | Left, InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3912 | InFlag = Chain.getValue(1); |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 3913 | Tys = DAG.getVTList(MVT::Other, MVT::Flag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3914 | Ops.clear(); |
| 3915 | Ops.push_back(Chain); |
| 3916 | Ops.push_back(DAG.getValueType(MVT::i8)); |
| 3917 | Ops.push_back(InFlag); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 3918 | Chain = DAG.getNode(X86ISD::REP_MOVS, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3919 | } else if (BytesLeft) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3920 | // Issue loads and stores for the last 1 - 7 bytes. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3921 | unsigned Offset = I->getValue() - BytesLeft; |
| 3922 | SDOperand DstAddr = Op.getOperand(1); |
| 3923 | MVT::ValueType DstVT = DstAddr.getValueType(); |
| 3924 | SDOperand SrcAddr = Op.getOperand(2); |
| 3925 | MVT::ValueType SrcVT = SrcAddr.getValueType(); |
| 3926 | SDOperand Value; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3927 | if (BytesLeft >= 4) { |
| 3928 | Value = DAG.getLoad(MVT::i32, Chain, |
| 3929 | DAG.getNode(ISD::ADD, SrcVT, SrcAddr, |
| 3930 | DAG.getConstant(Offset, SrcVT)), |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3931 | NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3932 | Chain = Value.getValue(1); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 3933 | Chain = DAG.getStore(Chain, Value, |
| 3934 | DAG.getNode(ISD::ADD, DstVT, DstAddr, |
| 3935 | DAG.getConstant(Offset, DstVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3936 | NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3937 | BytesLeft -= 4; |
| 3938 | Offset += 4; |
| 3939 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3940 | if (BytesLeft >= 2) { |
| 3941 | Value = DAG.getLoad(MVT::i16, Chain, |
| 3942 | DAG.getNode(ISD::ADD, SrcVT, SrcAddr, |
| 3943 | DAG.getConstant(Offset, SrcVT)), |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3944 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3945 | Chain = Value.getValue(1); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 3946 | Chain = DAG.getStore(Chain, Value, |
| 3947 | DAG.getNode(ISD::ADD, DstVT, DstAddr, |
| 3948 | DAG.getConstant(Offset, DstVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3949 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3950 | BytesLeft -= 2; |
| 3951 | Offset += 2; |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 3952 | } |
| 3953 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3954 | if (BytesLeft == 1) { |
| 3955 | Value = DAG.getLoad(MVT::i8, Chain, |
| 3956 | DAG.getNode(ISD::ADD, SrcVT, SrcAddr, |
| 3957 | DAG.getConstant(Offset, SrcVT)), |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3958 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3959 | Chain = Value.getValue(1); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 3960 | Chain = DAG.getStore(Chain, Value, |
| 3961 | DAG.getNode(ISD::ADD, DstVT, DstAddr, |
| 3962 | DAG.getConstant(Offset, DstVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3963 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3964 | } |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 3965 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3966 | |
| 3967 | return Chain; |
| 3968 | } |
| 3969 | |
| 3970 | SDOperand |
| 3971 | X86TargetLowering::LowerREADCYCLCECOUNTER(SDOperand Op, SelectionDAG &DAG) { |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 3972 | SDVTList Tys = DAG.getVTList(MVT::Other, MVT::Flag); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3973 | SDOperand TheOp = Op.getOperand(0); |
| 3974 | SDOperand rd = DAG.getNode(X86ISD::RDTSC_DAG, Tys, &TheOp, 1); |
Evan Cheng | 3fa9dff | 2006-11-29 08:28:13 +0000 | [diff] [blame] | 3975 | if (Subtarget->is64Bit()) { |
| 3976 | SDOperand Copy1 = DAG.getCopyFromReg(rd, X86::RAX, MVT::i64, rd.getValue(1)); |
| 3977 | SDOperand Copy2 = DAG.getCopyFromReg(Copy1.getValue(1), X86::RDX, |
| 3978 | MVT::i64, Copy1.getValue(2)); |
| 3979 | SDOperand Tmp = DAG.getNode(ISD::SHL, MVT::i64, Copy2, |
| 3980 | DAG.getConstant(32, MVT::i8)); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3981 | SDOperand Ops[] = { |
| 3982 | DAG.getNode(ISD::OR, MVT::i64, Copy1, Tmp), Copy2.getValue(1) |
| 3983 | }; |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 3984 | |
| 3985 | Tys = DAG.getVTList(MVT::i64, MVT::Other); |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3986 | return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops, 2); |
Evan Cheng | 3fa9dff | 2006-11-29 08:28:13 +0000 | [diff] [blame] | 3987 | } |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 3988 | |
| 3989 | SDOperand Copy1 = DAG.getCopyFromReg(rd, X86::EAX, MVT::i32, rd.getValue(1)); |
| 3990 | SDOperand Copy2 = DAG.getCopyFromReg(Copy1.getValue(1), X86::EDX, |
| 3991 | MVT::i32, Copy1.getValue(2)); |
| 3992 | SDOperand Ops[] = { Copy1, Copy2, Copy2.getValue(1) }; |
| 3993 | Tys = DAG.getVTList(MVT::i32, MVT::i32, MVT::Other); |
| 3994 | return DAG.getNode(ISD::MERGE_VALUES, Tys, Ops, 3); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3995 | } |
| 3996 | |
| 3997 | SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3998 | SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2)); |
| 3999 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4000 | if (!Subtarget->is64Bit()) { |
| 4001 | // vastart just stores the address of the VarArgsFrameIndex slot into the |
| 4002 | // memory location argument. |
| 4003 | SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy()); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4004 | return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV->getValue(), |
| 4005 | SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4006 | } |
| 4007 | |
| 4008 | // __va_list_tag: |
| 4009 | // gp_offset (0 - 6 * 8) |
| 4010 | // fp_offset (48 - 48 + 8 * 16) |
| 4011 | // overflow_arg_area (point to parameters coming in memory). |
| 4012 | // reg_save_area |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 4013 | SmallVector<SDOperand, 8> MemOps; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4014 | SDOperand FIN = Op.getOperand(1); |
| 4015 | // Store gp_offset |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4016 | SDOperand Store = DAG.getStore(Op.getOperand(0), |
| 4017 | DAG.getConstant(VarArgsGPOffset, MVT::i32), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4018 | FIN, SV->getValue(), SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4019 | MemOps.push_back(Store); |
| 4020 | |
| 4021 | // Store fp_offset |
| 4022 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 4023 | DAG.getConstant(4, getPointerTy())); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4024 | Store = DAG.getStore(Op.getOperand(0), |
| 4025 | DAG.getConstant(VarArgsFPOffset, MVT::i32), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4026 | FIN, SV->getValue(), SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4027 | MemOps.push_back(Store); |
| 4028 | |
| 4029 | // Store ptr to overflow_arg_area |
| 4030 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 4031 | DAG.getConstant(4, getPointerTy())); |
| 4032 | SDOperand OVFIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy()); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4033 | Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV->getValue(), |
| 4034 | SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4035 | MemOps.push_back(Store); |
| 4036 | |
| 4037 | // Store ptr to reg_save_area. |
| 4038 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 4039 | DAG.getConstant(8, getPointerTy())); |
| 4040 | SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy()); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4041 | Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV->getValue(), |
| 4042 | SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4043 | MemOps.push_back(Store); |
| 4044 | return DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOps[0], MemOps.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4045 | } |
| 4046 | |
Evan Cheng | ae64219 | 2007-03-02 23:16:35 +0000 | [diff] [blame] | 4047 | SDOperand X86TargetLowering::LowerVACOPY(SDOperand Op, SelectionDAG &DAG) { |
| 4048 | // X86-64 va_list is a struct { i32, i32, i8*, i8* }. |
| 4049 | SDOperand Chain = Op.getOperand(0); |
| 4050 | SDOperand DstPtr = Op.getOperand(1); |
| 4051 | SDOperand SrcPtr = Op.getOperand(2); |
| 4052 | SrcValueSDNode *DstSV = cast<SrcValueSDNode>(Op.getOperand(3)); |
| 4053 | SrcValueSDNode *SrcSV = cast<SrcValueSDNode>(Op.getOperand(4)); |
| 4054 | |
| 4055 | SrcPtr = DAG.getLoad(getPointerTy(), Chain, SrcPtr, |
| 4056 | SrcSV->getValue(), SrcSV->getOffset()); |
| 4057 | Chain = SrcPtr.getValue(1); |
| 4058 | for (unsigned i = 0; i < 3; ++i) { |
| 4059 | SDOperand Val = DAG.getLoad(MVT::i64, Chain, SrcPtr, |
| 4060 | SrcSV->getValue(), SrcSV->getOffset()); |
| 4061 | Chain = Val.getValue(1); |
| 4062 | Chain = DAG.getStore(Chain, Val, DstPtr, |
| 4063 | DstSV->getValue(), DstSV->getOffset()); |
| 4064 | if (i == 2) |
| 4065 | break; |
| 4066 | SrcPtr = DAG.getNode(ISD::ADD, getPointerTy(), SrcPtr, |
| 4067 | DAG.getConstant(8, getPointerTy())); |
| 4068 | DstPtr = DAG.getNode(ISD::ADD, getPointerTy(), DstPtr, |
| 4069 | DAG.getConstant(8, getPointerTy())); |
| 4070 | } |
| 4071 | return Chain; |
| 4072 | } |
| 4073 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4074 | SDOperand |
| 4075 | X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDOperand Op, SelectionDAG &DAG) { |
| 4076 | unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getValue(); |
| 4077 | switch (IntNo) { |
| 4078 | default: return SDOperand(); // Don't custom lower most intrinsics. |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4079 | // Comparison intrinsics. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4080 | case Intrinsic::x86_sse_comieq_ss: |
| 4081 | case Intrinsic::x86_sse_comilt_ss: |
| 4082 | case Intrinsic::x86_sse_comile_ss: |
| 4083 | case Intrinsic::x86_sse_comigt_ss: |
| 4084 | case Intrinsic::x86_sse_comige_ss: |
| 4085 | case Intrinsic::x86_sse_comineq_ss: |
| 4086 | case Intrinsic::x86_sse_ucomieq_ss: |
| 4087 | case Intrinsic::x86_sse_ucomilt_ss: |
| 4088 | case Intrinsic::x86_sse_ucomile_ss: |
| 4089 | case Intrinsic::x86_sse_ucomigt_ss: |
| 4090 | case Intrinsic::x86_sse_ucomige_ss: |
| 4091 | case Intrinsic::x86_sse_ucomineq_ss: |
| 4092 | case Intrinsic::x86_sse2_comieq_sd: |
| 4093 | case Intrinsic::x86_sse2_comilt_sd: |
| 4094 | case Intrinsic::x86_sse2_comile_sd: |
| 4095 | case Intrinsic::x86_sse2_comigt_sd: |
| 4096 | case Intrinsic::x86_sse2_comige_sd: |
| 4097 | case Intrinsic::x86_sse2_comineq_sd: |
| 4098 | case Intrinsic::x86_sse2_ucomieq_sd: |
| 4099 | case Intrinsic::x86_sse2_ucomilt_sd: |
| 4100 | case Intrinsic::x86_sse2_ucomile_sd: |
| 4101 | case Intrinsic::x86_sse2_ucomigt_sd: |
| 4102 | case Intrinsic::x86_sse2_ucomige_sd: |
| 4103 | case Intrinsic::x86_sse2_ucomineq_sd: { |
| 4104 | unsigned Opc = 0; |
| 4105 | ISD::CondCode CC = ISD::SETCC_INVALID; |
| 4106 | switch (IntNo) { |
| 4107 | default: break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4108 | case Intrinsic::x86_sse_comieq_ss: |
| 4109 | case Intrinsic::x86_sse2_comieq_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4110 | Opc = X86ISD::COMI; |
| 4111 | CC = ISD::SETEQ; |
| 4112 | break; |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4113 | case Intrinsic::x86_sse_comilt_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4114 | case Intrinsic::x86_sse2_comilt_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4115 | Opc = X86ISD::COMI; |
| 4116 | CC = ISD::SETLT; |
| 4117 | break; |
| 4118 | case Intrinsic::x86_sse_comile_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4119 | case Intrinsic::x86_sse2_comile_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4120 | Opc = X86ISD::COMI; |
| 4121 | CC = ISD::SETLE; |
| 4122 | break; |
| 4123 | case Intrinsic::x86_sse_comigt_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4124 | case Intrinsic::x86_sse2_comigt_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4125 | Opc = X86ISD::COMI; |
| 4126 | CC = ISD::SETGT; |
| 4127 | break; |
| 4128 | case Intrinsic::x86_sse_comige_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4129 | case Intrinsic::x86_sse2_comige_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4130 | Opc = X86ISD::COMI; |
| 4131 | CC = ISD::SETGE; |
| 4132 | break; |
| 4133 | case Intrinsic::x86_sse_comineq_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4134 | case Intrinsic::x86_sse2_comineq_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4135 | Opc = X86ISD::COMI; |
| 4136 | CC = ISD::SETNE; |
| 4137 | break; |
| 4138 | case Intrinsic::x86_sse_ucomieq_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4139 | case Intrinsic::x86_sse2_ucomieq_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4140 | Opc = X86ISD::UCOMI; |
| 4141 | CC = ISD::SETEQ; |
| 4142 | break; |
| 4143 | case Intrinsic::x86_sse_ucomilt_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4144 | case Intrinsic::x86_sse2_ucomilt_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4145 | Opc = X86ISD::UCOMI; |
| 4146 | CC = ISD::SETLT; |
| 4147 | break; |
| 4148 | case Intrinsic::x86_sse_ucomile_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4149 | case Intrinsic::x86_sse2_ucomile_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4150 | Opc = X86ISD::UCOMI; |
| 4151 | CC = ISD::SETLE; |
| 4152 | break; |
| 4153 | case Intrinsic::x86_sse_ucomigt_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4154 | case Intrinsic::x86_sse2_ucomigt_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4155 | Opc = X86ISD::UCOMI; |
| 4156 | CC = ISD::SETGT; |
| 4157 | break; |
| 4158 | case Intrinsic::x86_sse_ucomige_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4159 | case Intrinsic::x86_sse2_ucomige_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4160 | Opc = X86ISD::UCOMI; |
| 4161 | CC = ISD::SETGE; |
| 4162 | break; |
| 4163 | case Intrinsic::x86_sse_ucomineq_ss: |
| 4164 | case Intrinsic::x86_sse2_ucomineq_sd: |
| 4165 | Opc = X86ISD::UCOMI; |
| 4166 | CC = ISD::SETNE; |
| 4167 | break; |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4168 | } |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4169 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4170 | unsigned X86CC; |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 4171 | SDOperand LHS = Op.getOperand(1); |
| 4172 | SDOperand RHS = Op.getOperand(2); |
| 4173 | translateX86CC(CC, true, X86CC, LHS, RHS, DAG); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4174 | |
| 4175 | const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 4176 | SDOperand Ops1[] = { DAG.getEntryNode(), LHS, RHS }; |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4177 | SDOperand Cond = DAG.getNode(Opc, VTs, 2, Ops1, 3); |
| 4178 | VTs = DAG.getNodeValueTypes(MVT::i8, MVT::Flag); |
| 4179 | SDOperand Ops2[] = { DAG.getConstant(X86CC, MVT::i8), Cond }; |
| 4180 | SDOperand SetCC = DAG.getNode(X86ISD::SETCC, VTs, 2, Ops2, 2); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4181 | return DAG.getNode(ISD::ANY_EXTEND, MVT::i32, SetCC); |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4182 | } |
Evan Cheng | 38bcbaf | 2005-12-23 07:31:11 +0000 | [diff] [blame] | 4183 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4184 | } |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4185 | |
Nate Begeman | bcc5f36 | 2007-01-29 22:58:52 +0000 | [diff] [blame] | 4186 | SDOperand X86TargetLowering::LowerRETURNADDR(SDOperand Op, SelectionDAG &DAG) { |
| 4187 | // Depths > 0 not supported yet! |
| 4188 | if (cast<ConstantSDNode>(Op.getOperand(0))->getValue() > 0) |
| 4189 | return SDOperand(); |
| 4190 | |
| 4191 | // Just load the return address |
| 4192 | SDOperand RetAddrFI = getReturnAddressFrameIndex(DAG); |
| 4193 | return DAG.getLoad(getPointerTy(), DAG.getEntryNode(), RetAddrFI, NULL, 0); |
| 4194 | } |
| 4195 | |
| 4196 | SDOperand X86TargetLowering::LowerFRAMEADDR(SDOperand Op, SelectionDAG &DAG) { |
| 4197 | // Depths > 0 not supported yet! |
| 4198 | if (cast<ConstantSDNode>(Op.getOperand(0))->getValue() > 0) |
| 4199 | return SDOperand(); |
| 4200 | |
| 4201 | SDOperand RetAddrFI = getReturnAddressFrameIndex(DAG); |
| 4202 | return DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI, |
| 4203 | DAG.getConstant(4, getPointerTy())); |
| 4204 | } |
| 4205 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4206 | /// LowerOperation - Provide custom lowering hooks for some operations. |
| 4207 | /// |
| 4208 | SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { |
| 4209 | switch (Op.getOpcode()) { |
| 4210 | default: assert(0 && "Should not custom lower this!"); |
| 4211 | case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG); |
| 4212 | case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); |
| 4213 | case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG); |
| 4214 | case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG); |
| 4215 | case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); |
| 4216 | case ISD::ConstantPool: return LowerConstantPool(Op, DAG); |
| 4217 | case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); |
Lauro Ramos Venancio | b3a0417 | 2007-04-20 21:38:10 +0000 | [diff] [blame] | 4218 | case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4219 | case ISD::ExternalSymbol: return LowerExternalSymbol(Op, DAG); |
| 4220 | case ISD::SHL_PARTS: |
| 4221 | case ISD::SRA_PARTS: |
| 4222 | case ISD::SRL_PARTS: return LowerShift(Op, DAG); |
| 4223 | case ISD::SINT_TO_FP: return LowerSINT_TO_FP(Op, DAG); |
| 4224 | case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG); |
| 4225 | case ISD::FABS: return LowerFABS(Op, DAG); |
| 4226 | case ISD::FNEG: return LowerFNEG(Op, DAG); |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 4227 | case ISD::FCOPYSIGN: return LowerFCOPYSIGN(Op, DAG); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4228 | case ISD::SETCC: return LowerSETCC(Op, DAG, DAG.getEntryNode()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4229 | case ISD::SELECT: return LowerSELECT(Op, DAG); |
| 4230 | case ISD::BRCOND: return LowerBRCOND(Op, DAG); |
| 4231 | case ISD::JumpTable: return LowerJumpTable(Op, DAG); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 4232 | case ISD::CALL: return LowerCALL(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4233 | case ISD::RET: return LowerRET(Op, DAG); |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 4234 | case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4235 | case ISD::MEMSET: return LowerMEMSET(Op, DAG); |
| 4236 | case ISD::MEMCPY: return LowerMEMCPY(Op, DAG); |
| 4237 | case ISD::READCYCLECOUNTER: return LowerREADCYCLCECOUNTER(Op, DAG); |
| 4238 | case ISD::VASTART: return LowerVASTART(Op, DAG); |
Evan Cheng | ae64219 | 2007-03-02 23:16:35 +0000 | [diff] [blame] | 4239 | case ISD::VACOPY: return LowerVACOPY(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4240 | case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); |
Nate Begeman | bcc5f36 | 2007-01-29 22:58:52 +0000 | [diff] [blame] | 4241 | case ISD::RETURNADDR: return LowerRETURNADDR(Op, DAG); |
| 4242 | case ISD::FRAMEADDR: return LowerFRAMEADDR(Op, DAG); |
Anton Korobeynikov | 57fc00d | 2007-04-17 09:20:00 +0000 | [diff] [blame] | 4243 | case ISD::DYNAMIC_STACKALLOC: return LowerDYNAMIC_STACKALLOC(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4244 | } |
Jim Laskey | 62819f3 | 2007-02-21 22:54:50 +0000 | [diff] [blame] | 4245 | return SDOperand(); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4246 | } |
| 4247 | |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4248 | const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const { |
| 4249 | switch (Opcode) { |
| 4250 | default: return NULL; |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 4251 | case X86ISD::SHLD: return "X86ISD::SHLD"; |
| 4252 | case X86ISD::SHRD: return "X86ISD::SHRD"; |
Evan Cheng | ef6ffb1 | 2006-01-31 03:14:29 +0000 | [diff] [blame] | 4253 | case X86ISD::FAND: return "X86ISD::FAND"; |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 4254 | case X86ISD::FOR: return "X86ISD::FOR"; |
Evan Cheng | 223547a | 2006-01-31 22:28:30 +0000 | [diff] [blame] | 4255 | case X86ISD::FXOR: return "X86ISD::FXOR"; |
Evan Cheng | 68c47cb | 2007-01-05 07:55:56 +0000 | [diff] [blame] | 4256 | case X86ISD::FSRL: return "X86ISD::FSRL"; |
Evan Cheng | a3195e8 | 2006-01-12 22:54:21 +0000 | [diff] [blame] | 4257 | case X86ISD::FILD: return "X86ISD::FILD"; |
Evan Cheng | e3de85b | 2006-02-04 02:20:30 +0000 | [diff] [blame] | 4258 | case X86ISD::FILD_FLAG: return "X86ISD::FILD_FLAG"; |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4259 | case X86ISD::FP_TO_INT16_IN_MEM: return "X86ISD::FP_TO_INT16_IN_MEM"; |
| 4260 | case X86ISD::FP_TO_INT32_IN_MEM: return "X86ISD::FP_TO_INT32_IN_MEM"; |
| 4261 | case X86ISD::FP_TO_INT64_IN_MEM: return "X86ISD::FP_TO_INT64_IN_MEM"; |
Evan Cheng | b077b84 | 2005-12-21 02:39:21 +0000 | [diff] [blame] | 4262 | case X86ISD::FLD: return "X86ISD::FLD"; |
Evan Cheng | d90eb7f | 2006-01-05 00:27:02 +0000 | [diff] [blame] | 4263 | case X86ISD::FST: return "X86ISD::FST"; |
| 4264 | case X86ISD::FP_GET_RESULT: return "X86ISD::FP_GET_RESULT"; |
Evan Cheng | b077b84 | 2005-12-21 02:39:21 +0000 | [diff] [blame] | 4265 | case X86ISD::FP_SET_RESULT: return "X86ISD::FP_SET_RESULT"; |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4266 | case X86ISD::CALL: return "X86ISD::CALL"; |
| 4267 | case X86ISD::TAILCALL: return "X86ISD::TAILCALL"; |
| 4268 | case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG"; |
| 4269 | case X86ISD::CMP: return "X86ISD::CMP"; |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4270 | case X86ISD::COMI: return "X86ISD::COMI"; |
| 4271 | case X86ISD::UCOMI: return "X86ISD::UCOMI"; |
Evan Cheng | d5781fc | 2005-12-21 20:21:51 +0000 | [diff] [blame] | 4272 | case X86ISD::SETCC: return "X86ISD::SETCC"; |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4273 | case X86ISD::CMOV: return "X86ISD::CMOV"; |
| 4274 | case X86ISD::BRCOND: return "X86ISD::BRCOND"; |
Evan Cheng | b077b84 | 2005-12-21 02:39:21 +0000 | [diff] [blame] | 4275 | case X86ISD::RET_FLAG: return "X86ISD::RET_FLAG"; |
Evan Cheng | 8df346b | 2006-03-04 01:12:00 +0000 | [diff] [blame] | 4276 | case X86ISD::REP_STOS: return "X86ISD::REP_STOS"; |
| 4277 | case X86ISD::REP_MOVS: return "X86ISD::REP_MOVS"; |
Evan Cheng | 223547a | 2006-01-31 22:28:30 +0000 | [diff] [blame] | 4278 | case X86ISD::LOAD_PACK: return "X86ISD::LOAD_PACK"; |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4279 | case X86ISD::LOAD_UA: return "X86ISD::LOAD_UA"; |
Evan Cheng | 7ccced6 | 2006-02-18 00:15:05 +0000 | [diff] [blame] | 4280 | case X86ISD::GlobalBaseReg: return "X86ISD::GlobalBaseReg"; |
Evan Cheng | 020d2e8 | 2006-02-23 20:41:18 +0000 | [diff] [blame] | 4281 | case X86ISD::Wrapper: return "X86ISD::Wrapper"; |
Evan Cheng | bc4832b | 2006-03-24 23:15:12 +0000 | [diff] [blame] | 4282 | case X86ISD::S2VEC: return "X86ISD::S2VEC"; |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 4283 | case X86ISD::PEXTRW: return "X86ISD::PEXTRW"; |
Evan Cheng | 653159f | 2006-03-31 21:55:24 +0000 | [diff] [blame] | 4284 | case X86ISD::PINSRW: return "X86ISD::PINSRW"; |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 4285 | case X86ISD::FMAX: return "X86ISD::FMAX"; |
| 4286 | case X86ISD::FMIN: return "X86ISD::FMIN"; |
Lauro Ramos Venancio | b3a0417 | 2007-04-20 21:38:10 +0000 | [diff] [blame] | 4287 | case X86ISD::TLSADDR: return "X86ISD::TLSADDR"; |
| 4288 | case X86ISD::THREAD_POINTER: return "X86ISD::THREAD_POINTER"; |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4289 | } |
| 4290 | } |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 4291 | |
Chris Lattner | c9addb7 | 2007-03-30 23:15:24 +0000 | [diff] [blame] | 4292 | // isLegalAddressingMode - Return true if the addressing mode represented |
| 4293 | // by AM is legal for this target, for a load/store of the specified type. |
| 4294 | bool X86TargetLowering::isLegalAddressingMode(const AddrMode &AM, |
| 4295 | const Type *Ty) const { |
| 4296 | // X86 supports extremely general addressing modes. |
| 4297 | |
| 4298 | // X86 allows a sign-extended 32-bit immediate field as a displacement. |
| 4299 | if (AM.BaseOffs <= -(1LL << 32) || AM.BaseOffs >= (1LL << 32)-1) |
| 4300 | return false; |
| 4301 | |
| 4302 | if (AM.BaseGV) { |
| 4303 | // X86-64 only supports addr of globals in small code model. |
| 4304 | if (Subtarget->is64Bit() && |
| 4305 | getTargetMachine().getCodeModel() != CodeModel::Small) |
| 4306 | return false; |
| 4307 | |
| 4308 | // We can only fold this if we don't need a load either. |
| 4309 | if (Subtarget->GVRequiresExtraLoad(AM.BaseGV, getTargetMachine(), false)) |
| 4310 | return false; |
| 4311 | } |
| 4312 | |
| 4313 | switch (AM.Scale) { |
| 4314 | case 0: |
| 4315 | case 1: |
| 4316 | case 2: |
| 4317 | case 4: |
| 4318 | case 8: |
| 4319 | // These scales always work. |
| 4320 | break; |
| 4321 | case 3: |
| 4322 | case 5: |
| 4323 | case 9: |
| 4324 | // These scales are formed with basereg+scalereg. Only accept if there is |
| 4325 | // no basereg yet. |
| 4326 | if (AM.HasBaseReg) |
| 4327 | return false; |
| 4328 | break; |
| 4329 | default: // Other stuff never works. |
| 4330 | return false; |
| 4331 | } |
| 4332 | |
| 4333 | return true; |
| 4334 | } |
| 4335 | |
| 4336 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4337 | /// isShuffleMaskLegal - Targets can use this to indicate that they only |
| 4338 | /// support *some* VECTOR_SHUFFLE operations, those with specific masks. |
| 4339 | /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values |
| 4340 | /// are assumed to be legal. |
| 4341 | bool |
| 4342 | X86TargetLowering::isShuffleMaskLegal(SDOperand Mask, MVT::ValueType VT) const { |
| 4343 | // Only do shuffles on 128-bit vector types for now. |
| 4344 | if (MVT::getSizeInBits(VT) == 64) return false; |
| 4345 | return (Mask.Val->getNumOperands() <= 4 || |
Evan Cheng | 49892af | 2007-06-19 00:02:56 +0000 | [diff] [blame] | 4346 | isIdentityMask(Mask.Val) || |
| 4347 | isIdentityMask(Mask.Val, true) || |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4348 | isSplatMask(Mask.Val) || |
| 4349 | isPSHUFHW_PSHUFLWMask(Mask.Val) || |
| 4350 | X86::isUNPCKLMask(Mask.Val) || |
Evan Cheng | 49892af | 2007-06-19 00:02:56 +0000 | [diff] [blame] | 4351 | X86::isUNPCKHMask(Mask.Val) || |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4352 | X86::isUNPCKL_v_undef_Mask(Mask.Val) || |
Evan Cheng | 49892af | 2007-06-19 00:02:56 +0000 | [diff] [blame] | 4353 | X86::isUNPCKH_v_undef_Mask(Mask.Val)); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4354 | } |
| 4355 | |
| 4356 | bool X86TargetLowering::isVectorClearMaskLegal(std::vector<SDOperand> &BVOps, |
| 4357 | MVT::ValueType EVT, |
| 4358 | SelectionDAG &DAG) const { |
| 4359 | unsigned NumElts = BVOps.size(); |
| 4360 | // Only do shuffles on 128-bit vector types for now. |
| 4361 | if (MVT::getSizeInBits(EVT) * NumElts == 64) return false; |
| 4362 | if (NumElts == 2) return true; |
| 4363 | if (NumElts == 4) { |
Chris Lattner | 5a88b83 | 2007-02-25 07:10:00 +0000 | [diff] [blame] | 4364 | return (isMOVLMask(&BVOps[0], 4) || |
| 4365 | isCommutedMOVL(&BVOps[0], 4, true) || |
| 4366 | isSHUFPMask(&BVOps[0], 4) || |
| 4367 | isCommutedSHUFP(&BVOps[0], 4)); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4368 | } |
| 4369 | return false; |
| 4370 | } |
| 4371 | |
| 4372 | //===----------------------------------------------------------------------===// |
| 4373 | // X86 Scheduler Hooks |
| 4374 | //===----------------------------------------------------------------------===// |
| 4375 | |
| 4376 | MachineBasicBlock * |
| 4377 | X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI, |
| 4378 | MachineBasicBlock *BB) { |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4379 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4380 | switch (MI->getOpcode()) { |
| 4381 | default: assert(false && "Unexpected instr type to insert"); |
| 4382 | case X86::CMOV_FR32: |
| 4383 | case X86::CMOV_FR64: |
| 4384 | case X86::CMOV_V4F32: |
| 4385 | case X86::CMOV_V2F64: |
| 4386 | case X86::CMOV_V2I64: { |
| 4387 | // To "insert" a SELECT_CC instruction, we actually have to insert the |
| 4388 | // diamond control-flow pattern. The incoming instruction knows the |
| 4389 | // destination vreg to set, the condition code register to branch on, the |
| 4390 | // true/false values to select between, and a branch opcode to use. |
| 4391 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 4392 | ilist<MachineBasicBlock>::iterator It = BB; |
| 4393 | ++It; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4394 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4395 | // thisMBB: |
| 4396 | // ... |
| 4397 | // TrueVal = ... |
| 4398 | // cmpTY ccX, r1, r2 |
| 4399 | // bCC copy1MBB |
| 4400 | // fallthrough --> copy0MBB |
| 4401 | MachineBasicBlock *thisMBB = BB; |
| 4402 | MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB); |
| 4403 | MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4404 | unsigned Opc = |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4405 | X86::GetCondBranchFromCond((X86::CondCode)MI->getOperand(3).getImm()); |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4406 | BuildMI(BB, TII->get(Opc)).addMBB(sinkMBB); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4407 | MachineFunction *F = BB->getParent(); |
| 4408 | F->getBasicBlockList().insert(It, copy0MBB); |
| 4409 | F->getBasicBlockList().insert(It, sinkMBB); |
| 4410 | // Update machine-CFG edges by first adding all successors of the current |
| 4411 | // block to the new block which will contain the Phi node for the select. |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4412 | for(MachineBasicBlock::succ_iterator i = BB->succ_begin(), |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4413 | e = BB->succ_end(); i != e; ++i) |
| 4414 | sinkMBB->addSuccessor(*i); |
| 4415 | // Next, remove all successors of the current block, and add the true |
| 4416 | // and fallthrough blocks as its successors. |
| 4417 | while(!BB->succ_empty()) |
| 4418 | BB->removeSuccessor(BB->succ_begin()); |
| 4419 | BB->addSuccessor(copy0MBB); |
| 4420 | BB->addSuccessor(sinkMBB); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4421 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4422 | // copy0MBB: |
| 4423 | // %FalseValue = ... |
| 4424 | // # fallthrough to sinkMBB |
| 4425 | BB = copy0MBB; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4426 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4427 | // Update machine-CFG edges |
| 4428 | BB->addSuccessor(sinkMBB); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4429 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4430 | // sinkMBB: |
| 4431 | // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ] |
| 4432 | // ... |
| 4433 | BB = sinkMBB; |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4434 | BuildMI(BB, TII->get(X86::PHI), MI->getOperand(0).getReg()) |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4435 | .addReg(MI->getOperand(1).getReg()).addMBB(copy0MBB) |
| 4436 | .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB); |
| 4437 | |
| 4438 | delete MI; // The pseudo instruction is gone now. |
| 4439 | return BB; |
| 4440 | } |
| 4441 | |
Dale Johannesen | 849f214 | 2007-07-03 00:53:03 +0000 | [diff] [blame] | 4442 | case X86::FP32_TO_INT16_IN_MEM: |
| 4443 | case X86::FP32_TO_INT32_IN_MEM: |
| 4444 | case X86::FP32_TO_INT64_IN_MEM: |
| 4445 | case X86::FP64_TO_INT16_IN_MEM: |
| 4446 | case X86::FP64_TO_INT32_IN_MEM: |
| 4447 | case X86::FP64_TO_INT64_IN_MEM: { |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4448 | // Change the floating point control register to use "round towards zero" |
| 4449 | // mode when truncating to an integer value. |
| 4450 | MachineFunction *F = BB->getParent(); |
| 4451 | int CWFrameIdx = F->getFrameInfo()->CreateStackObject(2, 2); |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4452 | addFrameReference(BuildMI(BB, TII->get(X86::FNSTCW16m)), CWFrameIdx); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4453 | |
| 4454 | // Load the old value of the high byte of the control word... |
| 4455 | unsigned OldCW = |
| 4456 | F->getSSARegMap()->createVirtualRegister(X86::GR16RegisterClass); |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4457 | addFrameReference(BuildMI(BB, TII->get(X86::MOV16rm), OldCW), CWFrameIdx); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4458 | |
| 4459 | // Set the high part to be round to zero... |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4460 | addFrameReference(BuildMI(BB, TII->get(X86::MOV16mi)), CWFrameIdx) |
| 4461 | .addImm(0xC7F); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4462 | |
| 4463 | // Reload the modified control word now... |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4464 | addFrameReference(BuildMI(BB, TII->get(X86::FLDCW16m)), CWFrameIdx); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4465 | |
| 4466 | // Restore the memory image of control word to original value |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4467 | addFrameReference(BuildMI(BB, TII->get(X86::MOV16mr)), CWFrameIdx) |
| 4468 | .addReg(OldCW); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4469 | |
| 4470 | // Get the X86 opcode to use. |
| 4471 | unsigned Opc; |
| 4472 | switch (MI->getOpcode()) { |
| 4473 | default: assert(0 && "illegal opcode!"); |
Dale Johannesen | e377d4d | 2007-07-04 21:07:47 +0000 | [diff] [blame] | 4474 | case X86::FP32_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m32; break; |
| 4475 | case X86::FP32_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m32; break; |
| 4476 | case X86::FP32_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m32; break; |
| 4477 | case X86::FP64_TO_INT16_IN_MEM: Opc = X86::IST_Fp16m64; break; |
| 4478 | case X86::FP64_TO_INT32_IN_MEM: Opc = X86::IST_Fp32m64; break; |
| 4479 | case X86::FP64_TO_INT64_IN_MEM: Opc = X86::IST_Fp64m64; break; |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4480 | } |
| 4481 | |
| 4482 | X86AddressMode AM; |
| 4483 | MachineOperand &Op = MI->getOperand(0); |
| 4484 | if (Op.isRegister()) { |
| 4485 | AM.BaseType = X86AddressMode::RegBase; |
| 4486 | AM.Base.Reg = Op.getReg(); |
| 4487 | } else { |
| 4488 | AM.BaseType = X86AddressMode::FrameIndexBase; |
| 4489 | AM.Base.FrameIndex = Op.getFrameIndex(); |
| 4490 | } |
| 4491 | Op = MI->getOperand(1); |
| 4492 | if (Op.isImmediate()) |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4493 | AM.Scale = Op.getImm(); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4494 | Op = MI->getOperand(2); |
| 4495 | if (Op.isImmediate()) |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4496 | AM.IndexReg = Op.getImm(); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4497 | Op = MI->getOperand(3); |
| 4498 | if (Op.isGlobalAddress()) { |
| 4499 | AM.GV = Op.getGlobal(); |
| 4500 | } else { |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4501 | AM.Disp = Op.getImm(); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4502 | } |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4503 | addFullAddress(BuildMI(BB, TII->get(Opc)), AM) |
| 4504 | .addReg(MI->getOperand(4).getReg()); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4505 | |
| 4506 | // Reload the original control word now. |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 4507 | addFrameReference(BuildMI(BB, TII->get(X86::FLDCW16m)), CWFrameIdx); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4508 | |
| 4509 | delete MI; // The pseudo instruction is gone now. |
| 4510 | return BB; |
| 4511 | } |
| 4512 | } |
| 4513 | } |
| 4514 | |
| 4515 | //===----------------------------------------------------------------------===// |
| 4516 | // X86 Optimization Hooks |
| 4517 | //===----------------------------------------------------------------------===// |
| 4518 | |
Nate Begeman | 368e18d | 2006-02-16 21:11:51 +0000 | [diff] [blame] | 4519 | void X86TargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op, |
| 4520 | uint64_t Mask, |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4521 | uint64_t &KnownZero, |
Nate Begeman | 368e18d | 2006-02-16 21:11:51 +0000 | [diff] [blame] | 4522 | uint64_t &KnownOne, |
Dan Gohman | ea859be | 2007-06-22 14:59:07 +0000 | [diff] [blame] | 4523 | const SelectionDAG &DAG, |
Nate Begeman | 368e18d | 2006-02-16 21:11:51 +0000 | [diff] [blame] | 4524 | unsigned Depth) const { |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 4525 | unsigned Opc = Op.getOpcode(); |
Evan Cheng | 865f060 | 2006-04-05 06:11:20 +0000 | [diff] [blame] | 4526 | assert((Opc >= ISD::BUILTIN_OP_END || |
| 4527 | Opc == ISD::INTRINSIC_WO_CHAIN || |
| 4528 | Opc == ISD::INTRINSIC_W_CHAIN || |
| 4529 | Opc == ISD::INTRINSIC_VOID) && |
| 4530 | "Should use MaskedValueIsZero if you don't know whether Op" |
| 4531 | " is a target node!"); |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 4532 | |
Evan Cheng | 865f060 | 2006-04-05 06:11:20 +0000 | [diff] [blame] | 4533 | KnownZero = KnownOne = 0; // Don't know anything. |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 4534 | switch (Opc) { |
Evan Cheng | 865f060 | 2006-04-05 06:11:20 +0000 | [diff] [blame] | 4535 | default: break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4536 | case X86ISD::SETCC: |
Nate Begeman | 368e18d | 2006-02-16 21:11:51 +0000 | [diff] [blame] | 4537 | KnownZero |= (MVT::getIntVTBitMask(Op.getValueType()) ^ 1ULL); |
| 4538 | break; |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 4539 | } |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 4540 | } |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 4541 | |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4542 | /// getShuffleScalarElt - Returns the scalar element that will make up the ith |
| 4543 | /// element of the result of the vector shuffle. |
| 4544 | static SDOperand getShuffleScalarElt(SDNode *N, unsigned i, SelectionDAG &DAG) { |
| 4545 | MVT::ValueType VT = N->getValueType(0); |
| 4546 | SDOperand PermMask = N->getOperand(2); |
| 4547 | unsigned NumElems = PermMask.getNumOperands(); |
| 4548 | SDOperand V = (i < NumElems) ? N->getOperand(0) : N->getOperand(1); |
| 4549 | i %= NumElems; |
| 4550 | if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) { |
| 4551 | return (i == 0) |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 4552 | ? V.getOperand(0) : DAG.getNode(ISD::UNDEF, MVT::getVectorElementType(VT)); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4553 | } else if (V.getOpcode() == ISD::VECTOR_SHUFFLE) { |
| 4554 | SDOperand Idx = PermMask.getOperand(i); |
| 4555 | if (Idx.getOpcode() == ISD::UNDEF) |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 4556 | return DAG.getNode(ISD::UNDEF, MVT::getVectorElementType(VT)); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4557 | return getShuffleScalarElt(V.Val,cast<ConstantSDNode>(Idx)->getValue(),DAG); |
| 4558 | } |
| 4559 | return SDOperand(); |
| 4560 | } |
| 4561 | |
| 4562 | /// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the |
| 4563 | /// node is a GlobalAddress + an offset. |
| 4564 | static bool isGAPlusOffset(SDNode *N, GlobalValue* &GA, int64_t &Offset) { |
Evan Cheng | 0085a28 | 2006-11-30 21:55:46 +0000 | [diff] [blame] | 4565 | unsigned Opc = N->getOpcode(); |
Evan Cheng | 19f2ffc | 2006-12-05 04:01:03 +0000 | [diff] [blame] | 4566 | if (Opc == X86ISD::Wrapper) { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4567 | if (dyn_cast<GlobalAddressSDNode>(N->getOperand(0))) { |
| 4568 | GA = cast<GlobalAddressSDNode>(N->getOperand(0))->getGlobal(); |
| 4569 | return true; |
| 4570 | } |
Evan Cheng | 0085a28 | 2006-11-30 21:55:46 +0000 | [diff] [blame] | 4571 | } else if (Opc == ISD::ADD) { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4572 | SDOperand N1 = N->getOperand(0); |
| 4573 | SDOperand N2 = N->getOperand(1); |
| 4574 | if (isGAPlusOffset(N1.Val, GA, Offset)) { |
| 4575 | ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2); |
| 4576 | if (V) { |
| 4577 | Offset += V->getSignExtended(); |
| 4578 | return true; |
| 4579 | } |
| 4580 | } else if (isGAPlusOffset(N2.Val, GA, Offset)) { |
| 4581 | ConstantSDNode *V = dyn_cast<ConstantSDNode>(N1); |
| 4582 | if (V) { |
| 4583 | Offset += V->getSignExtended(); |
| 4584 | return true; |
| 4585 | } |
| 4586 | } |
| 4587 | } |
| 4588 | return false; |
| 4589 | } |
| 4590 | |
| 4591 | /// isConsecutiveLoad - Returns true if N is loading from an address of Base |
| 4592 | /// + Dist * Size. |
| 4593 | static bool isConsecutiveLoad(SDNode *N, SDNode *Base, int Dist, int Size, |
| 4594 | MachineFrameInfo *MFI) { |
| 4595 | if (N->getOperand(0).Val != Base->getOperand(0).Val) |
| 4596 | return false; |
| 4597 | |
| 4598 | SDOperand Loc = N->getOperand(1); |
| 4599 | SDOperand BaseLoc = Base->getOperand(1); |
| 4600 | if (Loc.getOpcode() == ISD::FrameIndex) { |
| 4601 | if (BaseLoc.getOpcode() != ISD::FrameIndex) |
| 4602 | return false; |
| 4603 | int FI = dyn_cast<FrameIndexSDNode>(Loc)->getIndex(); |
| 4604 | int BFI = dyn_cast<FrameIndexSDNode>(BaseLoc)->getIndex(); |
| 4605 | int FS = MFI->getObjectSize(FI); |
| 4606 | int BFS = MFI->getObjectSize(BFI); |
| 4607 | if (FS != BFS || FS != Size) return false; |
| 4608 | return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Size); |
| 4609 | } else { |
| 4610 | GlobalValue *GV1 = NULL; |
| 4611 | GlobalValue *GV2 = NULL; |
| 4612 | int64_t Offset1 = 0; |
| 4613 | int64_t Offset2 = 0; |
| 4614 | bool isGA1 = isGAPlusOffset(Loc.Val, GV1, Offset1); |
| 4615 | bool isGA2 = isGAPlusOffset(BaseLoc.Val, GV2, Offset2); |
| 4616 | if (isGA1 && isGA2 && GV1 == GV2) |
| 4617 | return Offset1 == (Offset2 + Dist*Size); |
| 4618 | } |
| 4619 | |
| 4620 | return false; |
| 4621 | } |
| 4622 | |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 4623 | static bool isBaseAlignment16(SDNode *Base, MachineFrameInfo *MFI, |
| 4624 | const X86Subtarget *Subtarget) { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4625 | GlobalValue *GV; |
| 4626 | int64_t Offset; |
| 4627 | if (isGAPlusOffset(Base, GV, Offset)) |
| 4628 | return (GV->getAlignment() >= 16 && (Offset % 16) == 0); |
| 4629 | else { |
| 4630 | assert(Base->getOpcode() == ISD::FrameIndex && "Unexpected base node!"); |
| 4631 | int BFI = dyn_cast<FrameIndexSDNode>(Base)->getIndex(); |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 4632 | if (BFI < 0) |
| 4633 | // Fixed objects do not specify alignment, however the offsets are known. |
| 4634 | return ((Subtarget->getStackAlignment() % 16) == 0 && |
| 4635 | (MFI->getObjectOffset(BFI) % 16) == 0); |
| 4636 | else |
| 4637 | return MFI->getObjectAlignment(BFI) >= 16; |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4638 | } |
| 4639 | return false; |
| 4640 | } |
| 4641 | |
| 4642 | |
| 4643 | /// PerformShuffleCombine - Combine a vector_shuffle that is equal to |
| 4644 | /// build_vector load1, load2, load3, load4, <0, 1, 2, 3> into a 128-bit load |
| 4645 | /// if the load addresses are consecutive, non-overlapping, and in the right |
| 4646 | /// order. |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 4647 | static SDOperand PerformShuffleCombine(SDNode *N, SelectionDAG &DAG, |
| 4648 | const X86Subtarget *Subtarget) { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4649 | MachineFunction &MF = DAG.getMachineFunction(); |
| 4650 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 4651 | MVT::ValueType VT = N->getValueType(0); |
Dan Gohman | 51eaa86 | 2007-06-14 22:58:02 +0000 | [diff] [blame] | 4652 | MVT::ValueType EVT = MVT::getVectorElementType(VT); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4653 | SDOperand PermMask = N->getOperand(2); |
| 4654 | int NumElems = (int)PermMask.getNumOperands(); |
| 4655 | SDNode *Base = NULL; |
| 4656 | for (int i = 0; i < NumElems; ++i) { |
| 4657 | SDOperand Idx = PermMask.getOperand(i); |
| 4658 | if (Idx.getOpcode() == ISD::UNDEF) { |
| 4659 | if (!Base) return SDOperand(); |
| 4660 | } else { |
| 4661 | SDOperand Arg = |
| 4662 | getShuffleScalarElt(N, cast<ConstantSDNode>(Idx)->getValue(), DAG); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 4663 | if (!Arg.Val || !ISD::isNON_EXTLoad(Arg.Val)) |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4664 | return SDOperand(); |
| 4665 | if (!Base) |
| 4666 | Base = Arg.Val; |
| 4667 | else if (!isConsecutiveLoad(Arg.Val, Base, |
| 4668 | i, MVT::getSizeInBits(EVT)/8,MFI)) |
| 4669 | return SDOperand(); |
| 4670 | } |
| 4671 | } |
| 4672 | |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 4673 | bool isAlign16 = isBaseAlignment16(Base->getOperand(1).Val, MFI, Subtarget); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 4674 | if (isAlign16) { |
| 4675 | LoadSDNode *LD = cast<LoadSDNode>(Base); |
| 4676 | return DAG.getLoad(VT, LD->getChain(), LD->getBasePtr(), LD->getSrcValue(), |
| 4677 | LD->getSrcValueOffset()); |
| 4678 | } else { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4679 | // Just use movups, it's shorter. |
Chris Lattner | d96d072 | 2007-02-25 06:40:16 +0000 | [diff] [blame] | 4680 | SDVTList Tys = DAG.getVTList(MVT::v4f32, MVT::Other); |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 4681 | SmallVector<SDOperand, 3> Ops; |
| 4682 | Ops.push_back(Base->getOperand(0)); |
| 4683 | Ops.push_back(Base->getOperand(1)); |
| 4684 | Ops.push_back(Base->getOperand(2)); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4685 | return DAG.getNode(ISD::BIT_CONVERT, VT, |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 4686 | DAG.getNode(X86ISD::LOAD_UA, Tys, &Ops[0], Ops.size())); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4687 | } |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4688 | } |
| 4689 | |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 4690 | /// PerformSELECTCombine - Do target-specific dag combines on SELECT nodes. |
| 4691 | static SDOperand PerformSELECTCombine(SDNode *N, SelectionDAG &DAG, |
| 4692 | const X86Subtarget *Subtarget) { |
| 4693 | SDOperand Cond = N->getOperand(0); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4694 | |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 4695 | // If we have SSE[12] support, try to form min/max nodes. |
| 4696 | if (Subtarget->hasSSE2() && |
| 4697 | (N->getValueType(0) == MVT::f32 || N->getValueType(0) == MVT::f64)) { |
| 4698 | if (Cond.getOpcode() == ISD::SETCC) { |
| 4699 | // Get the LHS/RHS of the select. |
| 4700 | SDOperand LHS = N->getOperand(1); |
| 4701 | SDOperand RHS = N->getOperand(2); |
| 4702 | ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4703 | |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 4704 | unsigned Opcode = 0; |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 4705 | if (LHS == Cond.getOperand(0) && RHS == Cond.getOperand(1)) { |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 4706 | switch (CC) { |
| 4707 | default: break; |
| 4708 | case ISD::SETOLE: // (X <= Y) ? X : Y -> min |
| 4709 | case ISD::SETULE: |
| 4710 | case ISD::SETLE: |
| 4711 | if (!UnsafeFPMath) break; |
| 4712 | // FALL THROUGH. |
| 4713 | case ISD::SETOLT: // (X olt/lt Y) ? X : Y -> min |
| 4714 | case ISD::SETLT: |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 4715 | Opcode = X86ISD::FMIN; |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 4716 | break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4717 | |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 4718 | case ISD::SETOGT: // (X > Y) ? X : Y -> max |
| 4719 | case ISD::SETUGT: |
| 4720 | case ISD::SETGT: |
| 4721 | if (!UnsafeFPMath) break; |
| 4722 | // FALL THROUGH. |
| 4723 | case ISD::SETUGE: // (X uge/ge Y) ? X : Y -> max |
| 4724 | case ISD::SETGE: |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 4725 | Opcode = X86ISD::FMAX; |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 4726 | break; |
| 4727 | } |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 4728 | } else if (LHS == Cond.getOperand(1) && RHS == Cond.getOperand(0)) { |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 4729 | switch (CC) { |
| 4730 | default: break; |
| 4731 | case ISD::SETOGT: // (X > Y) ? Y : X -> min |
| 4732 | case ISD::SETUGT: |
| 4733 | case ISD::SETGT: |
| 4734 | if (!UnsafeFPMath) break; |
| 4735 | // FALL THROUGH. |
| 4736 | case ISD::SETUGE: // (X uge/ge Y) ? Y : X -> min |
| 4737 | case ISD::SETGE: |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 4738 | Opcode = X86ISD::FMIN; |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 4739 | break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4740 | |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 4741 | case ISD::SETOLE: // (X <= Y) ? Y : X -> max |
| 4742 | case ISD::SETULE: |
| 4743 | case ISD::SETLE: |
| 4744 | if (!UnsafeFPMath) break; |
| 4745 | // FALL THROUGH. |
| 4746 | case ISD::SETOLT: // (X olt/lt Y) ? Y : X -> max |
| 4747 | case ISD::SETLT: |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 4748 | Opcode = X86ISD::FMAX; |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 4749 | break; |
| 4750 | } |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 4751 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4752 | |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 4753 | if (Opcode) |
| 4754 | return DAG.getNode(Opcode, N->getValueType(0), LHS, RHS); |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 4755 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4756 | |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 4757 | } |
| 4758 | |
| 4759 | return SDOperand(); |
| 4760 | } |
| 4761 | |
| 4762 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4763 | SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N, |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4764 | DAGCombinerInfo &DCI) const { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4765 | SelectionDAG &DAG = DCI.DAG; |
| 4766 | switch (N->getOpcode()) { |
| 4767 | default: break; |
| 4768 | case ISD::VECTOR_SHUFFLE: |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 4769 | return PerformShuffleCombine(N, DAG, Subtarget); |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 4770 | case ISD::SELECT: |
| 4771 | return PerformSELECTCombine(N, DAG, Subtarget); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4772 | } |
| 4773 | |
| 4774 | return SDOperand(); |
| 4775 | } |
| 4776 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4777 | //===----------------------------------------------------------------------===// |
| 4778 | // X86 Inline Assembly Support |
| 4779 | //===----------------------------------------------------------------------===// |
| 4780 | |
Chris Lattner | f4dff84 | 2006-07-11 02:54:03 +0000 | [diff] [blame] | 4781 | /// getConstraintType - Given a constraint letter, return the type of |
| 4782 | /// constraint it is for this target. |
| 4783 | X86TargetLowering::ConstraintType |
Chris Lattner | 4234f57 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 4784 | X86TargetLowering::getConstraintType(const std::string &Constraint) const { |
| 4785 | if (Constraint.size() == 1) { |
| 4786 | switch (Constraint[0]) { |
| 4787 | case 'A': |
| 4788 | case 'r': |
| 4789 | case 'R': |
| 4790 | case 'l': |
| 4791 | case 'q': |
| 4792 | case 'Q': |
| 4793 | case 'x': |
| 4794 | case 'Y': |
| 4795 | return C_RegisterClass; |
| 4796 | default: |
| 4797 | break; |
| 4798 | } |
Chris Lattner | f4dff84 | 2006-07-11 02:54:03 +0000 | [diff] [blame] | 4799 | } |
Chris Lattner | 4234f57 | 2007-03-25 02:14:49 +0000 | [diff] [blame] | 4800 | return TargetLowering::getConstraintType(Constraint); |
Chris Lattner | f4dff84 | 2006-07-11 02:54:03 +0000 | [diff] [blame] | 4801 | } |
| 4802 | |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 4803 | /// isOperandValidForConstraint - Return the specified operand (possibly |
| 4804 | /// modified) if the specified SDOperand is valid for the specified target |
| 4805 | /// constraint letter, otherwise return null. |
| 4806 | SDOperand X86TargetLowering:: |
| 4807 | isOperandValidForConstraint(SDOperand Op, char Constraint, SelectionDAG &DAG) { |
| 4808 | switch (Constraint) { |
| 4809 | default: break; |
Devang Patel | 84f7fd2 | 2007-03-17 00:13:28 +0000 | [diff] [blame] | 4810 | case 'I': |
Chris Lattner | 188b9fe | 2007-03-25 01:57:35 +0000 | [diff] [blame] | 4811 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 4812 | if (C->getValue() <= 31) |
Chris Lattner | 709fd41 | 2007-05-15 01:28:08 +0000 | [diff] [blame] | 4813 | return DAG.getTargetConstant(C->getValue(), Op.getValueType()); |
Devang Patel | 84f7fd2 | 2007-03-17 00:13:28 +0000 | [diff] [blame] | 4814 | } |
Chris Lattner | 188b9fe | 2007-03-25 01:57:35 +0000 | [diff] [blame] | 4815 | return SDOperand(0,0); |
| 4816 | case 'N': |
| 4817 | if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { |
| 4818 | if (C->getValue() <= 255) |
Chris Lattner | 709fd41 | 2007-05-15 01:28:08 +0000 | [diff] [blame] | 4819 | return DAG.getTargetConstant(C->getValue(), Op.getValueType()); |
Chris Lattner | 188b9fe | 2007-03-25 01:57:35 +0000 | [diff] [blame] | 4820 | } |
| 4821 | return SDOperand(0,0); |
Chris Lattner | dc43a88 | 2007-05-03 16:52:29 +0000 | [diff] [blame] | 4822 | case 'i': { |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 4823 | // Literal immediates are always ok. |
Chris Lattner | 709fd41 | 2007-05-15 01:28:08 +0000 | [diff] [blame] | 4824 | if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(Op)) |
| 4825 | return DAG.getTargetConstant(CST->getValue(), Op.getValueType()); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4826 | |
Chris Lattner | dc43a88 | 2007-05-03 16:52:29 +0000 | [diff] [blame] | 4827 | // If we are in non-pic codegen mode, we allow the address of a global (with |
| 4828 | // an optional displacement) to be used with 'i'. |
| 4829 | GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op); |
| 4830 | int64_t Offset = 0; |
| 4831 | |
| 4832 | // Match either (GA) or (GA+C) |
| 4833 | if (GA) { |
| 4834 | Offset = GA->getOffset(); |
| 4835 | } else if (Op.getOpcode() == ISD::ADD) { |
| 4836 | ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)); |
| 4837 | GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(0)); |
| 4838 | if (C && GA) { |
| 4839 | Offset = GA->getOffset()+C->getValue(); |
| 4840 | } else { |
| 4841 | C = dyn_cast<ConstantSDNode>(Op.getOperand(1)); |
| 4842 | GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(0)); |
| 4843 | if (C && GA) |
| 4844 | Offset = GA->getOffset()+C->getValue(); |
| 4845 | else |
| 4846 | C = 0, GA = 0; |
| 4847 | } |
| 4848 | } |
| 4849 | |
| 4850 | if (GA) { |
| 4851 | // If addressing this global requires a load (e.g. in PIC mode), we can't |
| 4852 | // match. |
| 4853 | if (Subtarget->GVRequiresExtraLoad(GA->getGlobal(), getTargetMachine(), |
| 4854 | false)) |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 4855 | return SDOperand(0, 0); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4856 | |
Chris Lattner | dc43a88 | 2007-05-03 16:52:29 +0000 | [diff] [blame] | 4857 | Op = DAG.getTargetGlobalAddress(GA->getGlobal(), GA->getValueType(0), |
| 4858 | Offset); |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 4859 | return Op; |
| 4860 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4861 | |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 4862 | // Otherwise, not valid for this mode. |
| 4863 | return SDOperand(0, 0); |
| 4864 | } |
Chris Lattner | dc43a88 | 2007-05-03 16:52:29 +0000 | [diff] [blame] | 4865 | } |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 4866 | return TargetLowering::isOperandValidForConstraint(Op, Constraint, DAG); |
| 4867 | } |
| 4868 | |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 4869 | std::vector<unsigned> X86TargetLowering:: |
Chris Lattner | 1efa40f | 2006-02-22 00:56:39 +0000 | [diff] [blame] | 4870 | getRegClassForInlineAsmConstraint(const std::string &Constraint, |
| 4871 | MVT::ValueType VT) const { |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 4872 | if (Constraint.size() == 1) { |
| 4873 | // FIXME: not handling fp-stack yet! |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 4874 | switch (Constraint[0]) { // GCC X86 Constraint Letters |
Chris Lattner | f4dff84 | 2006-07-11 02:54:03 +0000 | [diff] [blame] | 4875 | default: break; // Unknown constraint letter |
| 4876 | case 'A': // EAX/EDX |
| 4877 | if (VT == MVT::i32 || VT == MVT::i64) |
| 4878 | return make_vector<unsigned>(X86::EAX, X86::EDX, 0); |
| 4879 | break; |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 4880 | case 'q': // Q_REGS (GENERAL_REGS in 64-bit mode) |
| 4881 | case 'Q': // Q_REGS |
Chris Lattner | 80a7ecc | 2006-05-06 00:29:37 +0000 | [diff] [blame] | 4882 | if (VT == MVT::i32) |
| 4883 | return make_vector<unsigned>(X86::EAX, X86::EDX, X86::ECX, X86::EBX, 0); |
| 4884 | else if (VT == MVT::i16) |
| 4885 | return make_vector<unsigned>(X86::AX, X86::DX, X86::CX, X86::BX, 0); |
| 4886 | else if (VT == MVT::i8) |
| 4887 | return make_vector<unsigned>(X86::AL, X86::DL, X86::CL, X86::DL, 0); |
| 4888 | break; |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 4889 | } |
| 4890 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4891 | |
Chris Lattner | 1efa40f | 2006-02-22 00:56:39 +0000 | [diff] [blame] | 4892 | return std::vector<unsigned>(); |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 4893 | } |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 4894 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4895 | std::pair<unsigned, const TargetRegisterClass*> |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 4896 | X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, |
| 4897 | MVT::ValueType VT) const { |
Chris Lattner | ad043e8 | 2007-04-09 05:11:28 +0000 | [diff] [blame] | 4898 | // First, see if this is a constraint that directly corresponds to an LLVM |
| 4899 | // register class. |
| 4900 | if (Constraint.size() == 1) { |
| 4901 | // GCC Constraint Letters |
| 4902 | switch (Constraint[0]) { |
| 4903 | default: break; |
Chris Lattner | 0f65cad | 2007-04-09 05:49:22 +0000 | [diff] [blame] | 4904 | case 'r': // GENERAL_REGS |
| 4905 | case 'R': // LEGACY_REGS |
| 4906 | case 'l': // INDEX_REGS |
| 4907 | if (VT == MVT::i64 && Subtarget->is64Bit()) |
| 4908 | return std::make_pair(0U, X86::GR64RegisterClass); |
| 4909 | if (VT == MVT::i32) |
| 4910 | return std::make_pair(0U, X86::GR32RegisterClass); |
| 4911 | else if (VT == MVT::i16) |
| 4912 | return std::make_pair(0U, X86::GR16RegisterClass); |
| 4913 | else if (VT == MVT::i8) |
| 4914 | return std::make_pair(0U, X86::GR8RegisterClass); |
| 4915 | break; |
Chris Lattner | 6c284d7 | 2007-04-12 04:14:49 +0000 | [diff] [blame] | 4916 | case 'y': // MMX_REGS if MMX allowed. |
| 4917 | if (!Subtarget->hasMMX()) break; |
| 4918 | return std::make_pair(0U, X86::VR64RegisterClass); |
| 4919 | break; |
Chris Lattner | 0f65cad | 2007-04-09 05:49:22 +0000 | [diff] [blame] | 4920 | case 'Y': // SSE_REGS if SSE2 allowed |
| 4921 | if (!Subtarget->hasSSE2()) break; |
| 4922 | // FALL THROUGH. |
| 4923 | case 'x': // SSE_REGS if SSE1 allowed |
| 4924 | if (!Subtarget->hasSSE1()) break; |
| 4925 | |
| 4926 | switch (VT) { |
| 4927 | default: break; |
| 4928 | // Scalar SSE types. |
| 4929 | case MVT::f32: |
| 4930 | case MVT::i32: |
Chris Lattner | ad043e8 | 2007-04-09 05:11:28 +0000 | [diff] [blame] | 4931 | return std::make_pair(0U, X86::FR32RegisterClass); |
Chris Lattner | 0f65cad | 2007-04-09 05:49:22 +0000 | [diff] [blame] | 4932 | case MVT::f64: |
| 4933 | case MVT::i64: |
Chris Lattner | ad043e8 | 2007-04-09 05:11:28 +0000 | [diff] [blame] | 4934 | return std::make_pair(0U, X86::FR64RegisterClass); |
Chris Lattner | 0f65cad | 2007-04-09 05:49:22 +0000 | [diff] [blame] | 4935 | // Vector types. |
Chris Lattner | 0f65cad | 2007-04-09 05:49:22 +0000 | [diff] [blame] | 4936 | case MVT::v16i8: |
| 4937 | case MVT::v8i16: |
| 4938 | case MVT::v4i32: |
| 4939 | case MVT::v2i64: |
| 4940 | case MVT::v4f32: |
| 4941 | case MVT::v2f64: |
| 4942 | return std::make_pair(0U, X86::VR128RegisterClass); |
| 4943 | } |
Chris Lattner | ad043e8 | 2007-04-09 05:11:28 +0000 | [diff] [blame] | 4944 | break; |
| 4945 | } |
| 4946 | } |
| 4947 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 4948 | // Use the default implementation in TargetLowering to convert the register |
| 4949 | // constraint into a member of a register class. |
| 4950 | std::pair<unsigned, const TargetRegisterClass*> Res; |
| 4951 | Res = TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); |
Chris Lattner | 1a60aa7 | 2006-10-31 19:42:44 +0000 | [diff] [blame] | 4952 | |
| 4953 | // Not found as a standard register? |
| 4954 | if (Res.second == 0) { |
| 4955 | // GCC calls "st(0)" just plain "st". |
| 4956 | if (StringsEqualNoCase("{st}", Constraint)) { |
| 4957 | Res.first = X86::ST0; |
| 4958 | Res.second = X86::RSTRegisterClass; |
| 4959 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4960 | |
Chris Lattner | 1a60aa7 | 2006-10-31 19:42:44 +0000 | [diff] [blame] | 4961 | return Res; |
| 4962 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4963 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 4964 | // Otherwise, check to see if this is a register class of the wrong value |
| 4965 | // type. For example, we want to map "{ax},i32" -> {eax}, we don't want it to |
| 4966 | // turn into {ax},{dx}. |
| 4967 | if (Res.second->hasType(VT)) |
| 4968 | return Res; // Correct type already, nothing to do. |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4969 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 4970 | // All of the single-register GCC register classes map their values onto |
| 4971 | // 16-bit register pieces "ax","dx","cx","bx","si","di","bp","sp". If we |
| 4972 | // really want an 8-bit or 32-bit register, map to the appropriate register |
| 4973 | // class and return the appropriate register. |
| 4974 | if (Res.second != X86::GR16RegisterClass) |
| 4975 | return Res; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4976 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 4977 | if (VT == MVT::i8) { |
| 4978 | unsigned DestReg = 0; |
| 4979 | switch (Res.first) { |
| 4980 | default: break; |
| 4981 | case X86::AX: DestReg = X86::AL; break; |
| 4982 | case X86::DX: DestReg = X86::DL; break; |
| 4983 | case X86::CX: DestReg = X86::CL; break; |
| 4984 | case X86::BX: DestReg = X86::BL; break; |
| 4985 | } |
| 4986 | if (DestReg) { |
| 4987 | Res.first = DestReg; |
| 4988 | Res.second = Res.second = X86::GR8RegisterClass; |
| 4989 | } |
| 4990 | } else if (VT == MVT::i32) { |
| 4991 | unsigned DestReg = 0; |
| 4992 | switch (Res.first) { |
| 4993 | default: break; |
| 4994 | case X86::AX: DestReg = X86::EAX; break; |
| 4995 | case X86::DX: DestReg = X86::EDX; break; |
| 4996 | case X86::CX: DestReg = X86::ECX; break; |
| 4997 | case X86::BX: DestReg = X86::EBX; break; |
| 4998 | case X86::SI: DestReg = X86::ESI; break; |
| 4999 | case X86::DI: DestReg = X86::EDI; break; |
| 5000 | case X86::BP: DestReg = X86::EBP; break; |
| 5001 | case X86::SP: DestReg = X86::ESP; break; |
| 5002 | } |
| 5003 | if (DestReg) { |
| 5004 | Res.first = DestReg; |
| 5005 | Res.second = Res.second = X86::GR32RegisterClass; |
| 5006 | } |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 5007 | } else if (VT == MVT::i64) { |
| 5008 | unsigned DestReg = 0; |
| 5009 | switch (Res.first) { |
| 5010 | default: break; |
| 5011 | case X86::AX: DestReg = X86::RAX; break; |
| 5012 | case X86::DX: DestReg = X86::RDX; break; |
| 5013 | case X86::CX: DestReg = X86::RCX; break; |
| 5014 | case X86::BX: DestReg = X86::RBX; break; |
| 5015 | case X86::SI: DestReg = X86::RSI; break; |
| 5016 | case X86::DI: DestReg = X86::RDI; break; |
| 5017 | case X86::BP: DestReg = X86::RBP; break; |
| 5018 | case X86::SP: DestReg = X86::RSP; break; |
| 5019 | } |
| 5020 | if (DestReg) { |
| 5021 | Res.first = DestReg; |
| 5022 | Res.second = Res.second = X86::GR64RegisterClass; |
| 5023 | } |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5024 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5025 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5026 | return Res; |
| 5027 | } |