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Chris Lattnerfadc83c2009-06-19 00:47:59 +00001//===-- X86ATTInstPrinter.cpp - AT&T assembly instruction printing --------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file includes code for rendering MCInst instances as AT&T-style
11// assembly.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "asm-printer"
Chris Lattnercae05cb2009-09-13 19:30:11 +000016#include "X86ATTInstPrinter.h"
Chris Lattner6aa928d2010-08-28 20:42:31 +000017#include "X86InstComments.h"
Chris Lattnerfadc83c2009-06-19 00:47:59 +000018#include "llvm/MC/MCInst.h"
Chris Lattneraf76e592009-08-22 20:48:53 +000019#include "llvm/MC/MCAsmInfo.h"
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +000020#include "llvm/MC/MCExpr.h"
Torok Edwinab7c09b2009-07-08 18:01:40 +000021#include "llvm/Support/ErrorHandling.h"
Chris Lattner5d672cf2010-02-10 00:10:18 +000022#include "llvm/Support/Format.h"
David Greene71847812009-07-14 20:18:05 +000023#include "llvm/Support/FormattedStream.h"
Shantonu Sen558b79a2009-09-18 20:35:59 +000024#include "X86GenInstrNames.inc"
Chris Lattnerfadc83c2009-06-19 00:47:59 +000025using namespace llvm;
26
Chris Lattnerd5fb7902009-06-19 23:59:57 +000027// Include the auto-generated portion of the assembly writer.
Chris Lattner0d7b0aa2010-02-11 22:57:32 +000028#define GET_INSTRUCTION_NAME
Chris Lattnerd5fb7902009-06-19 23:59:57 +000029#include "X86GenAsmWriter.inc"
Chris Lattnerd5fb7902009-06-19 23:59:57 +000030
Chris Lattnerd3740872010-04-04 05:04:31 +000031void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) {
32 printInstruction(MI, OS);
Chris Lattner6aa928d2010-08-28 20:42:31 +000033
34 // If verbose assembly is enabled, we can print some informative comments.
35 if (CommentStream)
36 EmitAnyX86InstComments(MI, *CommentStream, getRegisterName);
Chris Lattner35c33bd2010-04-04 04:47:45 +000037}
Chris Lattner0d7b0aa2010-02-11 22:57:32 +000038StringRef X86ATTInstPrinter::getOpcodeName(unsigned Opcode) const {
39 return getInstructionName(Opcode);
40}
41
Chris Lattnerc493fb22009-09-14 01:49:26 +000042
Chris Lattner35c33bd2010-04-04 04:47:45 +000043void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
44 raw_ostream &O) {
Chris Lattnerc1243062009-06-20 07:03:18 +000045 switch (MI->getOperand(Op).getImm()) {
Chris Lattner35c33bd2010-04-04 04:47:45 +000046 default: assert(0 && "Invalid ssecc argument!");
Chris Lattnerf38c03af2009-06-20 00:49:26 +000047 case 0: O << "eq"; break;
48 case 1: O << "lt"; break;
49 case 2: O << "le"; break;
50 case 3: O << "unord"; break;
51 case 4: O << "neq"; break;
52 case 5: O << "nlt"; break;
53 case 6: O << "nle"; break;
54 case 7: O << "ord"; break;
Chris Lattnerd5fb7902009-06-19 23:59:57 +000055 }
56}
57
Chris Lattner7680e732009-06-20 19:34:09 +000058/// print_pcrel_imm - This is used to print an immediate value that ends up
Chris Lattnerffc05742009-12-22 00:44:05 +000059/// being encoded as a pc-relative value (e.g. for jumps and calls). These
60/// print slightly differently than normal immediates. For example, a $ is not
61/// emitted.
Chris Lattner35c33bd2010-04-04 04:47:45 +000062void X86ATTInstPrinter::print_pcrel_imm(const MCInst *MI, unsigned OpNo,
63 raw_ostream &O) {
Chris Lattner7680e732009-06-20 19:34:09 +000064 const MCOperand &Op = MI->getOperand(OpNo);
Chris Lattner7680e732009-06-20 19:34:09 +000065 if (Op.isImm())
Chris Lattnerffc05742009-12-22 00:44:05 +000066 // Print this as a signed 32-bit value.
67 O << (int)Op.getImm();
Chris Lattnerf92c95f2009-09-14 01:34:40 +000068 else {
69 assert(Op.isExpr() && "unknown pcrel immediate operand");
Chris Lattner8cb9a3b2010-01-18 00:37:40 +000070 O << *Op.getExpr();
Chris Lattnerf92c95f2009-09-14 01:34:40 +000071 }
Chris Lattner7680e732009-06-20 19:34:09 +000072}
73
Chris Lattner35c33bd2010-04-04 04:47:45 +000074void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
75 raw_ostream &O) {
Chris Lattnerf38c03af2009-06-20 00:49:26 +000076 const MCOperand &Op = MI->getOperand(OpNo);
77 if (Op.isReg()) {
Chris Lattnerc510f4c2009-09-13 20:15:16 +000078 O << '%' << getRegisterName(Op.getReg());
Chris Lattnerf38c03af2009-06-20 00:49:26 +000079 } else if (Op.isImm()) {
Chris Lattner3de47b82009-09-09 00:40:31 +000080 O << '$' << Op.getImm();
Chris Lattner5d672cf2010-02-10 00:10:18 +000081
82 if (CommentStream && (Op.getImm() > 255 || Op.getImm() < -256))
Dan Gohman36b01cb2010-02-17 00:37:20 +000083 *CommentStream << format("imm = 0x%llX\n", (long long)Op.getImm());
Chris Lattner5d672cf2010-02-10 00:10:18 +000084
Chris Lattnerf92c95f2009-09-14 01:34:40 +000085 } else {
86 assert(Op.isExpr() && "unknown operand kind in printOperand");
Chris Lattner8cb9a3b2010-01-18 00:37:40 +000087 O << '$' << *Op.getExpr();
Chris Lattnerf38c03af2009-06-20 00:49:26 +000088 }
Chris Lattnerd5fb7902009-06-19 23:59:57 +000089}
90
Chris Lattner599b5312010-07-08 23:46:44 +000091void X86ATTInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
92 raw_ostream &O) {
Chris Lattnerf38c03af2009-06-20 00:49:26 +000093 const MCOperand &BaseReg = MI->getOperand(Op);
94 const MCOperand &IndexReg = MI->getOperand(Op+2);
95 const MCOperand &DispSpec = MI->getOperand(Op+3);
Chris Lattner599b5312010-07-08 23:46:44 +000096 const MCOperand &SegReg = MI->getOperand(Op+4);
97
98 // If this has a segment register, print it.
99 if (SegReg.getReg()) {
100 printOperand(MI, Op+4, O);
101 O << ':';
102 }
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000103
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000104 if (DispSpec.isImm()) {
105 int64_t DispVal = DispSpec.getImm();
106 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
107 O << DispVal;
108 } else {
Chris Lattner3de47b82009-09-09 00:40:31 +0000109 assert(DispSpec.isExpr() && "non-immediate displacement for LEA?");
Chris Lattner8cb9a3b2010-01-18 00:37:40 +0000110 O << *DispSpec.getExpr();
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000111 }
112
113 if (IndexReg.getReg() || BaseReg.getReg()) {
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000114 O << '(';
115 if (BaseReg.getReg())
Chris Lattner35c33bd2010-04-04 04:47:45 +0000116 printOperand(MI, Op, O);
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000117
118 if (IndexReg.getReg()) {
119 O << ',';
Chris Lattner35c33bd2010-04-04 04:47:45 +0000120 printOperand(MI, Op+2, O);
Chris Lattner7f8217f2009-06-20 08:13:12 +0000121 unsigned ScaleVal = MI->getOperand(Op+1).getImm();
122 if (ScaleVal != 1)
Chris Lattnerf38c03af2009-06-20 00:49:26 +0000123 O << ',' << ScaleVal;
124 }
125 O << ')';
126 }
Chris Lattnerd5fb7902009-06-19 23:59:57 +0000127}