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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00002//
John Criswellb576c942003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00007//
John Criswellb576c942003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattnerb74e83c2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner4cc662b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattner82bee0f2002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000025#include "Support/Debug.h"
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000026#include "Support/DenseMap.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000027#include "Support/Statistic.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000028#include <iostream>
Chris Lattneref09c632004-01-31 21:27:19 +000029using namespace llvm;
Brian Gaeked0fde302003-11-11 22:41:34 +000030
Chris Lattnerb74e83c2002-12-16 16:15:28 +000031namespace {
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +000032 Statistic<> NumStores("ra-local", "Number of stores added");
33 Statistic<> NumLoads ("ra-local", "Number of loads added");
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +000034 Statistic<> NumFolded("ra-local", "Number of loads/stores folded into "
35 "instructions");
Chris Lattner580f9be2002-12-28 20:40:43 +000036 class RA : public MachineFunctionPass {
37 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000038 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000039 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000040 LiveVariables *LV;
Chris Lattnerff863ba2002-12-25 05:05:46 +000041
Chris Lattnerb8822ad2003-08-04 23:36:39 +000042 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
43 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000044 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000045
46 // Virt2PhysRegMap - This map contains entries for each virtual register
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000047 // that is currently available in a physical register.
48 DenseMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap;
Chris Lattnerecea5632004-02-09 02:12:04 +000049
50 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +000051 return Virt2PhysRegMap[VirtReg];
Chris Lattnerecea5632004-02-09 02:12:04 +000052 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000053
Chris Lattner64667b62004-02-09 01:26:13 +000054 // PhysRegsUsed - This array is effectively a map, containing entries for
55 // each physical register that currently has a value (ie, it is in
56 // Virt2PhysRegMap). The value mapped to is the virtual register
57 // corresponding to the physical register (the inverse of the
58 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
59 // because it is used by a future instruction. If the entry for a physical
60 // register is -1, then the physical register is "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000061 //
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000062 std::vector<int> PhysRegsUsed;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000063
64 // PhysRegsUseOrder - This contains a list of the physical registers that
65 // currently have a virtual register value in them. This list provides an
66 // ordering of registers, imposing a reallocation order. This list is only
67 // used if all registers are allocated and we have to spill one, in which
68 // case we spill the least recently used register. Entries at the front of
69 // the list are the least recently used registers, entries at the back are
70 // the most recently used.
71 //
72 std::vector<unsigned> PhysRegsUseOrder;
73
Chris Lattner91a452b2003-01-13 00:25:40 +000074 // VirtRegModified - This bitset contains information about which virtual
75 // registers need to be spilled back to memory when their registers are
76 // scavenged. If a virtual register has simply been rematerialized, there
77 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000078 //
Chris Lattner91a452b2003-01-13 00:25:40 +000079 std::vector<bool> VirtRegModified;
80
81 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattneref09c632004-01-31 21:27:19 +000082 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000083 Reg -= MRegisterInfo::FirstVirtualRegister;
84 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
85 VirtRegModified[Reg] = Val;
86 }
87
88 bool isVirtRegModified(unsigned Reg) const {
Chris Lattneref09c632004-01-31 21:27:19 +000089 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000090 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000091 && "Illegal virtual register!");
Chris Lattner91a452b2003-01-13 00:25:40 +000092 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
93 }
Chris Lattner82bee0f2002-12-18 08:14:26 +000094
Chris Lattnerb74e83c2002-12-16 16:15:28 +000095 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattner82bee0f2002-12-18 08:14:26 +000096 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner0eb172c2002-12-24 00:04:55 +000097 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
98
99 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000100 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
101 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
102 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
103 // Add it to the end of the list
104 PhysRegsUseOrder.push_back(RegMatch);
105 if (RegMatch == Reg)
106 return; // Found an exact match, exit early
107 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000108 }
109
110 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000111 virtual const char *getPassName() const {
112 return "Local Register Allocator";
113 }
114
Chris Lattner91a452b2003-01-13 00:25:40 +0000115 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
Chris Lattner56ddada2004-02-17 17:49:10 +0000116 AU.addRequired<LiveVariables>();
Chris Lattner91a452b2003-01-13 00:25:40 +0000117 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos4c080862003-12-18 22:40:24 +0000118 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattner91a452b2003-01-13 00:25:40 +0000119 MachineFunctionPass::getAnalysisUsage(AU);
120 }
121
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000122 private:
123 /// runOnMachineFunction - Register allocate the whole function
124 bool runOnMachineFunction(MachineFunction &Fn);
125
126 /// AllocateBasicBlock - Register allocate the specified basic block.
127 void AllocateBasicBlock(MachineBasicBlock &MBB);
128
Chris Lattner82bee0f2002-12-18 08:14:26 +0000129
Chris Lattner82bee0f2002-12-18 08:14:26 +0000130 /// areRegsEqual - This method returns true if the specified registers are
131 /// related to each other. To do this, it checks to see if they are equal
132 /// or if the first register is in the alias set of the second register.
133 ///
134 bool areRegsEqual(unsigned R1, unsigned R2) const {
135 if (R1 == R2) return true;
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000136 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
137 *AliasSet; ++AliasSet) {
138 if (*AliasSet == R1) return true;
139 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000140 return false;
141 }
142
Chris Lattner580f9be2002-12-28 20:40:43 +0000143 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000144 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000145 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000146
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000147 /// removePhysReg - This method marks the specified physical register as no
148 /// longer being in use.
149 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000150 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000151
152 /// spillVirtReg - This method spills the value specified by PhysReg into
153 /// the virtual register slot specified by VirtReg. It then updates the RA
154 /// data structures to indicate the fact that PhysReg is now available.
155 ///
Chris Lattner688c8252004-02-22 19:08:15 +0000156 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000157 unsigned VirtReg, unsigned PhysReg);
158
Chris Lattnerc21be922002-12-16 17:44:42 +0000159 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner128c2aa2003-08-17 18:01:15 +0000160 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
161 /// true, then the request is ignored if the physical register does not
162 /// contain a virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000163 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000164 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000165 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattnerc21be922002-12-16 17:44:42 +0000166
Chris Lattner91a452b2003-01-13 00:25:40 +0000167 /// assignVirtToPhysReg - This method updates local state so that we know
168 /// that PhysReg is the proper container for VirtReg now. The physical
169 /// register must not be used for anything else when this is called.
170 ///
171 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
172
173 /// liberatePhysReg - Make sure the specified physical register is available
174 /// for use. If there is currently a value in it, it is either moved out of
175 /// the way or spilled to memory.
176 ///
177 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000178 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000179
Chris Lattnerae640432002-12-17 02:50:10 +0000180 /// isPhysRegAvailable - Return true if the specified physical register is
181 /// free and available for use. This also includes checking to see if
182 /// aliased registers are all free...
183 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000184 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000185
186 /// getFreeReg - Look to see if there is a free register available in the
187 /// specified register class. If not, return 0.
188 ///
189 unsigned getFreeReg(const TargetRegisterClass *RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000190
Chris Lattner91a452b2003-01-13 00:25:40 +0000191 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000192 /// register. If all compatible physical registers are used, this method
193 /// spills the last used virtual register to the stack, and uses that
194 /// register.
195 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000196 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000197 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000198
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000199 /// reloadVirtReg - This method transforms the specified specified virtual
200 /// register use to refer to a physical register. This method may do this
201 /// in one of several ways: if the register is available in a physical
202 /// register already, it uses that physical register. If the value is not
203 /// in a physical register, and if there are physical registers available,
204 /// it loads it into a register. If register pressure is high, and it is
205 /// possible, it tries to fold the load of the virtual register into the
206 /// instruction itself. It avoids doing this if register pressure is low to
207 /// improve the chance that subsequent instructions can use the reloaded
208 /// value. This method returns the modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000209 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000210 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
211 unsigned OpNum);
212
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000213
214 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
215 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000216 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000217}
218
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000219/// getStackSpaceFor - This allocates space for the specified virtual register
220/// to be held on the stack.
221int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
222 // Find the location Reg would belong...
223 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000224
Chris Lattner580f9be2002-12-28 20:40:43 +0000225 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000226 return I->second; // Already has space allocated?
227
Chris Lattner580f9be2002-12-28 20:40:43 +0000228 // Allocate a new stack object for this spill location...
Chris Lattner91a452b2003-01-13 00:25:40 +0000229 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000230
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000231 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000232 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
233 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000234}
235
Chris Lattnerae640432002-12-17 02:50:10 +0000236
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000237/// removePhysReg - This method marks the specified physical register as no
Chris Lattner82bee0f2002-12-18 08:14:26 +0000238/// longer being in use.
239///
240void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000241 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattner82bee0f2002-12-18 08:14:26 +0000242
243 std::vector<unsigned>::iterator It =
244 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000245 if (It != PhysRegsUseOrder.end())
246 PhysRegsUseOrder.erase(It);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000247}
248
Chris Lattner91a452b2003-01-13 00:25:40 +0000249
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000250/// spillVirtReg - This method spills the value specified by PhysReg into the
251/// virtual register slot specified by VirtReg. It then updates the RA data
252/// structures to indicate the fact that PhysReg is now available.
253///
Chris Lattner688c8252004-02-22 19:08:15 +0000254void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000255 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000256 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000257 " Must not have appropriate kill for the register or use exists beyond"
258 " the intended one.");
259 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
260 std::cerr << " containing %reg" << VirtReg;
261 if (!isVirtRegModified(VirtReg))
262 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000263
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000264 // Otherwise, there is a virtual register corresponding to this physical
265 // register. We only need to spill it into its stack slot if it has been
266 // modified.
267 if (isVirtRegModified(VirtReg)) {
268 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
269 int FrameIndex = getStackSpaceFor(VirtReg, RC);
270 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
271 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000272 ++NumStores; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000273 }
Chris Lattnerecea5632004-02-09 02:12:04 +0000274
275 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000276
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000277 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000278 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000279}
280
Chris Lattnerae640432002-12-17 02:50:10 +0000281
Chris Lattner91a452b2003-01-13 00:25:40 +0000282/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner128c2aa2003-08-17 18:01:15 +0000283/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
284/// then the request is ignored if the physical register does not contain a
285/// virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000286///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000287void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000288 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner64667b62004-02-09 01:26:13 +0000289 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
290 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
291 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000292 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000293 // If the selected register aliases any other registers, we must make
294 // sure that one of the aliases isn't alive...
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000295 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner64667b62004-02-09 01:26:13 +0000296 *AliasSet; ++AliasSet)
297 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
298 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
299 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000300 }
301}
302
303
304/// assignVirtToPhysReg - This method updates local state so that we know
305/// that PhysReg is the proper container for VirtReg now. The physical
306/// register must not be used for anything else when this is called.
307///
308void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000309 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattner91a452b2003-01-13 00:25:40 +0000310 // Update information to note the fact that this register was just used, and
311 // it holds VirtReg.
312 PhysRegsUsed[PhysReg] = VirtReg;
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000313 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
Chris Lattner91a452b2003-01-13 00:25:40 +0000314 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
315}
316
317
Chris Lattnerae640432002-12-17 02:50:10 +0000318/// isPhysRegAvailable - Return true if the specified physical register is free
319/// and available for use. This also includes checking to see if aliased
320/// registers are all free...
321///
322bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner64667b62004-02-09 01:26:13 +0000323 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattnerae640432002-12-17 02:50:10 +0000324
325 // If the selected register aliases any other allocated registers, it is
326 // not free!
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000327 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
328 *AliasSet; ++AliasSet)
Chris Lattner64667b62004-02-09 01:26:13 +0000329 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000330 return false; // Can't use this reg then.
Chris Lattnerae640432002-12-17 02:50:10 +0000331 return true;
332}
333
334
Chris Lattner91a452b2003-01-13 00:25:40 +0000335/// getFreeReg - Look to see if there is a free register available in the
336/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000337///
Chris Lattner91a452b2003-01-13 00:25:40 +0000338unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000339 // Get iterators defining the range of registers that are valid to allocate in
340 // this class, which also specifies the preferred allocation order.
341 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
342 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000343
Chris Lattner91a452b2003-01-13 00:25:40 +0000344 for (; RI != RE; ++RI)
345 if (isPhysRegAvailable(*RI)) { // Is reg unused?
346 assert(*RI != 0 && "Cannot use register!");
347 return *RI; // Found an unused register!
348 }
349 return 0;
350}
351
352
353/// liberatePhysReg - Make sure the specified physical register is available for
354/// use. If there is currently a value in it, it is either moved out of the way
355/// or spilled to memory.
356///
357void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000358 unsigned PhysReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000359 // FIXME: This code checks to see if a register is available, but it really
360 // wants to know if a reg is available BEFORE the instruction executes. If
361 // called after killed operands are freed, it runs the risk of reallocating a
362 // used operand...
363#if 0
364 if (isPhysRegAvailable(PhysReg)) return; // Already available...
365
366 // Check to see if the register is directly used, not indirectly used through
367 // aliases. If aliased registers are the ones actually used, we cannot be
368 // sure that we will be able to save the whole thing if we do a reg-reg copy.
Chris Lattner64667b62004-02-09 01:26:13 +0000369 if (PhysRegsUsed[PhysReg] != -1) {
370 // The virtual register held...
371 unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
Chris Lattner91a452b2003-01-13 00:25:40 +0000372
373 // Check to see if there is a compatible register available. If so, we can
374 // move the value into the new register...
375 //
376 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
377 if (unsigned NewReg = getFreeReg(RC)) {
378 // Emit the code to copy the value...
379 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000380
Chris Lattner91a452b2003-01-13 00:25:40 +0000381 // Update our internal state to indicate that PhysReg is available and Reg
382 // isn't.
Chris Lattnerecea5632004-02-09 02:12:04 +0000383 getVirt2PhysRegMapSlot[VirtReg] = 0;
Chris Lattner91a452b2003-01-13 00:25:40 +0000384 removePhysReg(PhysReg); // Free the physreg
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000385
Chris Lattner91a452b2003-01-13 00:25:40 +0000386 // Move reference over to new register...
387 assignVirtToPhysReg(VirtReg, NewReg);
388 return;
Chris Lattnerae640432002-12-17 02:50:10 +0000389 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000390 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000391#endif
392 spillPhysReg(MBB, I, PhysReg);
393}
394
395
396/// getReg - Find a physical register to hold the specified virtual
397/// register. If all compatible physical registers are used, this method spills
398/// the last used virtual register to the stack, and uses that register.
399///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000400unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000401 unsigned VirtReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000402 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
403
404 // First check to see if we have a free register of the requested type...
405 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000406
Chris Lattnerae640432002-12-17 02:50:10 +0000407 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000408 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000409 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000410
411 // Loop over all of the preallocated registers from the least recently used
412 // to the most recently used. When we find one that is capable of holding
413 // our register, use it.
414 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000415 assert(i != PhysRegsUseOrder.size() &&
416 "Couldn't find a register of the appropriate class!");
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000417
Chris Lattnerae640432002-12-17 02:50:10 +0000418 unsigned R = PhysRegsUseOrder[i];
Chris Lattner41822c72003-08-23 23:49:42 +0000419
420 // We can only use this register if it holds a virtual register (ie, it
421 // can be spilled). Do not use it if it is an explicitly allocated
422 // physical register!
Chris Lattner64667b62004-02-09 01:26:13 +0000423 assert(PhysRegsUsed[R] != -1 &&
Chris Lattner41822c72003-08-23 23:49:42 +0000424 "PhysReg in PhysRegsUseOrder, but is not allocated?");
425 if (PhysRegsUsed[R]) {
426 // If the current register is compatible, use it.
427 if (RegInfo->getRegClass(R) == RC) {
428 PhysReg = R;
429 break;
430 } else {
431 // If one of the registers aliased to the current register is
432 // compatible, use it.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000433 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
434 *AliasSet; ++AliasSet) {
435 if (RegInfo->getRegClass(*AliasSet) == RC) {
436 PhysReg = *AliasSet; // Take an aliased register
437 break;
438 }
439 }
Chris Lattner41822c72003-08-23 23:49:42 +0000440 }
Chris Lattnerae640432002-12-17 02:50:10 +0000441 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000442 }
443
Chris Lattnerae640432002-12-17 02:50:10 +0000444 assert(PhysReg && "Physical register not assigned!?!?");
445
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000446 // At this point PhysRegsUseOrder[i] is the least recently used register of
447 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000448 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000449 }
450
451 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000452 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000453 return PhysReg;
454}
455
Chris Lattnerae640432002-12-17 02:50:10 +0000456
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000457/// reloadVirtReg - This method transforms the specified specified virtual
458/// register use to refer to a physical register. This method may do this in
459/// one of several ways: if the register is available in a physical register
460/// already, it uses that physical register. If the value is not in a physical
461/// register, and if there are physical registers available, it loads it into a
462/// register. If register pressure is high, and it is possible, it tries to
463/// fold the load of the virtual register into the instruction itself. It
464/// avoids doing this if register pressure is low to improve the chance that
465/// subsequent instructions can use the reloaded value. This method returns the
466/// modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000467///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000468MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
469 unsigned OpNum) {
470 unsigned VirtReg = MI->getOperand(OpNum).getReg();
471
472 // If the virtual register is already available, just update the instruction
473 // and return.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000474 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000475 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
476 MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
477 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000478 }
479
Chris Lattner1e3812c2004-02-17 04:08:37 +0000480 // Otherwise, we need to fold it into the current instruction, or reload it.
481 // If we have registers available to hold the value, use them.
Chris Lattnerff863ba2002-12-25 05:05:46 +0000482 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000483 unsigned PhysReg = getFreeReg(RC);
Chris Lattner11390e72004-02-17 08:09:40 +0000484 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000485
Chris Lattner11390e72004-02-17 08:09:40 +0000486 if (PhysReg) { // Register is available, allocate it!
487 assignVirtToPhysReg(VirtReg, PhysReg);
488 } else { // No registers available.
489 // If we can fold this spill into this instruction, do so now.
490 MachineBasicBlock::iterator MII = MI;
491 if (RegInfo->foldMemoryOperand(MII, OpNum, FrameIndex)) {
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +0000492 ++NumFolded;
Chris Lattnerd368c612004-02-19 18:34:02 +0000493 // Since we changed the address of MI, make sure to update live variables
494 // to know that the new instruction has the properties of the old one.
495 LV->instructionChanged(MI, MII);
Chris Lattner11390e72004-02-17 08:09:40 +0000496 return MII;
Chris Lattner1e3812c2004-02-17 04:08:37 +0000497 }
498
499 // It looks like we can't fold this virtual register load into this
500 // instruction. Force some poor hapless value out of the register file to
501 // make room for the new register, and reload it.
502 PhysReg = getReg(MBB, MI, VirtReg);
503 }
504
Chris Lattner91a452b2003-01-13 00:25:40 +0000505 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
506
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000507 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
508 << RegInfo->getName(PhysReg) << "\n");
509
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000510 // Add move instruction(s)
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000511 RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000512 ++NumLoads; // Update statistics
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000513
514 MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
515 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000516}
517
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000518
519
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000520void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
521 // loop over each instruction
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000522 MachineBasicBlock::iterator MI = MBB.begin();
523 for (; MI != MBB.end(); ++MI) {
Chris Lattner3501fea2003-01-14 22:00:31 +0000524 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000525 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
526 std::cerr << " Regs have values: ";
Chris Lattner64667b62004-02-09 01:26:13 +0000527 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
528 if (PhysRegsUsed[i] != -1)
529 std::cerr << "[" << RegInfo->getName(i)
530 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000531 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000532
Chris Lattnerae640432002-12-17 02:50:10 +0000533 // Loop over the implicit uses, making sure that they are at the head of the
534 // use order list, so they don't get reallocated.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000535 for (const unsigned *ImplicitUses = TID.ImplicitUses;
536 *ImplicitUses; ++ImplicitUses)
Chris Lattnerecea5632004-02-09 02:12:04 +0000537 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000538
Brian Gaeke53b99a02003-08-15 21:19:25 +0000539 // Get the used operands into registers. This has the potential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000540 // incoming values if we are out of registers. Note that we completely
541 // ignore physical register uses here. We assume that if an explicit
542 // physical register is referenced by the instruction, that it is guaranteed
543 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000544 //
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000545 for (unsigned i = 0; i != MI->getNumOperands(); ++i)
Alkis Evlogimenos4d7af652003-12-14 13:24:17 +0000546 if (MI->getOperand(i).isUse() &&
Chris Lattner1cbe4d02004-02-10 21:12:22 +0000547 !MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000548 MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg()))
549 MI = reloadVirtReg(MBB, MI, i);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000550
Chris Lattner56ddada2004-02-17 17:49:10 +0000551 // If this instruction is the last user of anything in registers, kill the
552 // value, freeing the register being used, so it doesn't need to be
553 // spilled to memory.
554 //
555 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
556 KE = LV->killed_end(MI); KI != KE; ++KI) {
557 unsigned VirtReg = KI->second;
558 unsigned PhysReg = VirtReg;
559 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
560 // If the virtual register was never materialized into a register, it
561 // might not be in the map, but it won't hurt to zero it out anyway.
562 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
563 PhysReg = PhysRegSlot;
564 PhysRegSlot = 0;
565 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000566
Chris Lattner56ddada2004-02-17 17:49:10 +0000567 if (PhysReg) {
568 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
569 << "[%reg" << VirtReg <<"], removing it from live set\n");
570 removePhysReg(PhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000571 }
572 }
573
574 // Loop over all of the operands of the instruction, spilling registers that
575 // are defined, and marking explicit destinations in the PhysRegsUsed map.
576 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattner3d878d82004-02-10 20:41:10 +0000577 if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
578 MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) {
Alkis Evlogimenosbe766c72004-02-13 21:01:20 +0000579 unsigned Reg = MI->getOperand(i).getReg();
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000580 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
Chris Lattner91a452b2003-01-13 00:25:40 +0000581 PhysRegsUsed[Reg] = 0; // It is free and reserved now
582 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000583 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
584 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000585 PhysRegsUseOrder.push_back(*AliasSet);
586 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000587 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000588 }
589
590 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000591 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
592 *ImplicitDefs; ++ImplicitDefs) {
593 unsigned Reg = *ImplicitDefs;
Chris Lattner11390e72004-02-17 08:09:40 +0000594 spillPhysReg(MBB, MI, Reg, true);
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000595 PhysRegsUseOrder.push_back(Reg);
596 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000597 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
598 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000599 PhysRegsUseOrder.push_back(*AliasSet);
600 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000601 }
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000602 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000603
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000604 // Okay, we have allocated all of the source operands and spilled any values
605 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner91a452b2003-01-13 00:25:40 +0000606 // implicit defs and assign them to a register, spilling incoming values if
607 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000608 //
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000609 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattner1cbe4d02004-02-10 21:12:22 +0000610 if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
611 MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) {
Alkis Evlogimenosbe766c72004-02-13 21:01:20 +0000612 unsigned DestVirtReg = MI->getOperand(i).getReg();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000613 unsigned DestPhysReg;
614
Alkis Evlogimenos9af9dbd2003-12-18 13:08:52 +0000615 // If DestVirtReg already has a value, use it.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000616 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000617 DestPhysReg = getReg(MBB, MI, DestVirtReg);
Chris Lattnerd5725632003-05-12 03:54:14 +0000618 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000619 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
620 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000621
Chris Lattner56ddada2004-02-17 17:49:10 +0000622 // If this instruction defines any registers that are immediately dead,
623 // kill them now.
624 //
625 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
626 KE = LV->dead_end(MI); KI != KE; ++KI) {
627 unsigned VirtReg = KI->second;
628 unsigned PhysReg = VirtReg;
629 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
630 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
631 PhysReg = PhysRegSlot;
632 assert(PhysReg != 0);
633 PhysRegSlot = 0;
634 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000635
Chris Lattner56ddada2004-02-17 17:49:10 +0000636 if (PhysReg) {
637 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
638 << " [%reg" << VirtReg
639 << "] is never used, removing it frame live list\n");
640 removePhysReg(PhysReg);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000641 }
642 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000643 }
644
Alkis Evlogimenos743d0a12004-02-23 18:14:48 +0000645 MI = MBB.getFirstTerminator();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000646
647 // Spill all physical registers holding virtual registers now.
Chris Lattner64667b62004-02-09 01:26:13 +0000648 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
649 if (PhysRegsUsed[i] != -1)
650 if (unsigned VirtReg = PhysRegsUsed[i])
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000651 spillVirtReg(MBB, MI, VirtReg, i);
Chris Lattner64667b62004-02-09 01:26:13 +0000652 else
653 removePhysReg(i);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000654
Chris Lattnerecea5632004-02-09 02:12:04 +0000655#ifndef NDEBUG
656 bool AllOk = true;
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +0000657 for (unsigned i = MRegisterInfo::FirstVirtualRegister,
658 e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i)
Chris Lattnerecea5632004-02-09 02:12:04 +0000659 if (unsigned PR = Virt2PhysRegMap[i]) {
660 std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
661 AllOk = false;
662 }
663 assert(AllOk && "Virtual registers still in phys regs?");
664#endif
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000665
Chris Lattner128c2aa2003-08-17 18:01:15 +0000666 // Clear any physical register which appear live at the end of the basic
667 // block, but which do not hold any virtual registers. e.g., the stack
668 // pointer.
669 PhysRegsUseOrder.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000670}
671
Chris Lattner86c69a62002-12-17 03:16:10 +0000672
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000673/// runOnMachineFunction - Register allocate the whole function
674///
675bool RA::runOnMachineFunction(MachineFunction &Fn) {
676 DEBUG(std::cerr << "Machine Function " << "\n");
677 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000678 TM = &Fn.getTarget();
679 RegInfo = TM->getRegisterInfo();
Chris Lattner56ddada2004-02-17 17:49:10 +0000680 LV = &getAnalysis<LiveVariables>();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000681
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000682 PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
Chris Lattner64667b62004-02-09 01:26:13 +0000683
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000684 // initialize the virtual->physical register map to have a 'null'
685 // mapping for all virtual registers
Alkis Evlogimenos4d0d8642004-02-25 21:55:45 +0000686 Virt2PhysRegMap.clear();
687 Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg());
Chris Lattnerecea5632004-02-09 02:12:04 +0000688
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000689 // Loop over all of the basic blocks, eliminating virtual register references
690 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
691 MBB != MBBe; ++MBB)
692 AllocateBasicBlock(*MBB);
693
Chris Lattner580f9be2002-12-28 20:40:43 +0000694 StackSlotForVirtReg.clear();
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000695 PhysRegsUsed.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000696 VirtRegModified.clear();
Chris Lattnerecea5632004-02-09 02:12:04 +0000697 Virt2PhysRegMap.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000698 return true;
699}
700
Chris Lattneref09c632004-01-31 21:27:19 +0000701FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000702 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000703}