Scott Michel | a589a08 | 2007-12-03 23:14:43 +0000 | [diff] [blame] | 1 | //===- SPU.td - Describe the STI Cell SPU Target Machine ----*- tablegen -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | 4ee451d | 2007-12-29 20:36:04 +0000 | [diff] [blame^] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Scott Michel | a589a08 | 2007-12-03 23:14:43 +0000 | [diff] [blame] | 7 | // |
Scott Michel | a589a08 | 2007-12-03 23:14:43 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This is the top level entry point for the STI Cell SPU target machine. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | // Get the target-independent interfaces which we are implementing. |
| 15 | // |
| 16 | include "../Target.td" |
| 17 | |
| 18 | //===----------------------------------------------------------------------===// |
| 19 | // Register File Description |
| 20 | //===----------------------------------------------------------------------===// |
| 21 | |
| 22 | include "SPURegisterInfo.td" |
| 23 | |
| 24 | //===----------------------------------------------------------------------===// |
| 25 | // Instruction formats, instructions |
| 26 | //===----------------------------------------------------------------------===// |
| 27 | |
| 28 | include "SPUNodes.td" |
| 29 | include "SPUOperands.td" |
| 30 | include "SPUSchedule.td" |
| 31 | include "SPUInstrFormats.td" |
| 32 | include "SPUInstrInfo.td" |
| 33 | |
| 34 | //===----------------------------------------------------------------------===// |
| 35 | // Subtarget features: |
| 36 | //===----------------------------------------------------------------------===// |
| 37 | |
| 38 | def DefaultProc: SubtargetFeature<"", "ProcDirective", "SPU::DEFAULT_PROC", "">; |
| 39 | def LargeMemFeature: |
| 40 | SubtargetFeature<"large_mem","UseLargeMem", "true", |
| 41 | "Use large (>256) LSA memory addressing [default = false]">; |
| 42 | |
| 43 | def SPURev0 : Processor<"v0", SPUItineraries, [DefaultProc]>; |
| 44 | |
| 45 | //===----------------------------------------------------------------------===// |
| 46 | // Calling convention: |
| 47 | //===----------------------------------------------------------------------===// |
| 48 | |
| 49 | include "SPUCallingConv.td" |
| 50 | |
| 51 | // Target: |
| 52 | |
| 53 | def SPUInstrInfo : InstrInfo { |
| 54 | let isLittleEndianEncoding = 1; |
| 55 | } |
| 56 | |
| 57 | def SPU : Target { |
| 58 | let InstructionSet = SPUInstrInfo; |
| 59 | } |