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Dan Gohmanf17a25c2007-07-18 16:29:46 +00001//===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
2//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner081ce942007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Dan Gohmanf17a25c2007-07-18 16:29:46 +00007//
8//===----------------------------------------------------------------------===//
9//
10// This file implements a virtual register map. This maps virtual registers to
11// physical registers and virtual registers to stack slots. It is created and
12// updated by a register allocator and then used by a machine code rewriter that
13// adds spill code and rewrites virtual into physical register references.
14//
15//===----------------------------------------------------------------------===//
16
17#ifndef LLVM_CODEGEN_VIRTREGMAP_H
18#define LLVM_CODEGEN_VIRTREGMAP_H
19
Dan Gohman1e57df32008-02-10 18:45:23 +000020#include "llvm/Target/TargetRegisterInfo.h"
Evan Chengcecc8222007-11-17 00:40:40 +000021#include "llvm/ADT/DenseMap.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000022#include "llvm/ADT/IndexedMap.h"
Evan Chengda872532008-02-27 03:04:06 +000023#include "llvm/ADT/SmallPtrSet.h"
Dan Gohmanf17a25c2007-07-18 16:29:46 +000024#include "llvm/Support/Streams.h"
25#include <map>
26
27namespace llvm {
28 class MachineInstr;
David Greene44a3bfb2007-08-07 16:34:05 +000029 class MachineFunction;
Dan Gohmanf17a25c2007-07-18 16:29:46 +000030 class TargetInstrInfo;
31
32 class VirtRegMap {
33 public:
34 enum {
35 NO_PHYS_REG = 0,
36 NO_STACK_SLOT = (1L << 30)-1,
37 MAX_STACK_SLOT = (1L << 18)-1
38 };
39
40 enum ModRef { isRef = 1, isMod = 2, isModRef = 3 };
41 typedef std::multimap<MachineInstr*,
42 std::pair<unsigned, ModRef> > MI2VirtMapTy;
43
44 private:
45 const TargetInstrInfo &TII;
46
47 MachineFunction &MF;
48 /// Virt2PhysMap - This is a virtual to physical register
49 /// mapping. Each virtual register is required to have an entry in
50 /// it; even spilled virtual registers (the register mapped to a
51 /// spilled register is the temporary used to load it from the
52 /// stack).
53 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
Evan Chengcecc8222007-11-17 00:40:40 +000054
Dan Gohmanf17a25c2007-07-18 16:29:46 +000055 /// Virt2StackSlotMap - This is virtual register to stack slot
56 /// mapping. Each spilled virtual register has an entry in it
57 /// which corresponds to the stack slot this register is spilled
58 /// at.
59 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
Evan Chengcecc8222007-11-17 00:40:40 +000060
61 /// Virt2StackSlotMap - This is virtual register to rematerialization id
62 /// mapping. Each spilled virtual register that should be remat'd has an
63 /// entry in it which corresponds to the remat id.
Evan Cheng1204d172007-08-13 23:45:17 +000064 IndexedMap<int, VirtReg2IndexFunctor> Virt2ReMatIdMap;
Evan Chengcecc8222007-11-17 00:40:40 +000065
66 /// Virt2SplitMap - This is virtual register to splitted virtual register
67 /// mapping.
68 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
69
Evan Cheng6f522672007-12-05 09:51:10 +000070 /// Virt2SplitKillMap - This is splitted virtual register to its last use
Evan Chengd9731042007-12-05 10:24:35 +000071 /// (kill) index mapping.
72 IndexedMap<unsigned> Virt2SplitKillMap;
Evan Cheng6f522672007-12-05 09:51:10 +000073
Evan Chengcecc8222007-11-17 00:40:40 +000074 /// ReMatMap - This is virtual register to re-materialized instruction
75 /// mapping. Each virtual register whose definition is going to be
76 /// re-materialized has an entry in it.
77 IndexedMap<MachineInstr*, VirtReg2IndexFunctor> ReMatMap;
78
Dan Gohmanf17a25c2007-07-18 16:29:46 +000079 /// MI2VirtMap - This is MachineInstr to virtual register
80 /// mapping. In the case of memory spill code being folded into
81 /// instructions, we need to know which virtual register was
82 /// read/written by this instruction.
83 MI2VirtMapTy MI2VirtMap;
84
Evan Chengcecc8222007-11-17 00:40:40 +000085 /// SpillPt2VirtMap - This records the virtual registers which should
86 /// be spilled right after the MachineInstr due to live interval
87 /// splitting.
Evan Chenged17a892007-12-05 08:16:32 +000088 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > >
89 SpillPt2VirtMap;
Dan Gohmanf17a25c2007-07-18 16:29:46 +000090
Evan Cheng96c61312007-11-29 01:06:25 +000091 /// RestorePt2VirtMap - This records the virtual registers which should
92 /// be restored right before the MachineInstr due to live interval
93 /// splitting.
94 std::map<MachineInstr*, std::vector<unsigned> > RestorePt2VirtMap;
95
Evan Cheng14cc83f2008-03-11 07:19:34 +000096 /// EmergencySpillMap - This records the physical registers that should
97 /// be spilled / restored around the MachineInstr since the register
98 /// allocator has run out of registers.
99 std::map<MachineInstr*, std::vector<unsigned> > EmergencySpillMap;
100
101 /// EmergencySpillSlots - This records emergency spill slots used to
102 /// spill physical registers when the register allocator runs out of
103 /// registers. Ideally only one stack slot is used per function per
104 /// register class.
105 std::map<const TargetRegisterClass*, int> EmergencySpillSlots;
106
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000107 /// ReMatId - Instead of assigning a stack slot to a to be rematerialized
108 /// virtual register, an unique id is being assigned. This keeps track of
109 /// the highest id used so far. Note, this starts at (1<<18) to avoid
110 /// conflicts with stack slot numbers.
111 int ReMatId;
112
Evan Chengda872532008-02-27 03:04:06 +0000113 /// LowSpillSlot, HighSpillSlot - Lowest and highest spill slot indexes.
114 int LowSpillSlot, HighSpillSlot;
115
116 /// SpillSlotToUsesMap - Records uses for each register spill slot.
117 SmallVector<SmallPtrSet<MachineInstr*, 4>, 8> SpillSlotToUsesMap;
118
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000119 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT
120 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT
121
122 public:
Dan Gohman3a78bbf2007-08-02 21:21:54 +0000123 explicit VirtRegMap(MachineFunction &mf);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000124
125 void grow();
126
127 /// @brief returns true if the specified virtual register is
128 /// mapped to a physical register
129 bool hasPhys(unsigned virtReg) const {
130 return getPhys(virtReg) != NO_PHYS_REG;
131 }
132
133 /// @brief returns the physical register mapped to the specified
134 /// virtual register
135 unsigned getPhys(unsigned virtReg) const {
Dan Gohman1e57df32008-02-10 18:45:23 +0000136 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000137 return Virt2PhysMap[virtReg];
138 }
139
140 /// @brief creates a mapping for the specified virtual register to
141 /// the specified physical register
142 void assignVirt2Phys(unsigned virtReg, unsigned physReg) {
Dan Gohman1e57df32008-02-10 18:45:23 +0000143 assert(TargetRegisterInfo::isVirtualRegister(virtReg) &&
144 TargetRegisterInfo::isPhysicalRegister(physReg));
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000145 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG &&
146 "attempt to assign physical register to already mapped "
147 "virtual register");
148 Virt2PhysMap[virtReg] = physReg;
149 }
150
151 /// @brief clears the specified virtual register's, physical
152 /// register mapping
153 void clearVirt(unsigned virtReg) {
Dan Gohman1e57df32008-02-10 18:45:23 +0000154 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000155 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
156 "attempt to clear a not assigned virtual register");
157 Virt2PhysMap[virtReg] = NO_PHYS_REG;
158 }
159
160 /// @brief clears all virtual to physical register mappings
161 void clearAllVirt() {
162 Virt2PhysMap.clear();
163 grow();
164 }
165
Evan Chengcecc8222007-11-17 00:40:40 +0000166 /// @brief records virtReg is a split live interval from SReg.
167 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
168 Virt2SplitMap[virtReg] = SReg;
169 }
170
171 /// @brief returns the live interval virtReg is split from.
172 unsigned getPreSplitReg(unsigned virtReg) {
173 return Virt2SplitMap[virtReg];
174 }
175
Evan Cheng1204d172007-08-13 23:45:17 +0000176 /// @brief returns true is the specified virtual register is not
177 /// mapped to a stack slot or rematerialized.
178 bool isAssignedReg(unsigned virtReg) const {
Evan Chengcecc8222007-11-17 00:40:40 +0000179 if (getStackSlot(virtReg) == NO_STACK_SLOT &&
180 getReMatId(virtReg) == NO_STACK_SLOT)
181 return true;
182 // Split register can be assigned a physical register as well as a
183 // stack slot or remat id.
184 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000185 }
186
187 /// @brief returns the stack slot mapped to the specified virtual
188 /// register
189 int getStackSlot(unsigned virtReg) const {
Dan Gohman1e57df32008-02-10 18:45:23 +0000190 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000191 return Virt2StackSlotMap[virtReg];
192 }
193
Evan Cheng1204d172007-08-13 23:45:17 +0000194 /// @brief returns the rematerialization id mapped to the specified virtual
195 /// register
196 int getReMatId(unsigned virtReg) const {
Dan Gohman1e57df32008-02-10 18:45:23 +0000197 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
Evan Cheng1204d172007-08-13 23:45:17 +0000198 return Virt2ReMatIdMap[virtReg];
199 }
200
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000201 /// @brief create a mapping for the specifed virtual register to
202 /// the next available stack slot
203 int assignVirt2StackSlot(unsigned virtReg);
204 /// @brief create a mapping for the specified virtual register to
205 /// the specified stack slot
206 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
207
208 /// @brief assign an unique re-materialization id to the specified
209 /// virtual register.
210 int assignVirtReMatId(unsigned virtReg);
Evan Cheng1204d172007-08-13 23:45:17 +0000211 /// @brief assign an unique re-materialization id to the specified
212 /// virtual register.
213 void assignVirtReMatId(unsigned virtReg, int id);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000214
215 /// @brief returns true if the specified virtual register is being
216 /// re-materialized.
217 bool isReMaterialized(unsigned virtReg) const {
Evan Cheng1204d172007-08-13 23:45:17 +0000218 return ReMatMap[virtReg] != NULL;
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000219 }
220
221 /// @brief returns the original machine instruction being re-issued
222 /// to re-materialize the specified virtual register.
Evan Cheng1204d172007-08-13 23:45:17 +0000223 MachineInstr *getReMaterializedMI(unsigned virtReg) const {
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000224 return ReMatMap[virtReg];
225 }
226
227 /// @brief records the specified virtual register will be
228 /// re-materialized and the original instruction which will be re-issed
Evan Cheng1204d172007-08-13 23:45:17 +0000229 /// for this purpose. If parameter all is true, then all uses of the
230 /// registers are rematerialized and it's safe to delete the definition.
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000231 void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) {
232 ReMatMap[virtReg] = def;
233 }
234
Evan Cheng6f522672007-12-05 09:51:10 +0000235 /// @brief record the last use (kill) of a split virtual register.
Evan Chengd9731042007-12-05 10:24:35 +0000236 void addKillPoint(unsigned virtReg, unsigned index) {
237 Virt2SplitKillMap[virtReg] = index;
Evan Cheng6f522672007-12-05 09:51:10 +0000238 }
239
Evan Chengd9731042007-12-05 10:24:35 +0000240 unsigned getKillPoint(unsigned virtReg) const {
241 return Virt2SplitKillMap[virtReg];
242 }
243
244 /// @brief remove the last use (kill) of a split virtual register.
Evan Cheng6f522672007-12-05 09:51:10 +0000245 void removeKillPoint(unsigned virtReg) {
Evan Chengd9731042007-12-05 10:24:35 +0000246 Virt2SplitKillMap[virtReg] = 0;
Evan Cheng6f522672007-12-05 09:51:10 +0000247 }
248
Evan Cheng91e32d02007-11-28 01:28:46 +0000249 /// @brief returns true if the specified MachineInstr is a spill point.
250 bool isSpillPt(MachineInstr *Pt) const {
251 return SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end();
252 }
253
Evan Chengcecc8222007-11-17 00:40:40 +0000254 /// @brief returns the virtual registers that should be spilled due to
255 /// splitting right after the specified MachineInstr.
Evan Chenged17a892007-12-05 08:16:32 +0000256 std::vector<std::pair<unsigned,bool> > &getSpillPtSpills(MachineInstr *Pt) {
Evan Chengcecc8222007-11-17 00:40:40 +0000257 return SpillPt2VirtMap[Pt];
258 }
259
260 /// @brief records the specified MachineInstr as a spill point for virtReg.
Evan Chenged17a892007-12-05 08:16:32 +0000261 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) {
Evan Cheng91e32d02007-11-28 01:28:46 +0000262 if (SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end())
Evan Chenged17a892007-12-05 08:16:32 +0000263 SpillPt2VirtMap[Pt].push_back(std::make_pair(virtReg, isKill));
Evan Cheng91e32d02007-11-28 01:28:46 +0000264 else {
Evan Chenged17a892007-12-05 08:16:32 +0000265 std::vector<std::pair<unsigned,bool> > Virts;
266 Virts.push_back(std::make_pair(virtReg, isKill));
Evan Cheng91e32d02007-11-28 01:28:46 +0000267 SpillPt2VirtMap.insert(std::make_pair(Pt, Virts));
268 }
Evan Chengcecc8222007-11-17 00:40:40 +0000269 }
270
Evan Cheng1eeb2ef2008-03-11 21:34:46 +0000271 /// @brief - transfer spill point information from one instruction to
272 /// another.
Evan Chengcecc8222007-11-17 00:40:40 +0000273 void transferSpillPts(MachineInstr *Old, MachineInstr *New) {
Evan Chenged17a892007-12-05 08:16:32 +0000274 std::map<MachineInstr*,std::vector<std::pair<unsigned,bool> > >::iterator
275 I = SpillPt2VirtMap.find(Old);
Evan Cheng91e32d02007-11-28 01:28:46 +0000276 if (I == SpillPt2VirtMap.end())
277 return;
278 while (!I->second.empty()) {
Evan Chenged17a892007-12-05 08:16:32 +0000279 unsigned virtReg = I->second.back().first;
280 bool isKill = I->second.back().second;
Evan Cheng91e32d02007-11-28 01:28:46 +0000281 I->second.pop_back();
Evan Chenged17a892007-12-05 08:16:32 +0000282 addSpillPoint(virtReg, isKill, New);
Evan Chengcecc8222007-11-17 00:40:40 +0000283 }
Evan Cheng91e32d02007-11-28 01:28:46 +0000284 SpillPt2VirtMap.erase(I);
Evan Chengcecc8222007-11-17 00:40:40 +0000285 }
286
Evan Cheng96c61312007-11-29 01:06:25 +0000287 /// @brief returns true if the specified MachineInstr is a restore point.
288 bool isRestorePt(MachineInstr *Pt) const {
289 return RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end();
290 }
291
292 /// @brief returns the virtual registers that should be restoreed due to
293 /// splitting right after the specified MachineInstr.
294 std::vector<unsigned> &getRestorePtRestores(MachineInstr *Pt) {
295 return RestorePt2VirtMap[Pt];
296 }
297
298 /// @brief records the specified MachineInstr as a restore point for virtReg.
299 void addRestorePoint(unsigned virtReg, MachineInstr *Pt) {
300 if (RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end())
301 RestorePt2VirtMap[Pt].push_back(virtReg);
302 else {
303 std::vector<unsigned> Virts;
304 Virts.push_back(virtReg);
305 RestorePt2VirtMap.insert(std::make_pair(Pt, Virts));
306 }
307 }
308
Evan Cheng14cc83f2008-03-11 07:19:34 +0000309 /// @brief - transfer restore point information from one instruction to
310 /// another.
Evan Cheng96c61312007-11-29 01:06:25 +0000311 void transferRestorePts(MachineInstr *Old, MachineInstr *New) {
312 std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
313 RestorePt2VirtMap.find(Old);
314 if (I == RestorePt2VirtMap.end())
315 return;
316 while (!I->second.empty()) {
317 unsigned virtReg = I->second.back();
318 I->second.pop_back();
319 addRestorePoint(virtReg, New);
320 }
321 RestorePt2VirtMap.erase(I);
322 }
323
Evan Cheng14cc83f2008-03-11 07:19:34 +0000324 /// @brief records that the specified physical register must be spilled
325 /// around the specified machine instr.
326 void addEmergencySpill(unsigned PhysReg, MachineInstr *MI) {
327 if (EmergencySpillMap.find(MI) != EmergencySpillMap.end())
328 EmergencySpillMap[MI].push_back(PhysReg);
329 else {
330 std::vector<unsigned> PhysRegs;
331 PhysRegs.push_back(PhysReg);
332 EmergencySpillMap.insert(std::make_pair(MI, PhysRegs));
333 }
334 }
335
336 /// @brief returns true if one or more physical registers must be spilled
337 /// around the specified instruction.
338 bool hasEmergencySpills(MachineInstr *MI) const {
339 return EmergencySpillMap.find(MI) != EmergencySpillMap.end();
340 }
341
342 /// @brief returns the physical registers to be spilled and restored around
343 /// the instruction.
344 std::vector<unsigned> &getEmergencySpills(MachineInstr *MI) {
345 return EmergencySpillMap[MI];
346 }
347
Evan Cheng1eeb2ef2008-03-11 21:34:46 +0000348 /// @brief - transfer emergency spill information from one instruction to
349 /// another.
350 void transferEmergencySpills(MachineInstr *Old, MachineInstr *New) {
351 std::map<MachineInstr*,std::vector<unsigned> >::iterator I =
352 EmergencySpillMap.find(Old);
353 if (I == EmergencySpillMap.end())
354 return;
355 while (!I->second.empty()) {
356 unsigned virtReg = I->second.back();
357 I->second.pop_back();
358 addEmergencySpill(virtReg, New);
359 }
360 EmergencySpillMap.erase(I);
361 }
362
Evan Cheng14cc83f2008-03-11 07:19:34 +0000363 /// @brief return or get a emergency spill slot for the register class.
364 int getEmergencySpillSlot(const TargetRegisterClass *RC);
365
Evan Chengda872532008-02-27 03:04:06 +0000366 /// @brief Return lowest spill slot index.
367 int getLowSpillSlot() const {
368 return LowSpillSlot;
369 }
370
371 /// @brief Return highest spill slot index.
372 int getHighSpillSlot() const {
373 return HighSpillSlot;
374 }
375
376 /// @brief Records a spill slot use.
377 void addSpillSlotUse(int FrameIndex, MachineInstr *MI);
378
379 /// @brief Returns true if spill slot has been used.
380 bool isSpillSlotUsed(int FrameIndex) const {
381 assert(FrameIndex >= 0 && "Spill slot index should not be negative!");
382 return !SpillSlotToUsesMap[FrameIndex-LowSpillSlot].empty();
383 }
384
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000385 /// @brief Updates information about the specified virtual register's value
Evan Chengfd0bd3c2007-12-02 08:30:39 +0000386 /// folded into newMI machine instruction.
387 void virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI,
388 ModRef MRInfo);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000389
Evan Chengf3255842007-10-13 02:50:24 +0000390 /// @brief Updates information about the specified virtual register's value
391 /// folded into the specified machine instruction.
392 void virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo);
393
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000394 /// @brief returns the virtual registers' values folded in memory
395 /// operands of this instruction
396 std::pair<MI2VirtMapTy::const_iterator, MI2VirtMapTy::const_iterator>
397 getFoldedVirts(MachineInstr* MI) const {
398 return MI2VirtMap.equal_range(MI);
399 }
400
Evan Cheng91e32d02007-11-28 01:28:46 +0000401 /// RemoveMachineInstrFromMaps - MI is being erased, remove it from the
402 /// the folded instruction map and spill point map.
Evan Chengda872532008-02-27 03:04:06 +0000403 void RemoveMachineInstrFromMaps(MachineInstr *MI);
Dan Gohmanf17a25c2007-07-18 16:29:46 +0000404
405 void print(std::ostream &OS) const;
406 void print(std::ostream *OS) const { if (OS) print(*OS); }
407 void dump() const;
408 };
409
410 inline std::ostream *operator<<(std::ostream *OS, const VirtRegMap &VRM) {
411 VRM.print(OS);
412 return OS;
413 }
414 inline std::ostream &operator<<(std::ostream &OS, const VirtRegMap &VRM) {
415 VRM.print(OS);
416 return OS;
417 }
418
419 /// Spiller interface: Implementations of this interface assign spilled
420 /// virtual registers to stack slots, rewriting the code.
421 struct Spiller {
422 virtual ~Spiller();
423 virtual bool runOnMachineFunction(MachineFunction &MF,
424 VirtRegMap &VRM) = 0;
425 };
426
427 /// createSpiller - Create an return a spiller object, as specified on the
428 /// command line.
429 Spiller* createSpiller();
430
431} // End llvm namespace
432
433#endif