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gerrit-public.fairphone.software / platform / external / llvm / 8e2fd03941800ee0405593e4ac8d249f12eea60a / . / test / CodeGen / X86 / atomic_op.ll
blob: a070f96acd6908a2cc0c6f544db588f2e32ea30c [file] [log] [blame]
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]1; RUN: llvm-as < %s | llc -march=x86 -o %t1 -f
2; RUN: grep "lock xaddl" %t1 | count 4
3; RUN: grep "lock cmpxchgl" %t1 | count 13
4; RUN: grep "xchgl" %t1 | count 14
5; RUN: grep "cmova" %t1 | count 2
6; RUN: grep "cmovb" %t1 | count 2
7; RUN: grep "cmovg" %t1 | count 2
8; RUN: grep "cmovl" %t1 | count 2
9
10target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
11
12define void @main(i32 %argc, i8** %argv) {
13entry:
14 %argc.addr = alloca i32 ; <i32*> [#uses=1]
15 %argv.addr = alloca i8** ; <i8***> [#uses=1]
16 %val1 = alloca i32 ; <i32*> [#uses=2]
17 %val2 = alloca i32 ; <i32*> [#uses=15]
18 %andt = alloca i32 ; <i32*> [#uses=2]
19 %ort = alloca i32 ; <i32*> [#uses=2]
20 %xort = alloca i32 ; <i32*> [#uses=2]
21 %old = alloca i32 ; <i32*> [#uses=18]
22 %temp = alloca i32 ; <i32*> [#uses=2]
23 store i32 %argc, i32* %argc.addr
24 store i8** %argv, i8*** %argv.addr
25 store i32 0, i32* %val1
26 store i32 31, i32* %val2
27 store i32 3855, i32* %andt
28 store i32 3855, i32* %ort
29 store i32 3855, i32* %xort
30 store i32 4, i32* %temp
31 %tmp = load i32* %temp ; <i32> [#uses=1]
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]32 call i32 @llvm.atomic.load.add.i32( i32* %val1, i32 %tmp ) ; <i32>:0 [#uses=1]
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]33 store i32 %0, i32* %old
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]34 call i32 @llvm.atomic.load.sub.i32( i32* %val2, i32 30 ) ; <i32>:1 [#uses=1]
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]35 store i32 %1, i32* %old
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]36 call i32 @llvm.atomic.load.add.i32( i32* %val2, i32 1 ) ; <i32>:2 [#uses=1]
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]37 store i32 %2, i32* %old
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]38 call i32 @llvm.atomic.load.sub.i32( i32* %val2, i32 1 ) ; <i32>:3 [#uses=1]
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]39 store i32 %3, i32* %old
40 call i32 @llvm.atomic.load.and.i32( i32* %andt, i32 4080 ) ; <i32>:4 [#uses=1]
41 store i32 %4, i32* %old
42 call i32 @llvm.atomic.load.or.i32( i32* %ort, i32 4080 ) ; <i32>:5 [#uses=1]
43 store i32 %5, i32* %old
44 call i32 @llvm.atomic.load.xor.i32( i32* %xort, i32 4080 ) ; <i32>:6 [#uses=1]
45 store i32 %6, i32* %old
46 call i32 @llvm.atomic.load.min.i32( i32* %val2, i32 16 ) ; <i32>:7 [#uses=1]
47 store i32 %7, i32* %old
48 %neg = sub i32 0, 1 ; <i32> [#uses=1]
49 call i32 @llvm.atomic.load.min.i32( i32* %val2, i32 %neg ) ; <i32>:8 [#uses=1]
50 store i32 %8, i32* %old
51 call i32 @llvm.atomic.load.max.i32( i32* %val2, i32 1 ) ; <i32>:9 [#uses=1]
52 store i32 %9, i32* %old
53 call i32 @llvm.atomic.load.max.i32( i32* %val2, i32 0 ) ; <i32>:10 [#uses=1]
54 store i32 %10, i32* %old
55 call i32 @llvm.atomic.load.umax.i32( i32* %val2, i32 65535 ) ; <i32>:11 [#uses=1]
56 store i32 %11, i32* %old
57 call i32 @llvm.atomic.load.umax.i32( i32* %val2, i32 10 ) ; <i32>:12 [#uses=1]
58 store i32 %12, i32* %old
59 call i32 @llvm.atomic.load.umin.i32( i32* %val2, i32 1 ) ; <i32>:13 [#uses=1]
60 store i32 %13, i32* %old
61 call i32 @llvm.atomic.load.umin.i32( i32* %val2, i32 10 ) ; <i32>:14 [#uses=1]
62 store i32 %14, i32* %old
63 call i32 @llvm.atomic.swap.i32( i32* %val2, i32 1976 ) ; <i32>:15 [#uses=1]
64 store i32 %15, i32* %old
65 %neg1 = sub i32 0, 10 ; <i32> [#uses=1]
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]66 call i32 @llvm.atomic.cmp.swap.i32( i32* %val2, i32 %neg1, i32 1 ) ; <i32>:16 [#uses=1]
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]67 store i32 %16, i32* %old
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]68 call i32 @llvm.atomic.cmp.swap.i32( i32* %val2, i32 1976, i32 1 ) ; <i32>:17 [#uses=1]
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]69 store i32 %17, i32* %old
70 ret void
71}
72
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]73declare i32 @llvm.atomic.load.add.i32(i32*, i32) nounwind
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]74
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]75declare i32 @llvm.atomic.load.sub.i32(i32*, i32) nounwind
Mon P Wang078a62d2008-05-05 19:05:59 +0000[diff] [blame]76
77declare i32 @llvm.atomic.load.and.i32(i32*, i32) nounwind
78
79declare i32 @llvm.atomic.load.or.i32(i32*, i32) nounwind
80
81declare i32 @llvm.atomic.load.xor.i32(i32*, i32) nounwind
82
83declare i32 @llvm.atomic.load.min.i32(i32*, i32) nounwind
84
85declare i32 @llvm.atomic.load.max.i32(i32*, i32) nounwind
86
87declare i32 @llvm.atomic.load.umax.i32(i32*, i32) nounwind
88
89declare i32 @llvm.atomic.load.umin.i32(i32*, i32) nounwind
90
91declare i32 @llvm.atomic.swap.i32(i32*, i32) nounwind
92
Mon P Wang6bde9ec2008-06-25 08:15:39 +0000[diff] [blame]93declare i32 @llvm.atomic.cmp.swap.i32(i32*, i32, i32) nounwind