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gerrit-public.fairphone.software / platform / external / llvm / 3a42565ccb169ec4acf79698b38d7da880f13364 / . / test / CodeGen / ARM / prefetch.ll
blob: 95f082aa9385a68fe1d46367bf0a6acb02fb9fd5 [file] [log] [blame]
Evan Chengbc7deb02010-11-03 05:14:24 +0000[diff] [blame]1; RUN: llc < %s -march=thumb -mattr=-thumb2 | not grep pld
Bob Wilsoncd704962011-04-19 18:11:52 +0000[diff] [blame]2; RUN: llc < %s -march=thumb -mattr=+v7a | FileCheck %s -check-prefix=THUMB2
3; RUN: llc < %s -march=arm -mattr=+v7a | FileCheck %s -check-prefix=ARM
4; RUN: llc < %s -march=arm -mcpu=cortex-a9-mp | FileCheck %s -check-prefix=ARM-MP
Evan Chengbc7deb02010-11-03 05:14:24 +0000[diff] [blame]5; rdar://8601536
6
7define void @t1(i8* %ptr) nounwind {
8entry:
Bob Wilsoncd704962011-04-19 18:11:52 +0000[diff] [blame]9; ARM: t1:
10; ARM-NOT: pldw [r0]
11; ARM: pld [r0]
12
Evan Cheng416941d2010-11-04 05:19:35 +0000[diff] [blame]13; ARM-MP: t1:
14; ARM-MP: pldw [r0]
15; ARM-MP: pld [r0]
Evan Chengbc7deb02010-11-03 05:14:24 +0000[diff] [blame]16
17; THUMB2: t1:
Evan Cheng416941d2010-11-04 05:19:35 +0000[diff] [blame]18; THUMB2-NOT: pldw [r0]
Evan Chengbc7deb02010-11-03 05:14:24 +0000[diff] [blame]19; THUMB2: pld [r0]
Evan Cheng416941d2010-11-04 05:19:35 +0000[diff] [blame]20 tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3 )
Evan Chengbc7deb02010-11-03 05:14:24 +0000[diff] [blame]21 tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3 )
22 ret void
23}
24
25define void @t2(i8* %ptr) nounwind {
26entry:
Bob Wilsoncd704962011-04-19 18:11:52 +0000[diff] [blame]27; ARM: t2:
28; ARM: pld [r0, #1023]
Evan Chengbc7deb02010-11-03 05:14:24 +0000[diff] [blame]29
30; THUMB2: t2:
31; THUMB2: pld [r0, #1023]
32 %tmp = getelementptr i8* %ptr, i32 1023
33 tail call void @llvm.prefetch( i8* %tmp, i32 0, i32 3 )
34 ret void
35}
36
37define void @t3(i32 %base, i32 %offset) nounwind {
38entry:
Bob Wilsoncd704962011-04-19 18:11:52 +0000[diff] [blame]39; ARM: t3:
40; ARM: pld [r0, r1, lsr #2]
Evan Chengbc7deb02010-11-03 05:14:24 +0000[diff] [blame]41
42; THUMB2: t3:
43; THUMB2: lsrs r1, r1, #2
44; THUMB2: pld [r0, r1]
45 %tmp1 = lshr i32 %offset, 2
46 %tmp2 = add i32 %base, %tmp1
47 %tmp3 = inttoptr i32 %tmp2 to i8*
48 tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
49 ret void
50}
51
52define void @t4(i32 %base, i32 %offset) nounwind {
53entry:
Bob Wilsoncd704962011-04-19 18:11:52 +0000[diff] [blame]54; ARM: t4:
55; ARM: pld [r0, r1, lsl #2]
Evan Chengbc7deb02010-11-03 05:14:24 +0000[diff] [blame]56
57; THUMB2: t4:
58; THUMB2: pld [r0, r1, lsl #2]
59 %tmp1 = shl i32 %offset, 2
60 %tmp2 = add i32 %base, %tmp1
61 %tmp3 = inttoptr i32 %tmp2 to i8*
62 tail call void @llvm.prefetch( i8* %tmp3, i32 0, i32 3 )
63 ret void
64}
65
66declare void @llvm.prefetch(i8*, i32, i32) nounwind