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Sean Callanan8ed9f512009-12-19 02:59:52 +00001/*===- X86DisassemblerDecoderInternal.h - Disassembler decoder -----*- C -*-==*
2 *
3 * The LLVM Compiler Infrastructure
4 *
5 * This file is distributed under the University of Illinois Open Source
6 * License. See LICENSE.TXT for details.
7 *
8 *===----------------------------------------------------------------------===*
9 *
10 * This file is part of the X86 Disassembler.
11 * It contains the public interface of the instruction decoder.
12 * Documentation for the disassembler can be found in X86Disassembler.h.
13 *
14 *===----------------------------------------------------------------------===*/
15
16#ifndef X86DISASSEMBLERDECODER_H
17#define X86DISASSEMBLERDECODER_H
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#define INSTRUCTION_SPECIFIER_FIELDS \
24 const char* name;
25
26#define INSTRUCTION_IDS \
Benjamin Kramer4d1dca92010-10-23 09:10:44 +000027 const InstrUID *instructionIDs;
Sean Callanan8ed9f512009-12-19 02:59:52 +000028
29#include "X86DisassemblerDecoderCommon.h"
30
31#undef INSTRUCTION_SPECIFIER_FIELDS
32#undef INSTRUCTION_IDS
33
34/*
35 * Accessor functions for various fields of an Intel instruction
36 */
Sean Callanana21e2ea2011-03-15 01:23:15 +000037#define modFromModRM(modRM) (((modRM) & 0xc0) >> 6)
38#define regFromModRM(modRM) (((modRM) & 0x38) >> 3)
39#define rmFromModRM(modRM) ((modRM) & 0x7)
40#define scaleFromSIB(sib) (((sib) & 0xc0) >> 6)
41#define indexFromSIB(sib) (((sib) & 0x38) >> 3)
42#define baseFromSIB(sib) ((sib) & 0x7)
43#define wFromREX(rex) (((rex) & 0x8) >> 3)
44#define rFromREX(rex) (((rex) & 0x4) >> 2)
45#define xFromREX(rex) (((rex) & 0x2) >> 1)
46#define bFromREX(rex) ((rex) & 0x1)
47
48#define rFromVEX2of3(vex) (((~(vex)) & 0x80) >> 7)
49#define xFromVEX2of3(vex) (((~(vex)) & 0x40) >> 6)
50#define bFromVEX2of3(vex) (((~(vex)) & 0x20) >> 5)
51#define mmmmmFromVEX2of3(vex) ((vex) & 0x1f)
52#define wFromVEX3of3(vex) (((vex) & 0x80) >> 7)
53#define vvvvFromVEX3of3(vex) (((~(vex)) & 0x78) >> 3)
54#define lFromVEX3of3(vex) (((vex) & 0x4) >> 2)
55#define ppFromVEX3of3(vex) ((vex) & 0x3)
56
57#define rFromVEX2of2(vex) (((~(vex)) & 0x80) >> 7)
58#define vvvvFromVEX2of2(vex) (((~(vex)) & 0x78) >> 3)
59#define lFromVEX2of2(vex) (((vex) & 0x4) >> 2)
60#define ppFromVEX2of2(vex) ((vex) & 0x3)
Sean Callanan8ed9f512009-12-19 02:59:52 +000061
62/*
63 * These enums represent Intel registers for use by the decoder.
64 */
65
66#define REGS_8BIT \
67 ENTRY(AL) \
68 ENTRY(CL) \
69 ENTRY(DL) \
70 ENTRY(BL) \
71 ENTRY(AH) \
72 ENTRY(CH) \
73 ENTRY(DH) \
74 ENTRY(BH) \
75 ENTRY(R8B) \
76 ENTRY(R9B) \
77 ENTRY(R10B) \
78 ENTRY(R11B) \
79 ENTRY(R12B) \
80 ENTRY(R13B) \
81 ENTRY(R14B) \
82 ENTRY(R15B) \
83 ENTRY(SPL) \
84 ENTRY(BPL) \
85 ENTRY(SIL) \
86 ENTRY(DIL)
87
88#define EA_BASES_16BIT \
89 ENTRY(BX_SI) \
90 ENTRY(BX_DI) \
91 ENTRY(BP_SI) \
92 ENTRY(BP_DI) \
93 ENTRY(SI) \
94 ENTRY(DI) \
95 ENTRY(BP) \
96 ENTRY(BX) \
97 ENTRY(R8W) \
98 ENTRY(R9W) \
99 ENTRY(R10W) \
100 ENTRY(R11W) \
101 ENTRY(R12W) \
102 ENTRY(R13W) \
103 ENTRY(R14W) \
104 ENTRY(R15W)
105
106#define REGS_16BIT \
107 ENTRY(AX) \
108 ENTRY(CX) \
109 ENTRY(DX) \
110 ENTRY(BX) \
111 ENTRY(SP) \
112 ENTRY(BP) \
113 ENTRY(SI) \
114 ENTRY(DI) \
115 ENTRY(R8W) \
116 ENTRY(R9W) \
117 ENTRY(R10W) \
118 ENTRY(R11W) \
119 ENTRY(R12W) \
120 ENTRY(R13W) \
121 ENTRY(R14W) \
122 ENTRY(R15W)
123
124#define EA_BASES_32BIT \
125 ENTRY(EAX) \
126 ENTRY(ECX) \
127 ENTRY(EDX) \
128 ENTRY(EBX) \
129 ENTRY(sib) \
130 ENTRY(EBP) \
131 ENTRY(ESI) \
132 ENTRY(EDI) \
133 ENTRY(R8D) \
134 ENTRY(R9D) \
135 ENTRY(R10D) \
136 ENTRY(R11D) \
137 ENTRY(R12D) \
138 ENTRY(R13D) \
139 ENTRY(R14D) \
140 ENTRY(R15D)
141
142#define REGS_32BIT \
143 ENTRY(EAX) \
144 ENTRY(ECX) \
145 ENTRY(EDX) \
146 ENTRY(EBX) \
147 ENTRY(ESP) \
148 ENTRY(EBP) \
149 ENTRY(ESI) \
150 ENTRY(EDI) \
151 ENTRY(R8D) \
152 ENTRY(R9D) \
153 ENTRY(R10D) \
154 ENTRY(R11D) \
155 ENTRY(R12D) \
156 ENTRY(R13D) \
157 ENTRY(R14D) \
158 ENTRY(R15D)
159
160#define EA_BASES_64BIT \
161 ENTRY(RAX) \
162 ENTRY(RCX) \
163 ENTRY(RDX) \
164 ENTRY(RBX) \
165 ENTRY(sib64) \
166 ENTRY(RBP) \
167 ENTRY(RSI) \
168 ENTRY(RDI) \
169 ENTRY(R8) \
170 ENTRY(R9) \
171 ENTRY(R10) \
172 ENTRY(R11) \
173 ENTRY(R12) \
174 ENTRY(R13) \
175 ENTRY(R14) \
176 ENTRY(R15)
177
178#define REGS_64BIT \
179 ENTRY(RAX) \
180 ENTRY(RCX) \
181 ENTRY(RDX) \
182 ENTRY(RBX) \
183 ENTRY(RSP) \
184 ENTRY(RBP) \
185 ENTRY(RSI) \
186 ENTRY(RDI) \
187 ENTRY(R8) \
188 ENTRY(R9) \
189 ENTRY(R10) \
190 ENTRY(R11) \
191 ENTRY(R12) \
192 ENTRY(R13) \
193 ENTRY(R14) \
194 ENTRY(R15)
195
196#define REGS_MMX \
197 ENTRY(MM0) \
198 ENTRY(MM1) \
199 ENTRY(MM2) \
200 ENTRY(MM3) \
201 ENTRY(MM4) \
202 ENTRY(MM5) \
203 ENTRY(MM6) \
204 ENTRY(MM7)
205
206#define REGS_XMM \
207 ENTRY(XMM0) \
208 ENTRY(XMM1) \
209 ENTRY(XMM2) \
210 ENTRY(XMM3) \
211 ENTRY(XMM4) \
212 ENTRY(XMM5) \
213 ENTRY(XMM6) \
214 ENTRY(XMM7) \
215 ENTRY(XMM8) \
216 ENTRY(XMM9) \
217 ENTRY(XMM10) \
218 ENTRY(XMM11) \
219 ENTRY(XMM12) \
220 ENTRY(XMM13) \
221 ENTRY(XMM14) \
222 ENTRY(XMM15)
Sean Callanana21e2ea2011-03-15 01:23:15 +0000223
224#define REGS_YMM \
225 ENTRY(YMM0) \
226 ENTRY(YMM1) \
227 ENTRY(YMM2) \
228 ENTRY(YMM3) \
229 ENTRY(YMM4) \
230 ENTRY(YMM5) \
231 ENTRY(YMM6) \
232 ENTRY(YMM7) \
233 ENTRY(YMM8) \
234 ENTRY(YMM9) \
235 ENTRY(YMM10) \
236 ENTRY(YMM11) \
237 ENTRY(YMM12) \
238 ENTRY(YMM13) \
239 ENTRY(YMM14) \
240 ENTRY(YMM15)
241
Sean Callanan8ed9f512009-12-19 02:59:52 +0000242#define REGS_SEGMENT \
243 ENTRY(ES) \
244 ENTRY(CS) \
245 ENTRY(SS) \
246 ENTRY(DS) \
247 ENTRY(FS) \
248 ENTRY(GS)
249
250#define REGS_DEBUG \
251 ENTRY(DR0) \
252 ENTRY(DR1) \
253 ENTRY(DR2) \
254 ENTRY(DR3) \
255 ENTRY(DR4) \
256 ENTRY(DR5) \
257 ENTRY(DR6) \
258 ENTRY(DR7)
259
Sean Callanan1a8b7892010-05-06 20:59:00 +0000260#define REGS_CONTROL \
261 ENTRY(CR0) \
262 ENTRY(CR1) \
263 ENTRY(CR2) \
264 ENTRY(CR3) \
265 ENTRY(CR4) \
266 ENTRY(CR5) \
267 ENTRY(CR6) \
268 ENTRY(CR7) \
269 ENTRY(CR8)
Sean Callanan8ed9f512009-12-19 02:59:52 +0000270
271#define ALL_EA_BASES \
272 EA_BASES_16BIT \
273 EA_BASES_32BIT \
274 EA_BASES_64BIT
275
276#define ALL_SIB_BASES \
277 REGS_32BIT \
278 REGS_64BIT
279
280#define ALL_REGS \
281 REGS_8BIT \
282 REGS_16BIT \
283 REGS_32BIT \
284 REGS_64BIT \
285 REGS_MMX \
286 REGS_XMM \
Sean Callanana21e2ea2011-03-15 01:23:15 +0000287 REGS_YMM \
Sean Callanan8ed9f512009-12-19 02:59:52 +0000288 REGS_SEGMENT \
289 REGS_DEBUG \
Sean Callanan1a8b7892010-05-06 20:59:00 +0000290 REGS_CONTROL \
Sean Callanan8ed9f512009-12-19 02:59:52 +0000291 ENTRY(RIP)
292
293/*
294 * EABase - All possible values of the base field for effective-address
295 * computations, a.k.a. the Mod and R/M fields of the ModR/M byte. We
296 * distinguish between bases (EA_BASE_*) and registers that just happen to be
297 * referred to when Mod == 0b11 (EA_REG_*).
298 */
299typedef enum {
300 EA_BASE_NONE,
301#define ENTRY(x) EA_BASE_##x,
302 ALL_EA_BASES
303#undef ENTRY
304#define ENTRY(x) EA_REG_##x,
305 ALL_REGS
306#undef ENTRY
307 EA_max
308} EABase;
309
310/*
311 * SIBIndex - All possible values of the SIB index field.
312 * Borrows entries from ALL_EA_BASES with the special case that
313 * sib is synonymous with NONE.
314 */
315typedef enum {
316 SIB_INDEX_NONE,
317#define ENTRY(x) SIB_INDEX_##x,
318 ALL_EA_BASES
319#undef ENTRY
320 SIB_INDEX_max
321} SIBIndex;
322
323/*
324 * SIBBase - All possible values of the SIB base field.
325 */
326typedef enum {
327 SIB_BASE_NONE,
328#define ENTRY(x) SIB_BASE_##x,
329 ALL_SIB_BASES
330#undef ENTRY
331 SIB_BASE_max
332} SIBBase;
333
334/*
335 * EADisplacement - Possible displacement types for effective-address
336 * computations.
337 */
338typedef enum {
339 EA_DISP_NONE,
340 EA_DISP_8,
341 EA_DISP_16,
342 EA_DISP_32
343} EADisplacement;
344
345/*
346 * Reg - All possible values of the reg field in the ModR/M byte.
347 */
348typedef enum {
Sean Callanan06b766d2009-12-22 02:07:42 +0000349#define ENTRY(x) MODRM_REG_##x,
Sean Callanan8ed9f512009-12-19 02:59:52 +0000350 ALL_REGS
351#undef ENTRY
Sean Callanan06b766d2009-12-22 02:07:42 +0000352 MODRM_REG_max
Sean Callanan8ed9f512009-12-19 02:59:52 +0000353} Reg;
354
355/*
356 * SegmentOverride - All possible segment overrides.
357 */
358typedef enum {
359 SEG_OVERRIDE_NONE,
360 SEG_OVERRIDE_CS,
361 SEG_OVERRIDE_SS,
362 SEG_OVERRIDE_DS,
363 SEG_OVERRIDE_ES,
364 SEG_OVERRIDE_FS,
365 SEG_OVERRIDE_GS,
366 SEG_OVERRIDE_max
367} SegmentOverride;
Sean Callanana21e2ea2011-03-15 01:23:15 +0000368
369/*
370 * VEXLeadingOpcodeByte - Possible values for the VEX.m-mmmm field
371 */
372
373typedef enum {
374 VEX_LOB_0F = 0x1,
375 VEX_LOB_0F38 = 0x2,
376 VEX_LOB_0F3A = 0x3
377} VEXLeadingOpcodeByte;
378
379/*
380 * VEXPrefixCode - Possible values for the VEX.pp field
381 */
382
383typedef enum {
384 VEX_PREFIX_NONE = 0x0,
385 VEX_PREFIX_66 = 0x1,
386 VEX_PREFIX_F3 = 0x2,
387 VEX_PREFIX_F2 = 0x3
388} VEXPrefixCode;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000389
390typedef uint8_t BOOL;
391
392/*
393 * byteReader_t - Type for the byte reader that the consumer must provide to
394 * the decoder. Reads a single byte from the instruction's address space.
395 * @param arg - A baton that the consumer can associate with any internal
396 * state that it needs.
397 * @param byte - A pointer to a single byte in memory that should be set to
398 * contain the value at address.
399 * @param address - The address in the instruction's address space that should
400 * be read from.
401 * @return - -1 if the byte cannot be read for any reason; 0 otherwise.
402 */
403typedef int (*byteReader_t)(void* arg, uint8_t* byte, uint64_t address);
404
405/*
406 * dlog_t - Type for the logging function that the consumer can provide to
407 * get debugging output from the decoder.
408 * @param arg - A baton that the consumer can associate with any internal
409 * state that it needs.
410 * @param log - A string that contains the message. Will be reused after
411 * the logger returns.
412 */
413typedef void (*dlog_t)(void* arg, const char *log);
414
415/*
416 * The x86 internal instruction, which is produced by the decoder.
417 */
418struct InternalInstruction {
419 /* Reader interface (C) */
420 byteReader_t reader;
421 /* Opaque value passed to the reader */
422 void* readerArg;
423 /* The address of the next byte to read via the reader */
424 uint64_t readerCursor;
425
426 /* Logger interface (C) */
427 dlog_t dlog;
428 /* Opaque value passed to the logger */
429 void* dlogArg;
430
431 /* General instruction information */
432
433 /* The mode to disassemble for (64-bit, protected, real) */
434 DisassemblerMode mode;
435 /* The start of the instruction, usable with the reader */
436 uint64_t startLocation;
437 /* The length of the instruction, in bytes */
438 size_t length;
439
440 /* Prefix state */
441
442 /* 1 if the prefix byte corresponding to the entry is present; 0 if not */
443 uint8_t prefixPresent[0x100];
444 /* contains the location (for use with the reader) of the prefix byte */
445 uint64_t prefixLocations[0x100];
Sean Callanana21e2ea2011-03-15 01:23:15 +0000446 /* The value of the VEX prefix, if present */
447 uint8_t vexPrefix[3];
448 /* The length of the VEX prefix (0 if not present) */
449 uint8_t vexSize;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000450 /* The value of the REX prefix, if present */
451 uint8_t rexPrefix;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000452 /* The location where a mandatory prefix would have to be (i.e., right before
453 the opcode, or right before the REX prefix if one is present) */
454 uint64_t necessaryPrefixLocation;
455 /* The segment override type */
456 SegmentOverride segmentOverride;
457
Sean Callanan89e59e62011-02-21 21:55:05 +0000458 /* Sizes of various critical pieces of data, in bytes */
Sean Callanan8ed9f512009-12-19 02:59:52 +0000459 uint8_t registerSize;
460 uint8_t addressSize;
461 uint8_t displacementSize;
462 uint8_t immediateSize;
463
464 /* opcode state */
465
466 /* The value of the two-byte escape prefix (usually 0x0f) */
467 uint8_t twoByteEscape;
468 /* The value of the three-byte escape prefix (usually 0x38 or 0x3a) */
469 uint8_t threeByteEscape;
470 /* The last byte of the opcode, not counting any ModR/M extension */
471 uint8_t opcode;
472 /* The ModR/M byte of the instruction, if it is an opcode extension */
473 uint8_t modRMExtension;
474
475 /* decode state */
476
477 /* The type of opcode, used for indexing into the array of decode tables */
478 OpcodeType opcodeType;
479 /* The instruction ID, extracted from the decode table */
480 uint16_t instructionID;
481 /* The specifier for the instruction, from the instruction info table */
Benjamin Kramer4d1dca92010-10-23 09:10:44 +0000482 const struct InstructionSpecifier *spec;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000483
484 /* state for additional bytes, consumed during operand decode. Pattern:
485 consumed___ indicates that the byte was already consumed and does not
486 need to be consumed again */
Sean Callanana21e2ea2011-03-15 01:23:15 +0000487
488 /* The VEX.vvvv field, which contains a thrid register operand for some AVX
489 instructions */
490 Reg vvvv;
Sean Callanan8ed9f512009-12-19 02:59:52 +0000491
492 /* The ModR/M byte, which contains most register operands and some portion of
493 all memory operands */
494 BOOL consumedModRM;
495 uint8_t modRM;
496
497 /* The SIB byte, used for more complex 32- or 64-bit memory operands */
498 BOOL consumedSIB;
499 uint8_t sib;
500
501 /* The displacement, used for memory operands */
502 BOOL consumedDisplacement;
503 int32_t displacement;
504
505 /* Immediates. There can be two in some cases */
506 uint8_t numImmediatesConsumed;
507 uint8_t numImmediatesTranslated;
508 uint64_t immediates[2];
509
510 /* A register or immediate operand encoded into the opcode */
511 BOOL consumedOpcodeModifier;
512 uint8_t opcodeModifier;
513 Reg opcodeRegister;
514
515 /* Portions of the ModR/M byte */
516
517 /* These fields determine the allowable values for the ModR/M fields, which
518 depend on operand and address widths */
519 EABase eaBaseBase;
520 EABase eaRegBase;
521 Reg regBase;
522
523 /* The Mod and R/M fields can encode a base for an effective address, or a
524 register. These are separated into two fields here */
525 EABase eaBase;
526 EADisplacement eaDisplacement;
527 /* The reg field always encodes a register */
528 Reg reg;
529
530 /* SIB state */
531 SIBIndex sibIndex;
532 uint8_t sibScale;
533 SIBBase sibBase;
534};
535
536/* decodeInstruction - Decode one instruction and store the decoding results in
537 * a buffer provided by the consumer.
538 * @param insn - The buffer to store the instruction in. Allocated by the
539 * consumer.
540 * @param reader - The byteReader_t for the bytes to be read.
541 * @param readerArg - An argument to pass to the reader for storing context
542 * specific to the consumer. May be NULL.
543 * @param logger - The dlog_t to be used in printing status messages from the
544 * disassembler. May be NULL.
545 * @param loggerArg - An argument to pass to the logger for storing context
546 * specific to the logger. May be NULL.
547 * @param startLoc - The address (in the reader's address space) of the first
548 * byte in the instruction.
549 * @param mode - The mode (16-bit, 32-bit, 64-bit) to decode in.
550 * @return - Nonzero if there was an error during decode, 0 otherwise.
551 */
552int decodeInstruction(struct InternalInstruction* insn,
553 byteReader_t reader,
554 void* readerArg,
555 dlog_t logger,
556 void* loggerArg,
557 uint64_t startLoc,
558 DisassemblerMode mode);
559
Sean Callanana144c3f2010-04-02 21:23:51 +0000560/* x86DisassemblerDebug - C-accessible function for printing a message to
561 * debugs()
562 * @param file - The name of the file printing the debug message.
563 * @param line - The line number that printed the debug message.
564 * @param s - The message to print.
565 */
566
567void x86DisassemblerDebug(const char *file,
568 unsigned line,
569 const char *s);
570
Sean Callanan8ed9f512009-12-19 02:59:52 +0000571#ifdef __cplusplus
572}
573#endif
574
575#endif