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gerrit-public.fairphone.software / platform / external / llvm / ad2d46d0a5a3e8593a2754b618acd6e9cfe39453 / . / test / CodeGen / ARM / atomic-op.ll
blob: 02ce5a14691ad4e91882aa9014f28ff32c9f23fb [file] [log] [blame]
Jakob Stoklund Olesen9b0e1e72011-09-06 17:40:35 +0000[diff] [blame]1; RUN: llc < %s -mtriple=armv7-apple-darwin10 -verify-machineinstrs | FileCheck %s
2; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -verify-machineinstrs | FileCheck %s
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]3
4define void @func(i32 %argc, i8** %argv) nounwind {
5entry:
6 %argc.addr = alloca i32 ; <i32*> [#uses=1]
7 %argv.addr = alloca i8** ; <i8***> [#uses=1]
8 %val1 = alloca i32 ; <i32*> [#uses=2]
9 %val2 = alloca i32 ; <i32*> [#uses=15]
10 %andt = alloca i32 ; <i32*> [#uses=2]
11 %ort = alloca i32 ; <i32*> [#uses=2]
12 %xort = alloca i32 ; <i32*> [#uses=2]
13 %old = alloca i32 ; <i32*> [#uses=18]
14 %temp = alloca i32 ; <i32*> [#uses=2]
15 store i32 %argc, i32* %argc.addr
16 store i8** %argv, i8*** %argv.addr
17 store i32 0, i32* %val1
18 store i32 31, i32* %val2
19 store i32 3855, i32* %andt
20 store i32 3855, i32* %ort
21 store i32 3855, i32* %xort
22 store i32 4, i32* %temp
23 %tmp = load i32* %temp
24 ; CHECK: ldrex
25 ; CHECK: add
26 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]27 %0 = atomicrmw add i32* %val1, i32 %tmp monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]28 store i32 %0, i32* %old
29 ; CHECK: ldrex
30 ; CHECK: sub
31 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]32 %1 = atomicrmw sub i32* %val2, i32 30 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]33 store i32 %1, i32* %old
34 ; CHECK: ldrex
35 ; CHECK: add
36 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]37 %2 = atomicrmw add i32* %val2, i32 1 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]38 store i32 %2, i32* %old
39 ; CHECK: ldrex
40 ; CHECK: sub
41 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]42 %3 = atomicrmw sub i32* %val2, i32 1 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]43 store i32 %3, i32* %old
44 ; CHECK: ldrex
45 ; CHECK: and
46 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]47 %4 = atomicrmw and i32* %andt, i32 4080 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]48 store i32 %4, i32* %old
49 ; CHECK: ldrex
50 ; CHECK: or
51 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]52 %5 = atomicrmw or i32* %ort, i32 4080 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]53 store i32 %5, i32* %old
54 ; CHECK: ldrex
55 ; CHECK: eor
56 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]57 %6 = atomicrmw xor i32* %xort, i32 4080 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]58 store i32 %6, i32* %old
59 ; CHECK: ldrex
60 ; CHECK: cmp
61 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]62 %7 = atomicrmw min i32* %val2, i32 16 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]63 store i32 %7, i32* %old
64 %neg = sub i32 0, 1 ; <i32> [#uses=1]
65 ; CHECK: ldrex
66 ; CHECK: cmp
67 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]68 %8 = atomicrmw min i32* %val2, i32 %neg monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]69 store i32 %8, i32* %old
70 ; CHECK: ldrex
71 ; CHECK: cmp
72 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]73 %9 = atomicrmw max i32* %val2, i32 1 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]74 store i32 %9, i32* %old
75 ; CHECK: ldrex
76 ; CHECK: cmp
77 ; CHECK: strex
Eli Friedmanad2d46d2011-09-26 20:27:49 +0000[diff] [blame^]78 %10 = atomicrmw max i32* %val2, i32 0 monotonic
Cameron Zwarichde64aaf2011-05-27 23:54:00 +0000[diff] [blame]79 store i32 %10, i32* %old
80 ret void
81}