Chris Lattner | c6d0567 | 2006-05-23 23:20:42 +0000 | [diff] [blame] | 1 | //===-- X86ISelLowering.cpp - X86 DAG Lowering Implementation -------------===// |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by Chris Lattner and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file defines the interfaces that X86 uses to lower LLVM code into a |
| 11 | // selection DAG. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | #include "X86.h" |
Evan Cheng | 0cc3945 | 2006-01-16 21:21:29 +0000 | [diff] [blame] | 16 | #include "X86InstrBuilder.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 17 | #include "X86ISelLowering.h" |
Evan Cheng | e8bd0a3 | 2006-06-06 23:30:24 +0000 | [diff] [blame] | 18 | #include "X86MachineFunctionInfo.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 19 | #include "X86TargetMachine.h" |
| 20 | #include "llvm/CallingConv.h" |
Evan Cheng | 223547a | 2006-01-31 22:28:30 +0000 | [diff] [blame] | 21 | #include "llvm/Constants.h" |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 22 | #include "llvm/DerivedTypes.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 23 | #include "llvm/Function.h" |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 24 | #include "llvm/Intrinsics.h" |
Evan Cheng | 30b37b5 | 2006-03-13 23:18:16 +0000 | [diff] [blame] | 25 | #include "llvm/ADT/VectorExtras.h" |
| 26 | #include "llvm/Analysis/ScalarEvolutionExpressions.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 27 | #include "llvm/CodeGen/MachineFrameInfo.h" |
Evan Cheng | 4a46080 | 2006-01-11 00:33:36 +0000 | [diff] [blame] | 28 | #include "llvm/CodeGen/MachineFunction.h" |
| 29 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 30 | #include "llvm/CodeGen/SelectionDAG.h" |
| 31 | #include "llvm/CodeGen/SSARegMap.h" |
Evan Cheng | ef6ffb1 | 2006-01-31 03:14:29 +0000 | [diff] [blame] | 32 | #include "llvm/Support/MathExtras.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 33 | #include "llvm/Target/TargetOptions.h" |
Evan Cheng | e111303 | 2006-10-04 18:33:38 +0000 | [diff] [blame] | 34 | #include "llvm/Support/CommandLine.h" |
Chris Lattner | 1a60aa7 | 2006-10-31 19:42:44 +0000 | [diff] [blame] | 35 | #include "llvm/ADT/StringExtras.h" |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 36 | using namespace llvm; |
| 37 | |
| 38 | // FIXME: temporary. |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 39 | static cl::opt<bool> EnableFastCC("enable-x86-fastcc", cl::Hidden, |
| 40 | cl::desc("Enable fastcc on X86")); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 41 | X86TargetLowering::X86TargetLowering(TargetMachine &TM) |
| 42 | : TargetLowering(TM) { |
Evan Cheng | 559806f | 2006-01-27 08:10:46 +0000 | [diff] [blame] | 43 | Subtarget = &TM.getSubtarget<X86Subtarget>(); |
| 44 | X86ScalarSSE = Subtarget->hasSSE2(); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 45 | X86StackPtr = Subtarget->is64Bit() ? X86::RSP : X86::ESP; |
Evan Cheng | 559806f | 2006-01-27 08:10:46 +0000 | [diff] [blame] | 46 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 47 | // Set up the TargetLowering object. |
| 48 | |
| 49 | // X86 is weird, it always uses i8 for shift amounts and setcc results. |
| 50 | setShiftAmountType(MVT::i8); |
| 51 | setSetCCResultType(MVT::i8); |
| 52 | setSetCCResultContents(ZeroOrOneSetCCResult); |
Evan Cheng | 0b2afbd | 2006-01-25 09:15:17 +0000 | [diff] [blame] | 53 | setSchedulingPreference(SchedulingForRegPressure); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 54 | setShiftAmountFlavor(Mask); // shl X, 32 == shl X, 0 |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 55 | setStackPointerRegisterToSaveRestore(X86StackPtr); |
Evan Cheng | 714554d | 2006-03-16 21:47:42 +0000 | [diff] [blame] | 56 | |
Evan Cheng | a88973f | 2006-03-22 19:22:18 +0000 | [diff] [blame] | 57 | if (!Subtarget->isTargetDarwin()) |
Evan Cheng | df57fa0 | 2006-03-17 20:31:41 +0000 | [diff] [blame] | 58 | // Darwin should use _setjmp/_longjmp instead of setjmp/longjmp. |
| 59 | setUseUnderscoreSetJmpLongJmp(true); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 60 | |
Evan Cheng | 714554d | 2006-03-16 21:47:42 +0000 | [diff] [blame] | 61 | // Add legal addressing mode scale values. |
| 62 | addLegalAddressScale(8); |
| 63 | addLegalAddressScale(4); |
| 64 | addLegalAddressScale(2); |
| 65 | // Enter the ones which require both scale + index last. These are more |
| 66 | // expensive. |
| 67 | addLegalAddressScale(9); |
| 68 | addLegalAddressScale(5); |
| 69 | addLegalAddressScale(3); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 70 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 71 | // Set up the register classes. |
Evan Cheng | 069287d | 2006-05-16 07:21:53 +0000 | [diff] [blame] | 72 | addRegisterClass(MVT::i8, X86::GR8RegisterClass); |
| 73 | addRegisterClass(MVT::i16, X86::GR16RegisterClass); |
| 74 | addRegisterClass(MVT::i32, X86::GR32RegisterClass); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 75 | if (Subtarget->is64Bit()) |
| 76 | addRegisterClass(MVT::i64, X86::GR64RegisterClass); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 77 | |
Evan Cheng | c548428 | 2006-10-04 00:56:09 +0000 | [diff] [blame] | 78 | setLoadXAction(ISD::SEXTLOAD, MVT::i1, Expand); |
| 79 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 80 | // Promote all UINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have this |
| 81 | // operation. |
| 82 | setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote); |
| 83 | setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote); |
| 84 | setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote); |
Evan Cheng | 6892f28 | 2006-01-17 02:32:49 +0000 | [diff] [blame] | 85 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 86 | if (Subtarget->is64Bit()) { |
| 87 | setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Expand); |
Evan Cheng | 6892f28 | 2006-01-17 02:32:49 +0000 | [diff] [blame] | 88 | setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 89 | } else { |
| 90 | if (X86ScalarSSE) |
| 91 | // If SSE i64 SINT_TO_FP is not available, expand i32 UINT_TO_FP. |
| 92 | setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Expand); |
| 93 | else |
| 94 | setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); |
| 95 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 96 | |
| 97 | // Promote i1/i8 SINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have |
| 98 | // this operation. |
| 99 | setOperationAction(ISD::SINT_TO_FP , MVT::i1 , Promote); |
| 100 | setOperationAction(ISD::SINT_TO_FP , MVT::i8 , Promote); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 101 | // SSE has no i16 to fp conversion, only i32 |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 102 | if (X86ScalarSSE) |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 103 | setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote); |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 104 | else { |
| 105 | setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Custom); |
| 106 | setOperationAction(ISD::SINT_TO_FP , MVT::i32 , Custom); |
| 107 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 108 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 109 | if (!Subtarget->is64Bit()) { |
| 110 | // Custom lower SINT_TO_FP and FP_TO_SINT from/to i64 in 32-bit mode. |
| 111 | setOperationAction(ISD::SINT_TO_FP , MVT::i64 , Custom); |
| 112 | setOperationAction(ISD::FP_TO_SINT , MVT::i64 , Custom); |
| 113 | } |
Evan Cheng | 6dab053 | 2006-01-30 08:02:57 +0000 | [diff] [blame] | 114 | |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 115 | // Promote i1/i8 FP_TO_SINT to larger FP_TO_SINTS's, as X86 doesn't have |
| 116 | // this operation. |
| 117 | setOperationAction(ISD::FP_TO_SINT , MVT::i1 , Promote); |
| 118 | setOperationAction(ISD::FP_TO_SINT , MVT::i8 , Promote); |
| 119 | |
| 120 | if (X86ScalarSSE) { |
| 121 | setOperationAction(ISD::FP_TO_SINT , MVT::i16 , Promote); |
| 122 | } else { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 123 | setOperationAction(ISD::FP_TO_SINT , MVT::i16 , Custom); |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 124 | setOperationAction(ISD::FP_TO_SINT , MVT::i32 , Custom); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | // Handle FP_TO_UINT by promoting the destination to a larger signed |
| 128 | // conversion. |
| 129 | setOperationAction(ISD::FP_TO_UINT , MVT::i1 , Promote); |
| 130 | setOperationAction(ISD::FP_TO_UINT , MVT::i8 , Promote); |
| 131 | setOperationAction(ISD::FP_TO_UINT , MVT::i16 , Promote); |
| 132 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 133 | if (Subtarget->is64Bit()) { |
| 134 | setOperationAction(ISD::FP_TO_UINT , MVT::i64 , Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 135 | setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 136 | } else { |
| 137 | if (X86ScalarSSE && !Subtarget->hasSSE3()) |
| 138 | // Expand FP_TO_UINT into a select. |
| 139 | // FIXME: We would like to use a Custom expander here eventually to do |
| 140 | // the optimal thing for SSE vs. the default expansion in the legalizer. |
| 141 | setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Expand); |
| 142 | else |
| 143 | // With SSE3 we can use fisttpll to convert to a signed i64. |
| 144 | setOperationAction(ISD::FP_TO_UINT , MVT::i32 , Promote); |
| 145 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 146 | |
Evan Cheng | 02568ff | 2006-01-30 22:13:22 +0000 | [diff] [blame] | 147 | setOperationAction(ISD::BIT_CONVERT , MVT::f32 , Expand); |
| 148 | setOperationAction(ISD::BIT_CONVERT , MVT::i32 , Expand); |
Chris Lattner | 21f6685 | 2005-12-23 05:15:23 +0000 | [diff] [blame] | 149 | |
Evan Cheng | c35497f | 2006-10-30 08:02:39 +0000 | [diff] [blame] | 150 | setOperationAction(ISD::BR_JT , MVT::Other, Expand); |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 151 | setOperationAction(ISD::BRCOND , MVT::Other, Custom); |
Nate Begeman | 750ac1b | 2006-02-01 07:19:44 +0000 | [diff] [blame] | 152 | setOperationAction(ISD::BR_CC , MVT::Other, Expand); |
| 153 | setOperationAction(ISD::SELECT_CC , MVT::Other, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 154 | setOperationAction(ISD::MEMMOVE , MVT::Other, Expand); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 155 | if (Subtarget->is64Bit()) |
| 156 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i32, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 157 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand); |
Chris Lattner | e80242a | 2005-12-07 17:59:14 +0000 | [diff] [blame] | 158 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 159 | setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); |
| 160 | setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 161 | setOperationAction(ISD::FREM , MVT::f64 , Expand); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 162 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 163 | setOperationAction(ISD::CTPOP , MVT::i8 , Expand); |
| 164 | setOperationAction(ISD::CTTZ , MVT::i8 , Expand); |
| 165 | setOperationAction(ISD::CTLZ , MVT::i8 , Expand); |
| 166 | setOperationAction(ISD::CTPOP , MVT::i16 , Expand); |
| 167 | setOperationAction(ISD::CTTZ , MVT::i16 , Expand); |
| 168 | setOperationAction(ISD::CTLZ , MVT::i16 , Expand); |
| 169 | setOperationAction(ISD::CTPOP , MVT::i32 , Expand); |
| 170 | setOperationAction(ISD::CTTZ , MVT::i32 , Expand); |
| 171 | setOperationAction(ISD::CTLZ , MVT::i32 , Expand); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 172 | if (Subtarget->is64Bit()) { |
| 173 | setOperationAction(ISD::CTPOP , MVT::i64 , Expand); |
| 174 | setOperationAction(ISD::CTTZ , MVT::i64 , Expand); |
| 175 | setOperationAction(ISD::CTLZ , MVT::i64 , Expand); |
| 176 | } |
| 177 | |
Andrew Lenharth | b873ff3 | 2005-11-20 21:41:10 +0000 | [diff] [blame] | 178 | setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom); |
Nate Begeman | d88fc03 | 2006-01-14 03:14:10 +0000 | [diff] [blame] | 179 | setOperationAction(ISD::BSWAP , MVT::i16 , Expand); |
Nate Begeman | 35ef913 | 2006-01-11 21:21:00 +0000 | [diff] [blame] | 180 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 181 | // These should be promoted to a larger select which is supported. |
| 182 | setOperationAction(ISD::SELECT , MVT::i1 , Promote); |
| 183 | setOperationAction(ISD::SELECT , MVT::i8 , Promote); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 184 | // X86 wants to expand cmov itself. |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 185 | setOperationAction(ISD::SELECT , MVT::i16 , Custom); |
| 186 | setOperationAction(ISD::SELECT , MVT::i32 , Custom); |
| 187 | setOperationAction(ISD::SELECT , MVT::f32 , Custom); |
| 188 | setOperationAction(ISD::SELECT , MVT::f64 , Custom); |
| 189 | setOperationAction(ISD::SETCC , MVT::i8 , Custom); |
| 190 | setOperationAction(ISD::SETCC , MVT::i16 , Custom); |
| 191 | setOperationAction(ISD::SETCC , MVT::i32 , Custom); |
| 192 | setOperationAction(ISD::SETCC , MVT::f32 , Custom); |
| 193 | setOperationAction(ISD::SETCC , MVT::f64 , Custom); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 194 | if (Subtarget->is64Bit()) { |
| 195 | setOperationAction(ISD::SELECT , MVT::i64 , Custom); |
| 196 | setOperationAction(ISD::SETCC , MVT::i64 , Custom); |
| 197 | } |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 198 | // X86 ret instruction may pop stack. |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 199 | setOperationAction(ISD::RET , MVT::Other, Custom); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 200 | // Darwin ABI issue. |
Evan Cheng | 7ccced6 | 2006-02-18 00:15:05 +0000 | [diff] [blame] | 201 | setOperationAction(ISD::ConstantPool , MVT::i32 , Custom); |
Nate Begeman | 37efe67 | 2006-04-22 18:53:45 +0000 | [diff] [blame] | 202 | setOperationAction(ISD::JumpTable , MVT::i32 , Custom); |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 203 | setOperationAction(ISD::GlobalAddress , MVT::i32 , Custom); |
Evan Cheng | 020d2e8 | 2006-02-23 20:41:18 +0000 | [diff] [blame] | 204 | setOperationAction(ISD::ExternalSymbol , MVT::i32 , Custom); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 205 | if (Subtarget->is64Bit()) { |
| 206 | setOperationAction(ISD::ConstantPool , MVT::i64 , Custom); |
| 207 | setOperationAction(ISD::JumpTable , MVT::i64 , Custom); |
| 208 | setOperationAction(ISD::GlobalAddress , MVT::i64 , Custom); |
| 209 | setOperationAction(ISD::ExternalSymbol, MVT::i64 , Custom); |
| 210 | } |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 211 | // 64-bit addm sub, shl, sra, srl (iff 32-bit x86) |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 212 | setOperationAction(ISD::SHL_PARTS , MVT::i32 , Custom); |
| 213 | setOperationAction(ISD::SRA_PARTS , MVT::i32 , Custom); |
| 214 | setOperationAction(ISD::SRL_PARTS , MVT::i32 , Custom); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 215 | // X86 wants to expand memset / memcpy itself. |
Evan Cheng | 5298bcc | 2006-02-17 07:01:52 +0000 | [diff] [blame] | 216 | setOperationAction(ISD::MEMSET , MVT::Other, Custom); |
| 217 | setOperationAction(ISD::MEMCPY , MVT::Other, Custom); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 218 | |
Chris Lattner | f73bae1 | 2005-11-29 06:16:21 +0000 | [diff] [blame] | 219 | // We don't have line number support yet. |
| 220 | setOperationAction(ISD::LOCATION, MVT::Other, Expand); |
Jim Laskey | e0bce71 | 2006-01-05 01:47:43 +0000 | [diff] [blame] | 221 | setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); |
Evan Cheng | 3c992d2 | 2006-03-07 02:02:57 +0000 | [diff] [blame] | 222 | // FIXME - use subtarget debug flags |
Anton Korobeynikov | ab4022f | 2006-10-31 08:31:24 +0000 | [diff] [blame] | 223 | if (!Subtarget->isTargetDarwin() && |
| 224 | !Subtarget->isTargetELF() && |
| 225 | !Subtarget->isTargetCygwin()) |
Evan Cheng | 3c992d2 | 2006-03-07 02:02:57 +0000 | [diff] [blame] | 226 | setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); |
Chris Lattner | f73bae1 | 2005-11-29 06:16:21 +0000 | [diff] [blame] | 227 | |
Nate Begeman | acc398c | 2006-01-25 18:21:52 +0000 | [diff] [blame] | 228 | // VASTART needs to be custom lowered to use the VarArgsFrameIndex |
| 229 | setOperationAction(ISD::VASTART , MVT::Other, Custom); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 230 | |
Nate Begeman | acc398c | 2006-01-25 18:21:52 +0000 | [diff] [blame] | 231 | // Use the default implementation. |
| 232 | setOperationAction(ISD::VAARG , MVT::Other, Expand); |
| 233 | setOperationAction(ISD::VACOPY , MVT::Other, Expand); |
| 234 | setOperationAction(ISD::VAEND , MVT::Other, Expand); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 235 | setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); |
Chris Lattner | e112552 | 2006-01-15 09:00:21 +0000 | [diff] [blame] | 236 | setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 237 | if (Subtarget->is64Bit()) |
| 238 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i64, Expand); |
Chris Lattner | e112552 | 2006-01-15 09:00:21 +0000 | [diff] [blame] | 239 | setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Expand); |
Chris Lattner | b99329e | 2006-01-13 02:42:53 +0000 | [diff] [blame] | 240 | |
Chris Lattner | 9601a86 | 2006-03-05 05:08:37 +0000 | [diff] [blame] | 241 | setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand); |
| 242 | setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand); |
| 243 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 244 | if (X86ScalarSSE) { |
| 245 | // Set up the FP register classes. |
Evan Cheng | 5ee4ccc | 2006-01-12 08:27:59 +0000 | [diff] [blame] | 246 | addRegisterClass(MVT::f32, X86::FR32RegisterClass); |
| 247 | addRegisterClass(MVT::f64, X86::FR64RegisterClass); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 248 | |
Evan Cheng | 223547a | 2006-01-31 22:28:30 +0000 | [diff] [blame] | 249 | // Use ANDPD to simulate FABS. |
| 250 | setOperationAction(ISD::FABS , MVT::f64, Custom); |
| 251 | setOperationAction(ISD::FABS , MVT::f32, Custom); |
| 252 | |
| 253 | // Use XORP to simulate FNEG. |
| 254 | setOperationAction(ISD::FNEG , MVT::f64, Custom); |
| 255 | setOperationAction(ISD::FNEG , MVT::f32, Custom); |
| 256 | |
Evan Cheng | d25e9e8 | 2006-02-02 00:28:23 +0000 | [diff] [blame] | 257 | // We don't support sin/cos/fmod |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 258 | setOperationAction(ISD::FSIN , MVT::f64, Expand); |
| 259 | setOperationAction(ISD::FCOS , MVT::f64, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 260 | setOperationAction(ISD::FREM , MVT::f64, Expand); |
| 261 | setOperationAction(ISD::FSIN , MVT::f32, Expand); |
| 262 | setOperationAction(ISD::FCOS , MVT::f32, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 263 | setOperationAction(ISD::FREM , MVT::f32, Expand); |
| 264 | |
Chris Lattner | a54aa94 | 2006-01-29 06:26:08 +0000 | [diff] [blame] | 265 | // Expand FP immediates into loads from the stack, except for the special |
| 266 | // cases we handle. |
| 267 | setOperationAction(ISD::ConstantFP, MVT::f64, Expand); |
| 268 | setOperationAction(ISD::ConstantFP, MVT::f32, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 269 | addLegalFPImmediate(+0.0); // xorps / xorpd |
| 270 | } else { |
| 271 | // Set up the FP register classes. |
| 272 | addRegisterClass(MVT::f64, X86::RFPRegisterClass); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 273 | |
Chris Lattner | 44d9b9b | 2006-01-29 06:44:22 +0000 | [diff] [blame] | 274 | setOperationAction(ISD::UNDEF, MVT::f64, Expand); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 275 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 276 | if (!UnsafeFPMath) { |
| 277 | setOperationAction(ISD::FSIN , MVT::f64 , Expand); |
| 278 | setOperationAction(ISD::FCOS , MVT::f64 , Expand); |
| 279 | } |
| 280 | |
Chris Lattner | a54aa94 | 2006-01-29 06:26:08 +0000 | [diff] [blame] | 281 | setOperationAction(ISD::ConstantFP, MVT::f64, Expand); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 282 | addLegalFPImmediate(+0.0); // FLD0 |
| 283 | addLegalFPImmediate(+1.0); // FLD1 |
| 284 | addLegalFPImmediate(-0.0); // FLD0/FCHS |
| 285 | addLegalFPImmediate(-1.0); // FLD1/FCHS |
| 286 | } |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 287 | |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 288 | // First set operation action for all vector types to expand. Then we |
| 289 | // will selectively turn on ones that can be effectively codegen'd. |
| 290 | for (unsigned VT = (unsigned)MVT::Vector + 1; |
| 291 | VT != (unsigned)MVT::LAST_VALUETYPE; VT++) { |
| 292 | setOperationAction(ISD::ADD , (MVT::ValueType)VT, Expand); |
| 293 | setOperationAction(ISD::SUB , (MVT::ValueType)VT, Expand); |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 294 | setOperationAction(ISD::FADD, (MVT::ValueType)VT, Expand); |
| 295 | setOperationAction(ISD::FSUB, (MVT::ValueType)VT, Expand); |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 296 | setOperationAction(ISD::MUL , (MVT::ValueType)VT, Expand); |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 297 | setOperationAction(ISD::FMUL, (MVT::ValueType)VT, Expand); |
| 298 | setOperationAction(ISD::SDIV, (MVT::ValueType)VT, Expand); |
| 299 | setOperationAction(ISD::UDIV, (MVT::ValueType)VT, Expand); |
| 300 | setOperationAction(ISD::FDIV, (MVT::ValueType)VT, Expand); |
| 301 | setOperationAction(ISD::SREM, (MVT::ValueType)VT, Expand); |
| 302 | setOperationAction(ISD::UREM, (MVT::ValueType)VT, Expand); |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 303 | setOperationAction(ISD::LOAD, (MVT::ValueType)VT, Expand); |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 304 | setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Expand); |
Chris Lattner | 9b3bd46 | 2006-03-21 20:51:05 +0000 | [diff] [blame] | 305 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Expand); |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 306 | setOperationAction(ISD::INSERT_VECTOR_ELT, (MVT::ValueType)VT, Expand); |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 307 | } |
| 308 | |
Evan Cheng | a88973f | 2006-03-22 19:22:18 +0000 | [diff] [blame] | 309 | if (Subtarget->hasMMX()) { |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 310 | addRegisterClass(MVT::v8i8, X86::VR64RegisterClass); |
| 311 | addRegisterClass(MVT::v4i16, X86::VR64RegisterClass); |
| 312 | addRegisterClass(MVT::v2i32, X86::VR64RegisterClass); |
| 313 | |
Evan Cheng | d30bf01 | 2006-03-01 01:11:20 +0000 | [diff] [blame] | 314 | // FIXME: add MMX packed arithmetics |
Evan Cheng | 48090aa | 2006-03-21 23:01:21 +0000 | [diff] [blame] | 315 | setOperationAction(ISD::BUILD_VECTOR, MVT::v8i8, Expand); |
| 316 | setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Expand); |
| 317 | setOperationAction(ISD::BUILD_VECTOR, MVT::v2i32, Expand); |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 318 | } |
| 319 | |
Evan Cheng | a88973f | 2006-03-22 19:22:18 +0000 | [diff] [blame] | 320 | if (Subtarget->hasSSE1()) { |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 321 | addRegisterClass(MVT::v4f32, X86::VR128RegisterClass); |
| 322 | |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 323 | setOperationAction(ISD::FADD, MVT::v4f32, Legal); |
| 324 | setOperationAction(ISD::FSUB, MVT::v4f32, Legal); |
| 325 | setOperationAction(ISD::FMUL, MVT::v4f32, Legal); |
| 326 | setOperationAction(ISD::FDIV, MVT::v4f32, Legal); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 327 | setOperationAction(ISD::LOAD, MVT::v4f32, Legal); |
| 328 | setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom); |
| 329 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f32, Custom); |
Evan Cheng | 11e15b3 | 2006-04-03 20:53:28 +0000 | [diff] [blame] | 330 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 331 | setOperationAction(ISD::SELECT, MVT::v4f32, Custom); |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 332 | } |
| 333 | |
Evan Cheng | a88973f | 2006-03-22 19:22:18 +0000 | [diff] [blame] | 334 | if (Subtarget->hasSSE2()) { |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 335 | addRegisterClass(MVT::v2f64, X86::VR128RegisterClass); |
| 336 | addRegisterClass(MVT::v16i8, X86::VR128RegisterClass); |
| 337 | addRegisterClass(MVT::v8i16, X86::VR128RegisterClass); |
| 338 | addRegisterClass(MVT::v4i32, X86::VR128RegisterClass); |
| 339 | addRegisterClass(MVT::v2i64, X86::VR128RegisterClass); |
| 340 | |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 341 | setOperationAction(ISD::ADD, MVT::v16i8, Legal); |
| 342 | setOperationAction(ISD::ADD, MVT::v8i16, Legal); |
| 343 | setOperationAction(ISD::ADD, MVT::v4i32, Legal); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 344 | setOperationAction(ISD::SUB, MVT::v16i8, Legal); |
| 345 | setOperationAction(ISD::SUB, MVT::v8i16, Legal); |
| 346 | setOperationAction(ISD::SUB, MVT::v4i32, Legal); |
Evan Cheng | f998984 | 2006-04-13 05:10:25 +0000 | [diff] [blame] | 347 | setOperationAction(ISD::MUL, MVT::v8i16, Legal); |
Evan Cheng | 6bdb3f6 | 2006-10-27 18:49:08 +0000 | [diff] [blame] | 348 | setOperationAction(ISD::FADD, MVT::v2f64, Legal); |
| 349 | setOperationAction(ISD::FSUB, MVT::v2f64, Legal); |
| 350 | setOperationAction(ISD::FMUL, MVT::v2f64, Legal); |
| 351 | setOperationAction(ISD::FDIV, MVT::v2f64, Legal); |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 352 | |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 353 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v16i8, Custom); |
| 354 | setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v8i16, Custom); |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 355 | setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom); |
Evan Cheng | 5edb8d2 | 2006-04-17 22:04:06 +0000 | [diff] [blame] | 356 | setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i32, Custom); |
| 357 | // Implement v4f32 insert_vector_elt in terms of SSE2 v8i16 ones. |
| 358 | setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f32, Custom); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 359 | |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 360 | // Custom lower build_vector, vector_shuffle, and extract_vector_elt. |
| 361 | for (unsigned VT = (unsigned)MVT::v16i8; VT != (unsigned)MVT::v2i64; VT++) { |
| 362 | setOperationAction(ISD::BUILD_VECTOR, (MVT::ValueType)VT, Custom); |
| 363 | setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Custom); |
| 364 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Custom); |
| 365 | } |
| 366 | setOperationAction(ISD::BUILD_VECTOR, MVT::v2f64, Custom); |
| 367 | setOperationAction(ISD::BUILD_VECTOR, MVT::v2i64, Custom); |
| 368 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Custom); |
| 369 | setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Custom); |
| 370 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f64, Custom); |
| 371 | setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i64, Custom); |
| 372 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 373 | // Promote v16i8, v8i16, v4i32 load, select, and, or, xor to v2i64. |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 374 | for (unsigned VT = (unsigned)MVT::v16i8; VT != (unsigned)MVT::v2i64; VT++) { |
| 375 | setOperationAction(ISD::AND, (MVT::ValueType)VT, Promote); |
| 376 | AddPromotedToType (ISD::AND, (MVT::ValueType)VT, MVT::v2i64); |
| 377 | setOperationAction(ISD::OR, (MVT::ValueType)VT, Promote); |
| 378 | AddPromotedToType (ISD::OR, (MVT::ValueType)VT, MVT::v2i64); |
| 379 | setOperationAction(ISD::XOR, (MVT::ValueType)VT, Promote); |
| 380 | AddPromotedToType (ISD::XOR, (MVT::ValueType)VT, MVT::v2i64); |
Evan Cheng | 91b740d | 2006-04-12 17:12:36 +0000 | [diff] [blame] | 381 | setOperationAction(ISD::LOAD, (MVT::ValueType)VT, Promote); |
| 382 | AddPromotedToType (ISD::LOAD, (MVT::ValueType)VT, MVT::v2i64); |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 383 | setOperationAction(ISD::SELECT, (MVT::ValueType)VT, Promote); |
| 384 | AddPromotedToType (ISD::SELECT, (MVT::ValueType)VT, MVT::v2i64); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 385 | } |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 386 | |
| 387 | // Custom lower v2i64 and v2f64 selects. |
| 388 | setOperationAction(ISD::LOAD, MVT::v2f64, Legal); |
Evan Cheng | 91b740d | 2006-04-12 17:12:36 +0000 | [diff] [blame] | 389 | setOperationAction(ISD::LOAD, MVT::v2i64, Legal); |
Evan Cheng | f7c378e | 2006-04-10 07:23:14 +0000 | [diff] [blame] | 390 | setOperationAction(ISD::SELECT, MVT::v2f64, Custom); |
Evan Cheng | 2c3ae37 | 2006-04-12 21:21:57 +0000 | [diff] [blame] | 391 | setOperationAction(ISD::SELECT, MVT::v2i64, Custom); |
Evan Cheng | 470a6ad | 2006-02-22 02:26:30 +0000 | [diff] [blame] | 392 | } |
| 393 | |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 394 | // We want to custom lower some of our intrinsics. |
| 395 | setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom); |
| 396 | |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 397 | // We have target-specific dag combine patterns for the following nodes: |
| 398 | setTargetDAGCombine(ISD::VECTOR_SHUFFLE); |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 399 | setTargetDAGCombine(ISD::SELECT); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 400 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 401 | computeRegisterProperties(); |
| 402 | |
Evan Cheng | 87ed716 | 2006-02-14 08:25:08 +0000 | [diff] [blame] | 403 | // FIXME: These should be based on subtarget info. Plus, the values should |
| 404 | // be smaller when we are in optimizing for size mode. |
Evan Cheng | a03a5dc | 2006-02-14 08:38:30 +0000 | [diff] [blame] | 405 | maxStoresPerMemset = 16; // For %llvm.memset -> sequence of stores |
| 406 | maxStoresPerMemcpy = 16; // For %llvm.memcpy -> sequence of stores |
| 407 | maxStoresPerMemmove = 16; // For %llvm.memmove -> sequence of stores |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 408 | allowUnalignedMemoryAccesses = true; // x86 supports it! |
| 409 | } |
| 410 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 411 | //===----------------------------------------------------------------------===// |
| 412 | // C Calling Convention implementation |
| 413 | //===----------------------------------------------------------------------===// |
| 414 | |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 415 | /// AddLiveIn - This helper function adds the specified physical register to the |
| 416 | /// MachineFunction as a live in value. It also creates a corresponding virtual |
| 417 | /// register for it. |
| 418 | static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg, |
| 419 | TargetRegisterClass *RC) { |
| 420 | assert(RC->contains(PReg) && "Not the correct regclass!"); |
| 421 | unsigned VReg = MF.getSSARegMap()->createVirtualRegister(RC); |
| 422 | MF.addLiveIn(PReg, VReg); |
| 423 | return VReg; |
| 424 | } |
| 425 | |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 426 | /// HowToPassCCCArgument - Returns how an formal argument of the specified type |
| 427 | /// should be passed. If it is through stack, returns the size of the stack |
Evan Cheng | f9ff7c5 | 2006-05-26 18:25:43 +0000 | [diff] [blame] | 428 | /// slot; if it is through XMM register, returns the number of XMM registers |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 429 | /// are needed. |
| 430 | static void |
| 431 | HowToPassCCCArgument(MVT::ValueType ObjectVT, unsigned NumXMMRegs, |
| 432 | unsigned &ObjSize, unsigned &ObjXMMRegs) { |
Evan Cheng | 2675534 | 2006-06-01 05:53:27 +0000 | [diff] [blame] | 433 | ObjXMMRegs = 0; |
Evan Cheng | cc1fc22 | 2006-05-25 23:31:23 +0000 | [diff] [blame] | 434 | |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 435 | switch (ObjectVT) { |
| 436 | default: assert(0 && "Unhandled argument type!"); |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 437 | case MVT::i8: ObjSize = 1; break; |
| 438 | case MVT::i16: ObjSize = 2; break; |
| 439 | case MVT::i32: ObjSize = 4; break; |
| 440 | case MVT::i64: ObjSize = 8; break; |
| 441 | case MVT::f32: ObjSize = 4; break; |
| 442 | case MVT::f64: ObjSize = 8; break; |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 443 | case MVT::v16i8: |
| 444 | case MVT::v8i16: |
| 445 | case MVT::v4i32: |
| 446 | case MVT::v2i64: |
| 447 | case MVT::v4f32: |
| 448 | case MVT::v2f64: |
Evan Cheng | 1d6a9b3 | 2006-05-26 19:22:06 +0000 | [diff] [blame] | 449 | if (NumXMMRegs < 4) |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 450 | ObjXMMRegs = 1; |
| 451 | else |
| 452 | ObjSize = 16; |
| 453 | break; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 454 | } |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 455 | } |
| 456 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 457 | SDOperand X86TargetLowering::LowerCCCArguments(SDOperand Op, SelectionDAG &DAG) { |
| 458 | unsigned NumArgs = Op.Val->getNumValues() - 1; |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 459 | MachineFunction &MF = DAG.getMachineFunction(); |
| 460 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 461 | SDOperand Root = Op.getOperand(0); |
| 462 | std::vector<SDOperand> ArgValues; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 463 | |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 464 | // Add DAG nodes to load the arguments... On entry to a function on the X86, |
| 465 | // the stack frame looks like this: |
| 466 | // |
| 467 | // [ESP] -- return address |
| 468 | // [ESP + 4] -- first argument (leftmost lexically) |
Evan Cheng | f9d62dc | 2006-05-26 18:37:16 +0000 | [diff] [blame] | 469 | // [ESP + 8] -- second argument, if first argument is <= 4 bytes in size |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 470 | // ... |
| 471 | // |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 472 | unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 473 | unsigned NumXMMRegs = 0; // XMM regs used for parameter passing. |
Evan Cheng | 1d6a9b3 | 2006-05-26 19:22:06 +0000 | [diff] [blame] | 474 | static const unsigned XMMArgRegs[] = { |
| 475 | X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 |
| 476 | }; |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 477 | for (unsigned i = 0; i < NumArgs; ++i) { |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 478 | MVT::ValueType ObjectVT = Op.getValue(i).getValueType(); |
| 479 | unsigned ArgIncrement = 4; |
| 480 | unsigned ObjSize = 0; |
| 481 | unsigned ObjXMMRegs = 0; |
| 482 | HowToPassCCCArgument(ObjectVT, NumXMMRegs, ObjSize, ObjXMMRegs); |
Evan Cheng | 052fb51 | 2006-05-26 18:39:59 +0000 | [diff] [blame] | 483 | if (ObjSize > 4) |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 484 | ArgIncrement = ObjSize; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 485 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 486 | SDOperand ArgValue; |
| 487 | if (ObjXMMRegs) { |
| 488 | // Passed in a XMM register. |
| 489 | unsigned Reg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs], |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 490 | X86::VR128RegisterClass); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 491 | ArgValue= DAG.getCopyFromReg(Root, Reg, ObjectVT); |
| 492 | ArgValues.push_back(ArgValue); |
| 493 | NumXMMRegs += ObjXMMRegs; |
| 494 | } else { |
Evan Cheng | 3fddf24 | 2006-05-26 20:37:47 +0000 | [diff] [blame] | 495 | // XMM arguments have to be aligned on 16-byte boundary. |
| 496 | if (ObjSize == 16) |
| 497 | ArgOffset = ((ArgOffset + 15) / 16) * 16; |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 498 | // Create the frame index object for this incoming parameter... |
| 499 | int FI = MFI->CreateFixedObject(ObjSize, ArgOffset); |
| 500 | SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 501 | ArgValue = DAG.getLoad(Op.Val->getValueType(i), Root, FIN, NULL, 0); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 502 | ArgValues.push_back(ArgValue); |
| 503 | ArgOffset += ArgIncrement; // Move on to the next argument... |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 504 | } |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 505 | } |
| 506 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 507 | ArgValues.push_back(Root); |
| 508 | |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 509 | // If the function takes variable number of arguments, make a frame index for |
| 510 | // the start of the first vararg value... for expansion of llvm.va_start. |
Evan Cheng | 4db3af3 | 2006-05-23 21:08:24 +0000 | [diff] [blame] | 511 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
| 512 | if (isVarArg) |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 513 | VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 514 | RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only. |
| 515 | ReturnAddrIndex = 0; // No return address slot generated yet. |
| 516 | BytesToPopOnReturn = 0; // Callee pops nothing. |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 517 | BytesCallerReserves = ArgOffset; |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 518 | |
Anton Korobeynikov | df78611 | 2006-11-10 00:48:11 +0000 | [diff] [blame] | 519 | // If this is a struct return on, the callee pops the hidden struct |
| 520 | // pointer. This is common for Darwin/X86, Linux & Mingw32 targets. |
| 521 | if (MF.getFunction()->getCallingConv() == CallingConv::CSRet) |
Chris Lattner | 2d29709 | 2006-05-23 18:50:38 +0000 | [diff] [blame] | 522 | BytesToPopOnReturn = 4; |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 523 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 524 | // Return the new list of results. |
| 525 | std::vector<MVT::ValueType> RetVTs(Op.Val->value_begin(), |
| 526 | Op.Val->value_end()); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 527 | return DAG.getNode(ISD::MERGE_VALUES, RetVTs, &ArgValues[0],ArgValues.size()); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 528 | } |
| 529 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 530 | |
| 531 | SDOperand X86TargetLowering::LowerCCCCallTo(SDOperand Op, SelectionDAG &DAG) { |
| 532 | SDOperand Chain = Op.getOperand(0); |
| 533 | unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 534 | bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; |
| 535 | SDOperand Callee = Op.getOperand(4); |
| 536 | MVT::ValueType RetVT= Op.Val->getValueType(0); |
| 537 | unsigned NumOps = (Op.getNumOperands() - 5) / 2; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 538 | |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 539 | // Keep track of the number of XMM regs passed so far. |
| 540 | unsigned NumXMMRegs = 0; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 541 | static const unsigned XMMArgRegs[] = { |
Evan Cheng | 1d6a9b3 | 2006-05-26 19:22:06 +0000 | [diff] [blame] | 542 | X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 543 | }; |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 544 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 545 | // Count how many bytes are to be pushed on the stack. |
| 546 | unsigned NumBytes = 0; |
| 547 | for (unsigned i = 0; i != NumOps; ++i) { |
| 548 | SDOperand Arg = Op.getOperand(5+2*i); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 549 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 550 | switch (Arg.getValueType()) { |
| 551 | default: assert(0 && "Unexpected ValueType for argument!"); |
| 552 | case MVT::i8: |
| 553 | case MVT::i16: |
| 554 | case MVT::i32: |
| 555 | case MVT::f32: |
| 556 | NumBytes += 4; |
| 557 | break; |
| 558 | case MVT::i64: |
| 559 | case MVT::f64: |
| 560 | NumBytes += 8; |
| 561 | break; |
| 562 | case MVT::v16i8: |
| 563 | case MVT::v8i16: |
| 564 | case MVT::v4i32: |
| 565 | case MVT::v2i64: |
| 566 | case MVT::v4f32: |
Evan Cheng | 25e71d1 | 2006-05-25 22:38:31 +0000 | [diff] [blame] | 567 | case MVT::v2f64: |
Evan Cheng | 1d6a9b3 | 2006-05-26 19:22:06 +0000 | [diff] [blame] | 568 | if (NumXMMRegs < 4) |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 569 | ++NumXMMRegs; |
Evan Cheng | 3fddf24 | 2006-05-26 20:37:47 +0000 | [diff] [blame] | 570 | else { |
| 571 | // XMM arguments have to be aligned on 16-byte boundary. |
| 572 | NumBytes = ((NumBytes + 15) / 16) * 16; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 573 | NumBytes += 16; |
Evan Cheng | 3fddf24 | 2006-05-26 20:37:47 +0000 | [diff] [blame] | 574 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 575 | break; |
| 576 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 577 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 578 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 579 | Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 580 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 581 | // Arguments go on the stack in reverse order, as specified by the ABI. |
| 582 | unsigned ArgOffset = 0; |
| 583 | NumXMMRegs = 0; |
| 584 | std::vector<std::pair<unsigned, SDOperand> > RegsToPass; |
| 585 | std::vector<SDOperand> MemOpChains; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 586 | SDOperand StackPtr = DAG.getRegister(X86StackPtr, getPointerTy()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 587 | for (unsigned i = 0; i != NumOps; ++i) { |
| 588 | SDOperand Arg = Op.getOperand(5+2*i); |
| 589 | |
| 590 | switch (Arg.getValueType()) { |
| 591 | default: assert(0 && "Unexpected ValueType for argument!"); |
| 592 | case MVT::i8: |
Evan Cheng | 6b5783d | 2006-05-25 18:56:34 +0000 | [diff] [blame] | 593 | case MVT::i16: { |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 594 | // Promote the integer to 32 bits. If the input type is signed use a |
| 595 | // sign extend, otherwise use a zero extend. |
| 596 | unsigned ExtOp = |
| 597 | dyn_cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue() ? |
| 598 | ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; |
| 599 | Arg = DAG.getNode(ExtOp, MVT::i32, Arg); |
Evan Cheng | 6b5783d | 2006-05-25 18:56:34 +0000 | [diff] [blame] | 600 | } |
| 601 | // Fallthrough |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 602 | |
| 603 | case MVT::i32: |
| 604 | case MVT::f32: { |
| 605 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
| 606 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 607 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 608 | ArgOffset += 4; |
| 609 | break; |
| 610 | } |
| 611 | case MVT::i64: |
| 612 | case MVT::f64: { |
| 613 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
| 614 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 615 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 616 | ArgOffset += 8; |
| 617 | break; |
| 618 | } |
| 619 | case MVT::v16i8: |
| 620 | case MVT::v8i16: |
| 621 | case MVT::v4i32: |
| 622 | case MVT::v2i64: |
| 623 | case MVT::v4f32: |
Evan Cheng | 25e71d1 | 2006-05-25 22:38:31 +0000 | [diff] [blame] | 624 | case MVT::v2f64: |
Evan Cheng | 1d6a9b3 | 2006-05-26 19:22:06 +0000 | [diff] [blame] | 625 | if (NumXMMRegs < 4) { |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 626 | RegsToPass.push_back(std::make_pair(XMMArgRegs[NumXMMRegs], Arg)); |
| 627 | NumXMMRegs++; |
| 628 | } else { |
Evan Cheng | 3fddf24 | 2006-05-26 20:37:47 +0000 | [diff] [blame] | 629 | // XMM arguments have to be aligned on 16-byte boundary. |
| 630 | ArgOffset = ((ArgOffset + 15) / 16) * 16; |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 631 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 632 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 633 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 634 | ArgOffset += 16; |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 635 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 636 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 637 | } |
| 638 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 639 | if (!MemOpChains.empty()) |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 640 | Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 641 | &MemOpChains[0], MemOpChains.size()); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 642 | |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 643 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 644 | // and flag operands which copy the outgoing args into registers. |
| 645 | SDOperand InFlag; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 646 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 647 | Chain = DAG.getCopyToReg(Chain, RegsToPass[i].first, RegsToPass[i].second, |
| 648 | InFlag); |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 649 | InFlag = Chain.getValue(1); |
| 650 | } |
| 651 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 652 | // If the callee is a GlobalAddress node (quite common, every direct call is) |
| 653 | // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 654 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
| 655 | // We should use extra load for direct calls to dllimported functions |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 656 | if (!Subtarget->GVRequiresExtraLoad(G->getGlobal(), true)) |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 657 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy()); |
| 658 | } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 659 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); |
| 660 | |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 661 | std::vector<MVT::ValueType> NodeTys; |
| 662 | NodeTys.push_back(MVT::Other); // Returns a chain |
| 663 | NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. |
| 664 | std::vector<SDOperand> Ops; |
| 665 | Ops.push_back(Chain); |
| 666 | Ops.push_back(Callee); |
Evan Cheng | b69d113 | 2006-06-14 18:17:40 +0000 | [diff] [blame] | 667 | |
| 668 | // Add argument registers to the end of the list so that they are known live |
| 669 | // into the call. |
| 670 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 671 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
Evan Cheng | b69d113 | 2006-06-14 18:17:40 +0000 | [diff] [blame] | 672 | RegsToPass[i].second.getValueType())); |
| 673 | |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 674 | if (InFlag.Val) |
| 675 | Ops.push_back(InFlag); |
Evan Cheng | d90eb7f | 2006-01-05 00:27:02 +0000 | [diff] [blame] | 676 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 677 | Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 678 | NodeTys, &Ops[0], Ops.size()); |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 679 | InFlag = Chain.getValue(1); |
Evan Cheng | d90eb7f | 2006-01-05 00:27:02 +0000 | [diff] [blame] | 680 | |
Chris Lattner | 2d29709 | 2006-05-23 18:50:38 +0000 | [diff] [blame] | 681 | // Create the CALLSEQ_END node. |
| 682 | unsigned NumBytesForCalleeToPush = 0; |
| 683 | |
Anton Korobeynikov | df78611 | 2006-11-10 00:48:11 +0000 | [diff] [blame] | 684 | // If this is is a call to a struct-return function, the callee |
Chris Lattner | 2d29709 | 2006-05-23 18:50:38 +0000 | [diff] [blame] | 685 | // pops the hidden struct pointer, so we have to push it back. |
Anton Korobeynikov | df78611 | 2006-11-10 00:48:11 +0000 | [diff] [blame] | 686 | // This is common for Darwin/X86, Linux & Mingw32 targets. |
| 687 | if (CallingConv == CallingConv::CSRet) |
Chris Lattner | 2d29709 | 2006-05-23 18:50:38 +0000 | [diff] [blame] | 688 | NumBytesForCalleeToPush = 4; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 689 | |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 690 | NodeTys.clear(); |
| 691 | NodeTys.push_back(MVT::Other); // Returns a chain |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 692 | if (RetVT != MVT::Other) |
| 693 | NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 694 | Ops.clear(); |
| 695 | Ops.push_back(Chain); |
| 696 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
Chris Lattner | 2d29709 | 2006-05-23 18:50:38 +0000 | [diff] [blame] | 697 | Ops.push_back(DAG.getConstant(NumBytesForCalleeToPush, getPointerTy())); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 698 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 699 | Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 700 | if (RetVT != MVT::Other) |
| 701 | InFlag = Chain.getValue(1); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 702 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 703 | std::vector<SDOperand> ResultVals; |
| 704 | NodeTys.clear(); |
| 705 | switch (RetVT) { |
| 706 | default: assert(0 && "Unknown value type to return!"); |
| 707 | case MVT::Other: break; |
| 708 | case MVT::i8: |
| 709 | Chain = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag).getValue(1); |
| 710 | ResultVals.push_back(Chain.getValue(0)); |
| 711 | NodeTys.push_back(MVT::i8); |
| 712 | break; |
| 713 | case MVT::i16: |
| 714 | Chain = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag).getValue(1); |
| 715 | ResultVals.push_back(Chain.getValue(0)); |
| 716 | NodeTys.push_back(MVT::i16); |
| 717 | break; |
| 718 | case MVT::i32: |
| 719 | if (Op.Val->getValueType(1) == MVT::i32) { |
| 720 | Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1); |
| 721 | ResultVals.push_back(Chain.getValue(0)); |
| 722 | Chain = DAG.getCopyFromReg(Chain, X86::EDX, MVT::i32, |
| 723 | Chain.getValue(2)).getValue(1); |
| 724 | ResultVals.push_back(Chain.getValue(0)); |
| 725 | NodeTys.push_back(MVT::i32); |
| 726 | } else { |
| 727 | Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1); |
| 728 | ResultVals.push_back(Chain.getValue(0)); |
Evan Cheng | d90eb7f | 2006-01-05 00:27:02 +0000 | [diff] [blame] | 729 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 730 | NodeTys.push_back(MVT::i32); |
| 731 | break; |
| 732 | case MVT::v16i8: |
| 733 | case MVT::v8i16: |
| 734 | case MVT::v4i32: |
| 735 | case MVT::v2i64: |
| 736 | case MVT::v4f32: |
| 737 | case MVT::v2f64: |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 738 | Chain = DAG.getCopyFromReg(Chain, X86::XMM0, RetVT, InFlag).getValue(1); |
| 739 | ResultVals.push_back(Chain.getValue(0)); |
| 740 | NodeTys.push_back(RetVT); |
| 741 | break; |
| 742 | case MVT::f32: |
| 743 | case MVT::f64: { |
| 744 | std::vector<MVT::ValueType> Tys; |
| 745 | Tys.push_back(MVT::f64); |
| 746 | Tys.push_back(MVT::Other); |
| 747 | Tys.push_back(MVT::Flag); |
| 748 | std::vector<SDOperand> Ops; |
| 749 | Ops.push_back(Chain); |
| 750 | Ops.push_back(InFlag); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 751 | SDOperand RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 752 | &Ops[0], Ops.size()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 753 | Chain = RetVal.getValue(1); |
| 754 | InFlag = RetVal.getValue(2); |
| 755 | if (X86ScalarSSE) { |
| 756 | // FIXME: Currently the FST is flagged to the FP_GET_RESULT. This |
| 757 | // shouldn't be necessary except that RFP cannot be live across |
| 758 | // multiple blocks. When stackifier is fixed, they can be uncoupled. |
| 759 | MachineFunction &MF = DAG.getMachineFunction(); |
| 760 | int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); |
| 761 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 762 | Tys.clear(); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 763 | Tys.push_back(MVT::Other); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 764 | Ops.clear(); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 765 | Ops.push_back(Chain); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 766 | Ops.push_back(RetVal); |
| 767 | Ops.push_back(StackSlot); |
| 768 | Ops.push_back(DAG.getValueType(RetVT)); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 769 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 770 | Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 771 | RetVal = DAG.getLoad(RetVT, Chain, StackSlot, NULL, 0); |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 772 | Chain = RetVal.getValue(1); |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 773 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 774 | |
| 775 | if (RetVT == MVT::f32 && !X86ScalarSSE) |
| 776 | // FIXME: we would really like to remember that this FP_ROUND |
| 777 | // operation is okay to eliminate if we allow excess FP precision. |
| 778 | RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal); |
| 779 | ResultVals.push_back(RetVal); |
| 780 | NodeTys.push_back(RetVT); |
| 781 | break; |
| 782 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 783 | } |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 784 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 785 | // If the function returns void, just return the chain. |
| 786 | if (ResultVals.empty()) |
| 787 | return Chain; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 788 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 789 | // Otherwise, merge everything together with a MERGE_VALUES node. |
| 790 | NodeTys.push_back(MVT::Other); |
| 791 | ResultVals.push_back(Chain); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 792 | SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, NodeTys, |
| 793 | &ResultVals[0], ResultVals.size()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 794 | return Res.getValue(Op.ResNo); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 795 | } |
| 796 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 797 | |
| 798 | //===----------------------------------------------------------------------===// |
| 799 | // X86-64 C Calling Convention implementation |
| 800 | //===----------------------------------------------------------------------===// |
| 801 | |
| 802 | /// HowToPassX86_64CCCArgument - Returns how an formal argument of the specified |
| 803 | /// type should be passed. If it is through stack, returns the size of the stack |
| 804 | /// slot; if it is through integer or XMM register, returns the number of |
| 805 | /// integer or XMM registers are needed. |
| 806 | static void |
| 807 | HowToPassX86_64CCCArgument(MVT::ValueType ObjectVT, |
| 808 | unsigned NumIntRegs, unsigned NumXMMRegs, |
| 809 | unsigned &ObjSize, unsigned &ObjIntRegs, |
| 810 | unsigned &ObjXMMRegs) { |
| 811 | ObjSize = 0; |
| 812 | ObjIntRegs = 0; |
| 813 | ObjXMMRegs = 0; |
| 814 | |
| 815 | switch (ObjectVT) { |
| 816 | default: assert(0 && "Unhandled argument type!"); |
| 817 | case MVT::i8: |
| 818 | case MVT::i16: |
| 819 | case MVT::i32: |
| 820 | case MVT::i64: |
| 821 | if (NumIntRegs < 6) |
| 822 | ObjIntRegs = 1; |
| 823 | else { |
| 824 | switch (ObjectVT) { |
| 825 | default: break; |
| 826 | case MVT::i8: ObjSize = 1; break; |
| 827 | case MVT::i16: ObjSize = 2; break; |
| 828 | case MVT::i32: ObjSize = 4; break; |
| 829 | case MVT::i64: ObjSize = 8; break; |
| 830 | } |
| 831 | } |
| 832 | break; |
| 833 | case MVT::f32: |
| 834 | case MVT::f64: |
| 835 | case MVT::v16i8: |
| 836 | case MVT::v8i16: |
| 837 | case MVT::v4i32: |
| 838 | case MVT::v2i64: |
| 839 | case MVT::v4f32: |
| 840 | case MVT::v2f64: |
| 841 | if (NumXMMRegs < 8) |
| 842 | ObjXMMRegs = 1; |
| 843 | else { |
| 844 | switch (ObjectVT) { |
| 845 | default: break; |
| 846 | case MVT::f32: ObjSize = 4; break; |
| 847 | case MVT::f64: ObjSize = 8; break; |
| 848 | case MVT::v16i8: |
| 849 | case MVT::v8i16: |
| 850 | case MVT::v4i32: |
| 851 | case MVT::v2i64: |
| 852 | case MVT::v4f32: |
| 853 | case MVT::v2f64: ObjSize = 16; break; |
| 854 | } |
| 855 | break; |
| 856 | } |
| 857 | } |
| 858 | } |
| 859 | |
| 860 | SDOperand |
| 861 | X86TargetLowering::LowerX86_64CCCArguments(SDOperand Op, SelectionDAG &DAG) { |
| 862 | unsigned NumArgs = Op.Val->getNumValues() - 1; |
| 863 | MachineFunction &MF = DAG.getMachineFunction(); |
| 864 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 865 | SDOperand Root = Op.getOperand(0); |
| 866 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
| 867 | std::vector<SDOperand> ArgValues; |
| 868 | |
| 869 | // Add DAG nodes to load the arguments... On entry to a function on the X86, |
| 870 | // the stack frame looks like this: |
| 871 | // |
| 872 | // [RSP] -- return address |
| 873 | // [RSP + 8] -- first nonreg argument (leftmost lexically) |
| 874 | // [RSP +16] -- second nonreg argument, if 1st argument is <= 8 bytes in size |
| 875 | // ... |
| 876 | // |
| 877 | unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot |
| 878 | unsigned NumIntRegs = 0; // Int regs used for parameter passing. |
| 879 | unsigned NumXMMRegs = 0; // XMM regs used for parameter passing. |
| 880 | |
| 881 | static const unsigned GPR8ArgRegs[] = { |
| 882 | X86::DIL, X86::SIL, X86::DL, X86::CL, X86::R8B, X86::R9B |
| 883 | }; |
| 884 | static const unsigned GPR16ArgRegs[] = { |
| 885 | X86::DI, X86::SI, X86::DX, X86::CX, X86::R8W, X86::R9W |
| 886 | }; |
| 887 | static const unsigned GPR32ArgRegs[] = { |
| 888 | X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D |
| 889 | }; |
| 890 | static const unsigned GPR64ArgRegs[] = { |
| 891 | X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9 |
| 892 | }; |
| 893 | static const unsigned XMMArgRegs[] = { |
| 894 | X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, |
| 895 | X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 |
| 896 | }; |
| 897 | |
| 898 | for (unsigned i = 0; i < NumArgs; ++i) { |
| 899 | MVT::ValueType ObjectVT = Op.getValue(i).getValueType(); |
| 900 | unsigned ArgIncrement = 8; |
| 901 | unsigned ObjSize = 0; |
| 902 | unsigned ObjIntRegs = 0; |
| 903 | unsigned ObjXMMRegs = 0; |
| 904 | |
| 905 | // FIXME: __int128 and long double support? |
| 906 | HowToPassX86_64CCCArgument(ObjectVT, NumIntRegs, NumXMMRegs, |
| 907 | ObjSize, ObjIntRegs, ObjXMMRegs); |
| 908 | if (ObjSize > 8) |
| 909 | ArgIncrement = ObjSize; |
| 910 | |
| 911 | unsigned Reg = 0; |
| 912 | SDOperand ArgValue; |
| 913 | if (ObjIntRegs || ObjXMMRegs) { |
| 914 | switch (ObjectVT) { |
| 915 | default: assert(0 && "Unhandled argument type!"); |
| 916 | case MVT::i8: |
| 917 | case MVT::i16: |
| 918 | case MVT::i32: |
| 919 | case MVT::i64: { |
| 920 | TargetRegisterClass *RC = NULL; |
| 921 | switch (ObjectVT) { |
| 922 | default: break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 923 | case MVT::i8: |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 924 | RC = X86::GR8RegisterClass; |
| 925 | Reg = GPR8ArgRegs[NumIntRegs]; |
| 926 | break; |
| 927 | case MVT::i16: |
| 928 | RC = X86::GR16RegisterClass; |
| 929 | Reg = GPR16ArgRegs[NumIntRegs]; |
| 930 | break; |
| 931 | case MVT::i32: |
| 932 | RC = X86::GR32RegisterClass; |
| 933 | Reg = GPR32ArgRegs[NumIntRegs]; |
| 934 | break; |
| 935 | case MVT::i64: |
| 936 | RC = X86::GR64RegisterClass; |
| 937 | Reg = GPR64ArgRegs[NumIntRegs]; |
| 938 | break; |
| 939 | } |
| 940 | Reg = AddLiveIn(MF, Reg, RC); |
| 941 | ArgValue = DAG.getCopyFromReg(Root, Reg, ObjectVT); |
| 942 | break; |
| 943 | } |
| 944 | case MVT::f32: |
| 945 | case MVT::f64: |
| 946 | case MVT::v16i8: |
| 947 | case MVT::v8i16: |
| 948 | case MVT::v4i32: |
| 949 | case MVT::v2i64: |
| 950 | case MVT::v4f32: |
| 951 | case MVT::v2f64: { |
| 952 | TargetRegisterClass *RC= (ObjectVT == MVT::f32) ? |
| 953 | X86::FR32RegisterClass : ((ObjectVT == MVT::f64) ? |
| 954 | X86::FR64RegisterClass : X86::VR128RegisterClass); |
| 955 | Reg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs], RC); |
| 956 | ArgValue = DAG.getCopyFromReg(Root, Reg, ObjectVT); |
| 957 | break; |
| 958 | } |
| 959 | } |
| 960 | NumIntRegs += ObjIntRegs; |
| 961 | NumXMMRegs += ObjXMMRegs; |
| 962 | } else if (ObjSize) { |
| 963 | // XMM arguments have to be aligned on 16-byte boundary. |
| 964 | if (ObjSize == 16) |
| 965 | ArgOffset = ((ArgOffset + 15) / 16) * 16; |
| 966 | // Create the SelectionDAG nodes corresponding to a load from this |
| 967 | // parameter. |
| 968 | int FI = MFI->CreateFixedObject(ObjSize, ArgOffset); |
| 969 | SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 970 | ArgValue = DAG.getLoad(Op.Val->getValueType(i), Root, FIN, NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 971 | ArgOffset += ArgIncrement; // Move on to the next argument. |
| 972 | } |
| 973 | |
| 974 | ArgValues.push_back(ArgValue); |
| 975 | } |
| 976 | |
| 977 | // If the function takes variable number of arguments, make a frame index for |
| 978 | // the start of the first vararg value... for expansion of llvm.va_start. |
| 979 | if (isVarArg) { |
| 980 | // For X86-64, if there are vararg parameters that are passed via |
| 981 | // registers, then we must store them to their spots on the stack so they |
| 982 | // may be loaded by deferencing the result of va_next. |
| 983 | VarArgsGPOffset = NumIntRegs * 8; |
| 984 | VarArgsFPOffset = 6 * 8 + NumXMMRegs * 16; |
| 985 | VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset); |
| 986 | RegSaveFrameIndex = MFI->CreateStackObject(6 * 8 + 8 * 16, 16); |
| 987 | |
| 988 | // Store the integer parameter registers. |
| 989 | std::vector<SDOperand> MemOps; |
| 990 | SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy()); |
| 991 | SDOperand FIN = DAG.getNode(ISD::ADD, getPointerTy(), RSFIN, |
| 992 | DAG.getConstant(VarArgsGPOffset, getPointerTy())); |
| 993 | for (; NumIntRegs != 6; ++NumIntRegs) { |
| 994 | unsigned VReg = AddLiveIn(MF, GPR64ArgRegs[NumIntRegs], |
| 995 | X86::GR64RegisterClass); |
| 996 | SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::i64); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 997 | SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 998 | MemOps.push_back(Store); |
| 999 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 1000 | DAG.getConstant(8, getPointerTy())); |
| 1001 | } |
| 1002 | |
| 1003 | // Now store the XMM (fp + vector) parameter registers. |
| 1004 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), RSFIN, |
| 1005 | DAG.getConstant(VarArgsFPOffset, getPointerTy())); |
| 1006 | for (; NumXMMRegs != 8; ++NumXMMRegs) { |
| 1007 | unsigned VReg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs], |
| 1008 | X86::VR128RegisterClass); |
| 1009 | SDOperand Val = DAG.getCopyFromReg(Root, VReg, MVT::v4f32); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1010 | SDOperand Store = DAG.getStore(Val.getValue(1), Val, FIN, NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1011 | MemOps.push_back(Store); |
| 1012 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 1013 | DAG.getConstant(16, getPointerTy())); |
| 1014 | } |
| 1015 | if (!MemOps.empty()) |
| 1016 | Root = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 1017 | &MemOps[0], MemOps.size()); |
| 1018 | } |
| 1019 | |
| 1020 | ArgValues.push_back(Root); |
| 1021 | |
| 1022 | ReturnAddrIndex = 0; // No return address slot generated yet. |
| 1023 | BytesToPopOnReturn = 0; // Callee pops nothing. |
| 1024 | BytesCallerReserves = ArgOffset; |
| 1025 | |
| 1026 | // Return the new list of results. |
| 1027 | std::vector<MVT::ValueType> RetVTs(Op.Val->value_begin(), |
| 1028 | Op.Val->value_end()); |
| 1029 | return DAG.getNode(ISD::MERGE_VALUES, RetVTs, &ArgValues[0],ArgValues.size()); |
| 1030 | } |
| 1031 | |
| 1032 | SDOperand |
| 1033 | X86TargetLowering::LowerX86_64CCCCallTo(SDOperand Op, SelectionDAG &DAG) { |
| 1034 | SDOperand Chain = Op.getOperand(0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1035 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
| 1036 | bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; |
| 1037 | SDOperand Callee = Op.getOperand(4); |
| 1038 | MVT::ValueType RetVT= Op.Val->getValueType(0); |
| 1039 | unsigned NumOps = (Op.getNumOperands() - 5) / 2; |
| 1040 | |
| 1041 | // Count how many bytes are to be pushed on the stack. |
| 1042 | unsigned NumBytes = 0; |
| 1043 | unsigned NumIntRegs = 0; // Int regs used for parameter passing. |
| 1044 | unsigned NumXMMRegs = 0; // XMM regs used for parameter passing. |
| 1045 | |
| 1046 | static const unsigned GPR8ArgRegs[] = { |
| 1047 | X86::DIL, X86::SIL, X86::DL, X86::CL, X86::R8B, X86::R9B |
| 1048 | }; |
| 1049 | static const unsigned GPR16ArgRegs[] = { |
| 1050 | X86::DI, X86::SI, X86::DX, X86::CX, X86::R8W, X86::R9W |
| 1051 | }; |
| 1052 | static const unsigned GPR32ArgRegs[] = { |
| 1053 | X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D |
| 1054 | }; |
| 1055 | static const unsigned GPR64ArgRegs[] = { |
| 1056 | X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9 |
| 1057 | }; |
| 1058 | static const unsigned XMMArgRegs[] = { |
| 1059 | X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, |
| 1060 | X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 |
| 1061 | }; |
| 1062 | |
| 1063 | for (unsigned i = 0; i != NumOps; ++i) { |
| 1064 | SDOperand Arg = Op.getOperand(5+2*i); |
| 1065 | MVT::ValueType ArgVT = Arg.getValueType(); |
| 1066 | |
| 1067 | switch (ArgVT) { |
| 1068 | default: assert(0 && "Unknown value type!"); |
| 1069 | case MVT::i8: |
| 1070 | case MVT::i16: |
| 1071 | case MVT::i32: |
| 1072 | case MVT::i64: |
| 1073 | if (NumIntRegs < 6) |
| 1074 | ++NumIntRegs; |
| 1075 | else |
| 1076 | NumBytes += 8; |
| 1077 | break; |
| 1078 | case MVT::f32: |
| 1079 | case MVT::f64: |
| 1080 | case MVT::v16i8: |
| 1081 | case MVT::v8i16: |
| 1082 | case MVT::v4i32: |
| 1083 | case MVT::v2i64: |
| 1084 | case MVT::v4f32: |
| 1085 | case MVT::v2f64: |
| 1086 | if (NumXMMRegs < 8) |
| 1087 | NumXMMRegs++; |
| 1088 | else if (ArgVT == MVT::f32 || ArgVT == MVT::f64) |
| 1089 | NumBytes += 8; |
| 1090 | else { |
| 1091 | // XMM arguments have to be aligned on 16-byte boundary. |
| 1092 | NumBytes = ((NumBytes + 15) / 16) * 16; |
| 1093 | NumBytes += 16; |
| 1094 | } |
| 1095 | break; |
| 1096 | } |
| 1097 | } |
| 1098 | |
| 1099 | Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); |
| 1100 | |
| 1101 | // Arguments go on the stack in reverse order, as specified by the ABI. |
| 1102 | unsigned ArgOffset = 0; |
| 1103 | NumIntRegs = 0; |
| 1104 | NumXMMRegs = 0; |
| 1105 | std::vector<std::pair<unsigned, SDOperand> > RegsToPass; |
| 1106 | std::vector<SDOperand> MemOpChains; |
| 1107 | SDOperand StackPtr = DAG.getRegister(X86StackPtr, getPointerTy()); |
| 1108 | for (unsigned i = 0; i != NumOps; ++i) { |
| 1109 | SDOperand Arg = Op.getOperand(5+2*i); |
| 1110 | MVT::ValueType ArgVT = Arg.getValueType(); |
| 1111 | |
| 1112 | switch (ArgVT) { |
| 1113 | default: assert(0 && "Unexpected ValueType for argument!"); |
| 1114 | case MVT::i8: |
| 1115 | case MVT::i16: |
| 1116 | case MVT::i32: |
| 1117 | case MVT::i64: |
| 1118 | if (NumIntRegs < 6) { |
| 1119 | unsigned Reg = 0; |
| 1120 | switch (ArgVT) { |
| 1121 | default: break; |
| 1122 | case MVT::i8: Reg = GPR8ArgRegs[NumIntRegs]; break; |
| 1123 | case MVT::i16: Reg = GPR16ArgRegs[NumIntRegs]; break; |
| 1124 | case MVT::i32: Reg = GPR32ArgRegs[NumIntRegs]; break; |
| 1125 | case MVT::i64: Reg = GPR64ArgRegs[NumIntRegs]; break; |
| 1126 | } |
| 1127 | RegsToPass.push_back(std::make_pair(Reg, Arg)); |
| 1128 | ++NumIntRegs; |
| 1129 | } else { |
| 1130 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
| 1131 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1132 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1133 | ArgOffset += 8; |
| 1134 | } |
| 1135 | break; |
| 1136 | case MVT::f32: |
| 1137 | case MVT::f64: |
| 1138 | case MVT::v16i8: |
| 1139 | case MVT::v8i16: |
| 1140 | case MVT::v4i32: |
| 1141 | case MVT::v2i64: |
| 1142 | case MVT::v4f32: |
| 1143 | case MVT::v2f64: |
| 1144 | if (NumXMMRegs < 8) { |
| 1145 | RegsToPass.push_back(std::make_pair(XMMArgRegs[NumXMMRegs], Arg)); |
| 1146 | NumXMMRegs++; |
| 1147 | } else { |
| 1148 | if (ArgVT != MVT::f32 && ArgVT != MVT::f64) { |
| 1149 | // XMM arguments have to be aligned on 16-byte boundary. |
| 1150 | ArgOffset = ((ArgOffset + 15) / 16) * 16; |
| 1151 | } |
| 1152 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
| 1153 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1154 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1155 | if (ArgVT == MVT::f32 || ArgVT == MVT::f64) |
| 1156 | ArgOffset += 8; |
| 1157 | else |
| 1158 | ArgOffset += 16; |
| 1159 | } |
| 1160 | } |
| 1161 | } |
| 1162 | |
| 1163 | if (!MemOpChains.empty()) |
| 1164 | Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 1165 | &MemOpChains[0], MemOpChains.size()); |
| 1166 | |
| 1167 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 1168 | // and flag operands which copy the outgoing args into registers. |
| 1169 | SDOperand InFlag; |
| 1170 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 1171 | Chain = DAG.getCopyToReg(Chain, RegsToPass[i].first, RegsToPass[i].second, |
| 1172 | InFlag); |
| 1173 | InFlag = Chain.getValue(1); |
| 1174 | } |
| 1175 | |
| 1176 | if (isVarArg) { |
| 1177 | // From AMD64 ABI document: |
| 1178 | // For calls that may call functions that use varargs or stdargs |
| 1179 | // (prototype-less calls or calls to functions containing ellipsis (...) in |
| 1180 | // the declaration) %al is used as hidden argument to specify the number |
| 1181 | // of SSE registers used. The contents of %al do not need to match exactly |
| 1182 | // the number of registers, but must be an ubound on the number of SSE |
| 1183 | // registers used and is in the range 0 - 8 inclusive. |
| 1184 | Chain = DAG.getCopyToReg(Chain, X86::AL, |
| 1185 | DAG.getConstant(NumXMMRegs, MVT::i8), InFlag); |
| 1186 | InFlag = Chain.getValue(1); |
| 1187 | } |
| 1188 | |
| 1189 | // If the callee is a GlobalAddress node (quite common, every direct call is) |
| 1190 | // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 1191 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
| 1192 | // We should use extra load for direct calls to dllimported functions |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1193 | if (!Subtarget->GVRequiresExtraLoad(G->getGlobal(), true)) |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 1194 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy()); |
| 1195 | } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1196 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); |
| 1197 | |
| 1198 | std::vector<MVT::ValueType> NodeTys; |
| 1199 | NodeTys.push_back(MVT::Other); // Returns a chain |
| 1200 | NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. |
| 1201 | std::vector<SDOperand> Ops; |
| 1202 | Ops.push_back(Chain); |
| 1203 | Ops.push_back(Callee); |
| 1204 | |
| 1205 | // Add argument registers to the end of the list so that they are known live |
| 1206 | // into the call. |
| 1207 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1208 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1209 | RegsToPass[i].second.getValueType())); |
| 1210 | |
| 1211 | if (InFlag.Val) |
| 1212 | Ops.push_back(InFlag); |
| 1213 | |
| 1214 | // FIXME: Do not generate X86ISD::TAILCALL for now. |
| 1215 | Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, |
| 1216 | NodeTys, &Ops[0], Ops.size()); |
| 1217 | InFlag = Chain.getValue(1); |
| 1218 | |
| 1219 | NodeTys.clear(); |
| 1220 | NodeTys.push_back(MVT::Other); // Returns a chain |
| 1221 | if (RetVT != MVT::Other) |
| 1222 | NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. |
| 1223 | Ops.clear(); |
| 1224 | Ops.push_back(Chain); |
| 1225 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
| 1226 | Ops.push_back(DAG.getConstant(0, getPointerTy())); |
| 1227 | Ops.push_back(InFlag); |
| 1228 | Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); |
| 1229 | if (RetVT != MVT::Other) |
| 1230 | InFlag = Chain.getValue(1); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1231 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1232 | std::vector<SDOperand> ResultVals; |
| 1233 | NodeTys.clear(); |
| 1234 | switch (RetVT) { |
| 1235 | default: assert(0 && "Unknown value type to return!"); |
| 1236 | case MVT::Other: break; |
| 1237 | case MVT::i8: |
| 1238 | Chain = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag).getValue(1); |
| 1239 | ResultVals.push_back(Chain.getValue(0)); |
| 1240 | NodeTys.push_back(MVT::i8); |
| 1241 | break; |
| 1242 | case MVT::i16: |
| 1243 | Chain = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag).getValue(1); |
| 1244 | ResultVals.push_back(Chain.getValue(0)); |
| 1245 | NodeTys.push_back(MVT::i16); |
| 1246 | break; |
| 1247 | case MVT::i32: |
| 1248 | Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1); |
| 1249 | ResultVals.push_back(Chain.getValue(0)); |
| 1250 | NodeTys.push_back(MVT::i32); |
| 1251 | break; |
| 1252 | case MVT::i64: |
| 1253 | if (Op.Val->getValueType(1) == MVT::i64) { |
| 1254 | // FIXME: __int128 support? |
| 1255 | Chain = DAG.getCopyFromReg(Chain, X86::RAX, MVT::i64, InFlag).getValue(1); |
| 1256 | ResultVals.push_back(Chain.getValue(0)); |
| 1257 | Chain = DAG.getCopyFromReg(Chain, X86::RDX, MVT::i64, |
| 1258 | Chain.getValue(2)).getValue(1); |
| 1259 | ResultVals.push_back(Chain.getValue(0)); |
| 1260 | NodeTys.push_back(MVT::i64); |
| 1261 | } else { |
| 1262 | Chain = DAG.getCopyFromReg(Chain, X86::RAX, MVT::i64, InFlag).getValue(1); |
| 1263 | ResultVals.push_back(Chain.getValue(0)); |
| 1264 | } |
| 1265 | NodeTys.push_back(MVT::i64); |
| 1266 | break; |
| 1267 | case MVT::f32: |
| 1268 | case MVT::f64: |
| 1269 | case MVT::v16i8: |
| 1270 | case MVT::v8i16: |
| 1271 | case MVT::v4i32: |
| 1272 | case MVT::v2i64: |
| 1273 | case MVT::v4f32: |
| 1274 | case MVT::v2f64: |
| 1275 | // FIXME: long double support? |
| 1276 | Chain = DAG.getCopyFromReg(Chain, X86::XMM0, RetVT, InFlag).getValue(1); |
| 1277 | ResultVals.push_back(Chain.getValue(0)); |
| 1278 | NodeTys.push_back(RetVT); |
| 1279 | break; |
| 1280 | } |
| 1281 | |
| 1282 | // If the function returns void, just return the chain. |
| 1283 | if (ResultVals.empty()) |
| 1284 | return Chain; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1285 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1286 | // Otherwise, merge everything together with a MERGE_VALUES node. |
| 1287 | NodeTys.push_back(MVT::Other); |
| 1288 | ResultVals.push_back(Chain); |
| 1289 | SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, NodeTys, |
| 1290 | &ResultVals[0], ResultVals.size()); |
| 1291 | return Res.getValue(Op.ResNo); |
| 1292 | } |
| 1293 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1294 | //===----------------------------------------------------------------------===// |
| 1295 | // Fast Calling Convention implementation |
| 1296 | //===----------------------------------------------------------------------===// |
| 1297 | // |
| 1298 | // The X86 'fast' calling convention passes up to two integer arguments in |
| 1299 | // registers (an appropriate portion of EAX/EDX), passes arguments in C order, |
| 1300 | // and requires that the callee pop its arguments off the stack (allowing proper |
| 1301 | // tail calls), and has the same return value conventions as C calling convs. |
| 1302 | // |
| 1303 | // This calling convention always arranges for the callee pop value to be 8n+4 |
| 1304 | // bytes, which is needed for tail recursion elimination and stack alignment |
| 1305 | // reasons. |
| 1306 | // |
| 1307 | // Note that this can be enhanced in the future to pass fp vals in registers |
| 1308 | // (when we have a global fp allocator) and do other tricks. |
| 1309 | // |
| 1310 | |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 1311 | /// HowToPassFastCCArgument - Returns how an formal argument of the specified |
| 1312 | /// type should be passed. If it is through stack, returns the size of the stack |
Evan Cheng | f9ff7c5 | 2006-05-26 18:25:43 +0000 | [diff] [blame] | 1313 | /// slot; if it is through integer or XMM register, returns the number of |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 1314 | /// integer or XMM registers are needed. |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1315 | static void |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 1316 | HowToPassFastCCArgument(MVT::ValueType ObjectVT, |
| 1317 | unsigned NumIntRegs, unsigned NumXMMRegs, |
| 1318 | unsigned &ObjSize, unsigned &ObjIntRegs, |
| 1319 | unsigned &ObjXMMRegs) { |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1320 | ObjSize = 0; |
Evan Cheng | 2675534 | 2006-06-01 05:53:27 +0000 | [diff] [blame] | 1321 | ObjIntRegs = 0; |
| 1322 | ObjXMMRegs = 0; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1323 | |
| 1324 | switch (ObjectVT) { |
| 1325 | default: assert(0 && "Unhandled argument type!"); |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1326 | case MVT::i8: |
Evan Cheng | da08d2c | 2006-06-24 08:36:10 +0000 | [diff] [blame] | 1327 | #if FASTCC_NUM_INT_ARGS_INREGS > 0 |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1328 | if (NumIntRegs < FASTCC_NUM_INT_ARGS_INREGS) |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 1329 | ObjIntRegs = 1; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1330 | else |
Evan Cheng | da08d2c | 2006-06-24 08:36:10 +0000 | [diff] [blame] | 1331 | #endif |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1332 | ObjSize = 1; |
| 1333 | break; |
| 1334 | case MVT::i16: |
Evan Cheng | da08d2c | 2006-06-24 08:36:10 +0000 | [diff] [blame] | 1335 | #if FASTCC_NUM_INT_ARGS_INREGS > 0 |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1336 | if (NumIntRegs < FASTCC_NUM_INT_ARGS_INREGS) |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 1337 | ObjIntRegs = 1; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1338 | else |
Evan Cheng | da08d2c | 2006-06-24 08:36:10 +0000 | [diff] [blame] | 1339 | #endif |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1340 | ObjSize = 2; |
| 1341 | break; |
| 1342 | case MVT::i32: |
Evan Cheng | da08d2c | 2006-06-24 08:36:10 +0000 | [diff] [blame] | 1343 | #if FASTCC_NUM_INT_ARGS_INREGS > 0 |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1344 | if (NumIntRegs < FASTCC_NUM_INT_ARGS_INREGS) |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 1345 | ObjIntRegs = 1; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1346 | else |
Evan Cheng | da08d2c | 2006-06-24 08:36:10 +0000 | [diff] [blame] | 1347 | #endif |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1348 | ObjSize = 4; |
| 1349 | break; |
| 1350 | case MVT::i64: |
Evan Cheng | da08d2c | 2006-06-24 08:36:10 +0000 | [diff] [blame] | 1351 | #if FASTCC_NUM_INT_ARGS_INREGS > 0 |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1352 | if (NumIntRegs+2 <= FASTCC_NUM_INT_ARGS_INREGS) { |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 1353 | ObjIntRegs = 2; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1354 | } else if (NumIntRegs+1 <= FASTCC_NUM_INT_ARGS_INREGS) { |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 1355 | ObjIntRegs = 1; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1356 | ObjSize = 4; |
| 1357 | } else |
Evan Cheng | da08d2c | 2006-06-24 08:36:10 +0000 | [diff] [blame] | 1358 | #endif |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1359 | ObjSize = 8; |
| 1360 | case MVT::f32: |
| 1361 | ObjSize = 4; |
| 1362 | break; |
| 1363 | case MVT::f64: |
| 1364 | ObjSize = 8; |
| 1365 | break; |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 1366 | case MVT::v16i8: |
| 1367 | case MVT::v8i16: |
| 1368 | case MVT::v4i32: |
| 1369 | case MVT::v2i64: |
| 1370 | case MVT::v4f32: |
| 1371 | case MVT::v2f64: |
Evan Cheng | 1d6a9b3 | 2006-05-26 19:22:06 +0000 | [diff] [blame] | 1372 | if (NumXMMRegs < 4) |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 1373 | ObjXMMRegs = 1; |
| 1374 | else |
| 1375 | ObjSize = 16; |
| 1376 | break; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1377 | } |
| 1378 | } |
| 1379 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1380 | SDOperand |
| 1381 | X86TargetLowering::LowerFastCCArguments(SDOperand Op, SelectionDAG &DAG) { |
| 1382 | unsigned NumArgs = Op.Val->getNumValues()-1; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1383 | MachineFunction &MF = DAG.getMachineFunction(); |
| 1384 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1385 | SDOperand Root = Op.getOperand(0); |
| 1386 | std::vector<SDOperand> ArgValues; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1387 | |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1388 | // Add DAG nodes to load the arguments... On entry to a function the stack |
| 1389 | // frame looks like this: |
| 1390 | // |
| 1391 | // [ESP] -- return address |
| 1392 | // [ESP + 4] -- first nonreg argument (leftmost lexically) |
Evan Cheng | f9d62dc | 2006-05-26 18:37:16 +0000 | [diff] [blame] | 1393 | // [ESP + 8] -- second nonreg argument, if 1st argument is <= 4 bytes in size |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1394 | // ... |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1395 | unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot |
| 1396 | |
| 1397 | // Keep track of the number of integer regs passed so far. This can be either |
| 1398 | // 0 (neither EAX or EDX used), 1 (EAX is used) or 2 (EAX and EDX are both |
| 1399 | // used). |
| 1400 | unsigned NumIntRegs = 0; |
Evan Cheng | 2fdd95e | 2006-04-27 08:31:10 +0000 | [diff] [blame] | 1401 | unsigned NumXMMRegs = 0; // XMM regs used for parameter passing. |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1402 | |
| 1403 | static const unsigned XMMArgRegs[] = { |
Evan Cheng | 1d6a9b3 | 2006-05-26 19:22:06 +0000 | [diff] [blame] | 1404 | X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1405 | }; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1406 | |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 1407 | for (unsigned i = 0; i < NumArgs; ++i) { |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1408 | MVT::ValueType ObjectVT = Op.getValue(i).getValueType(); |
| 1409 | unsigned ArgIncrement = 4; |
| 1410 | unsigned ObjSize = 0; |
| 1411 | unsigned ObjIntRegs = 0; |
| 1412 | unsigned ObjXMMRegs = 0; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1413 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1414 | HowToPassFastCCArgument(ObjectVT, NumIntRegs, NumXMMRegs, |
| 1415 | ObjSize, ObjIntRegs, ObjXMMRegs); |
Evan Cheng | 052fb51 | 2006-05-26 18:39:59 +0000 | [diff] [blame] | 1416 | if (ObjSize > 4) |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1417 | ArgIncrement = ObjSize; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1418 | |
Evan Cheng | 04b2562 | 2006-06-01 00:30:39 +0000 | [diff] [blame] | 1419 | unsigned Reg = 0; |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1420 | SDOperand ArgValue; |
| 1421 | if (ObjIntRegs || ObjXMMRegs) { |
| 1422 | switch (ObjectVT) { |
| 1423 | default: assert(0 && "Unhandled argument type!"); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1424 | case MVT::i8: |
| 1425 | Reg = AddLiveIn(MF, NumIntRegs ? X86::DL : X86::AL, |
| 1426 | X86::GR8RegisterClass); |
| 1427 | ArgValue = DAG.getCopyFromReg(Root, Reg, MVT::i8); |
| 1428 | break; |
| 1429 | case MVT::i16: |
| 1430 | Reg = AddLiveIn(MF, NumIntRegs ? X86::DX : X86::AX, |
| 1431 | X86::GR16RegisterClass); |
| 1432 | ArgValue = DAG.getCopyFromReg(Root, Reg, MVT::i16); |
| 1433 | break; |
| 1434 | case MVT::i32: |
| 1435 | Reg = AddLiveIn(MF, NumIntRegs ? X86::EDX : X86::EAX, |
| 1436 | X86::GR32RegisterClass); |
| 1437 | ArgValue = DAG.getCopyFromReg(Root, Reg, MVT::i32); |
| 1438 | break; |
| 1439 | case MVT::i64: |
| 1440 | Reg = AddLiveIn(MF, NumIntRegs ? X86::EDX : X86::EAX, |
| 1441 | X86::GR32RegisterClass); |
| 1442 | ArgValue = DAG.getCopyFromReg(Root, Reg, MVT::i32); |
| 1443 | if (ObjIntRegs == 2) { |
| 1444 | Reg = AddLiveIn(MF, X86::EDX, X86::GR32RegisterClass); |
| 1445 | SDOperand ArgValue2 = DAG.getCopyFromReg(Root, Reg, MVT::i32); |
| 1446 | ArgValue= DAG.getNode(ISD::BUILD_PAIR, MVT::i64, ArgValue, ArgValue2); |
Evan Cheng | 85e3800 | 2006-04-27 05:35:28 +0000 | [diff] [blame] | 1447 | } |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1448 | break; |
| 1449 | case MVT::v16i8: |
| 1450 | case MVT::v8i16: |
| 1451 | case MVT::v4i32: |
| 1452 | case MVT::v2i64: |
| 1453 | case MVT::v4f32: |
| 1454 | case MVT::v2f64: |
| 1455 | Reg = AddLiveIn(MF, XMMArgRegs[NumXMMRegs], X86::VR128RegisterClass); |
| 1456 | ArgValue = DAG.getCopyFromReg(Root, Reg, ObjectVT); |
| 1457 | break; |
Evan Cheng | eda65fa | 2006-04-27 01:32:22 +0000 | [diff] [blame] | 1458 | } |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1459 | NumIntRegs += ObjIntRegs; |
| 1460 | NumXMMRegs += ObjXMMRegs; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1461 | } |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1462 | |
| 1463 | if (ObjSize) { |
Evan Cheng | 3fddf24 | 2006-05-26 20:37:47 +0000 | [diff] [blame] | 1464 | // XMM arguments have to be aligned on 16-byte boundary. |
| 1465 | if (ObjSize == 16) |
| 1466 | ArgOffset = ((ArgOffset + 15) / 16) * 16; |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1467 | // Create the SelectionDAG nodes corresponding to a load from this |
| 1468 | // parameter. |
| 1469 | int FI = MFI->CreateFixedObject(ObjSize, ArgOffset); |
| 1470 | SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); |
| 1471 | if (ObjectVT == MVT::i64 && ObjIntRegs) { |
| 1472 | SDOperand ArgValue2 = DAG.getLoad(Op.Val->getValueType(i), Root, FIN, |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1473 | NULL, 0); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1474 | ArgValue = DAG.getNode(ISD::BUILD_PAIR, MVT::i64, ArgValue, ArgValue2); |
| 1475 | } else |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1476 | ArgValue = DAG.getLoad(Op.Val->getValueType(i), Root, FIN, NULL, 0); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1477 | ArgOffset += ArgIncrement; // Move on to the next argument. |
| 1478 | } |
| 1479 | |
| 1480 | ArgValues.push_back(ArgValue); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1481 | } |
| 1482 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1483 | ArgValues.push_back(Root); |
| 1484 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1485 | // Make sure the instruction takes 8n+4 bytes to make sure the start of the |
| 1486 | // arguments and the arguments after the retaddr has been pushed are aligned. |
| 1487 | if ((ArgOffset & 7) == 0) |
| 1488 | ArgOffset += 4; |
| 1489 | |
| 1490 | VarArgsFrameIndex = 0xAAAAAAA; // fastcc functions can't have varargs. |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1491 | RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only. |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1492 | ReturnAddrIndex = 0; // No return address slot generated yet. |
| 1493 | BytesToPopOnReturn = ArgOffset; // Callee pops all stack arguments. |
| 1494 | BytesCallerReserves = 0; |
| 1495 | |
| 1496 | // Finally, inform the code generator which regs we return values in. |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1497 | switch (getValueType(MF.getFunction()->getReturnType())) { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1498 | default: assert(0 && "Unknown type!"); |
| 1499 | case MVT::isVoid: break; |
Chris Lattner | 13bf6c1 | 2006-10-03 17:18:42 +0000 | [diff] [blame] | 1500 | case MVT::i1: |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1501 | case MVT::i8: |
| 1502 | case MVT::i16: |
| 1503 | case MVT::i32: |
| 1504 | MF.addLiveOut(X86::EAX); |
| 1505 | break; |
| 1506 | case MVT::i64: |
| 1507 | MF.addLiveOut(X86::EAX); |
| 1508 | MF.addLiveOut(X86::EDX); |
| 1509 | break; |
| 1510 | case MVT::f32: |
| 1511 | case MVT::f64: |
| 1512 | MF.addLiveOut(X86::ST0); |
| 1513 | break; |
Evan Cheng | 6b5783d | 2006-05-25 18:56:34 +0000 | [diff] [blame] | 1514 | case MVT::v16i8: |
| 1515 | case MVT::v8i16: |
| 1516 | case MVT::v4i32: |
| 1517 | case MVT::v2i64: |
| 1518 | case MVT::v4f32: |
| 1519 | case MVT::v2f64: |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 1520 | MF.addLiveOut(X86::XMM0); |
| 1521 | break; |
| 1522 | } |
Evan Cheng | 347d5f7 | 2006-04-28 21:29:37 +0000 | [diff] [blame] | 1523 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 1524 | // Return the new list of results. |
| 1525 | std::vector<MVT::ValueType> RetVTs(Op.Val->value_begin(), |
| 1526 | Op.Val->value_end()); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1527 | return DAG.getNode(ISD::MERGE_VALUES, RetVTs, &ArgValues[0],ArgValues.size()); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1528 | } |
| 1529 | |
Chris Lattner | e87e115 | 2006-09-26 03:57:53 +0000 | [diff] [blame] | 1530 | SDOperand X86TargetLowering::LowerFastCCCallTo(SDOperand Op, SelectionDAG &DAG, |
| 1531 | bool isFastCall) { |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1532 | SDOperand Chain = Op.getOperand(0); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1533 | bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; |
| 1534 | SDOperand Callee = Op.getOperand(4); |
| 1535 | MVT::ValueType RetVT= Op.Val->getValueType(0); |
| 1536 | unsigned NumOps = (Op.getNumOperands() - 5) / 2; |
| 1537 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1538 | // Count how many bytes are to be pushed on the stack. |
| 1539 | unsigned NumBytes = 0; |
| 1540 | |
| 1541 | // Keep track of the number of integer regs passed so far. This can be either |
| 1542 | // 0 (neither EAX or EDX used), 1 (EAX is used) or 2 (EAX and EDX are both |
| 1543 | // used). |
| 1544 | unsigned NumIntRegs = 0; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1545 | unsigned NumXMMRegs = 0; // XMM regs used for parameter passing. |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1546 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1547 | static const unsigned GPRArgRegs[][2] = { |
| 1548 | { X86::AL, X86::DL }, |
| 1549 | { X86::AX, X86::DX }, |
| 1550 | { X86::EAX, X86::EDX } |
| 1551 | }; |
Reid Spencer | 3ed469c | 2006-11-02 20:25:50 +0000 | [diff] [blame] | 1552 | #if 0 |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1553 | static const unsigned FastCallGPRArgRegs[][2] = { |
| 1554 | { X86::CL, X86::DL }, |
| 1555 | { X86::CX, X86::DX }, |
| 1556 | { X86::ECX, X86::EDX } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1557 | }; |
Reid Spencer | 3ed469c | 2006-11-02 20:25:50 +0000 | [diff] [blame] | 1558 | #endif |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1559 | static const unsigned XMMArgRegs[] = { |
Evan Cheng | 1d6a9b3 | 2006-05-26 19:22:06 +0000 | [diff] [blame] | 1560 | X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1561 | }; |
| 1562 | |
| 1563 | for (unsigned i = 0; i != NumOps; ++i) { |
| 1564 | SDOperand Arg = Op.getOperand(5+2*i); |
| 1565 | |
| 1566 | switch (Arg.getValueType()) { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1567 | default: assert(0 && "Unknown value type!"); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1568 | case MVT::i8: |
| 1569 | case MVT::i16: |
Nick Lewycky | 70084fd | 2006-09-21 02:08:31 +0000 | [diff] [blame] | 1570 | case MVT::i32: { |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1571 | unsigned MaxNumIntRegs = (isFastCall ? 2 : FASTCC_NUM_INT_ARGS_INREGS); |
| 1572 | if (NumIntRegs < MaxNumIntRegs) { |
| 1573 | ++NumIntRegs; |
| 1574 | break; |
| 1575 | } |
Nick Lewycky | 70084fd | 2006-09-21 02:08:31 +0000 | [diff] [blame] | 1576 | } // Fall through |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1577 | case MVT::f32: |
| 1578 | NumBytes += 4; |
| 1579 | break; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1580 | case MVT::f64: |
| 1581 | NumBytes += 8; |
| 1582 | break; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1583 | case MVT::v16i8: |
| 1584 | case MVT::v8i16: |
| 1585 | case MVT::v4i32: |
| 1586 | case MVT::v2i64: |
| 1587 | case MVT::v4f32: |
Evan Cheng | 6b5783d | 2006-05-25 18:56:34 +0000 | [diff] [blame] | 1588 | case MVT::v2f64: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1589 | if (isFastCall) { |
| 1590 | assert(0 && "Unknown value type!"); |
| 1591 | } else { |
| 1592 | if (NumXMMRegs < 4) |
| 1593 | NumXMMRegs++; |
| 1594 | else { |
| 1595 | // XMM arguments have to be aligned on 16-byte boundary. |
| 1596 | NumBytes = ((NumBytes + 15) / 16) * 16; |
| 1597 | NumBytes += 16; |
| 1598 | } |
| 1599 | } |
| 1600 | break; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1601 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1602 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1603 | |
| 1604 | // Make sure the instruction takes 8n+4 bytes to make sure the start of the |
| 1605 | // arguments and the arguments after the retaddr has been pushed are aligned. |
| 1606 | if ((NumBytes & 7) == 0) |
| 1607 | NumBytes += 4; |
| 1608 | |
Chris Lattner | 94dd292 | 2006-02-13 09:00:43 +0000 | [diff] [blame] | 1609 | Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1610 | |
| 1611 | // Arguments go on the stack in reverse order, as specified by the ABI. |
| 1612 | unsigned ArgOffset = 0; |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1613 | NumIntRegs = 0; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1614 | std::vector<std::pair<unsigned, SDOperand> > RegsToPass; |
| 1615 | std::vector<SDOperand> MemOpChains; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 1616 | SDOperand StackPtr = DAG.getRegister(X86StackPtr, getPointerTy()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1617 | for (unsigned i = 0; i != NumOps; ++i) { |
| 1618 | SDOperand Arg = Op.getOperand(5+2*i); |
| 1619 | |
| 1620 | switch (Arg.getValueType()) { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1621 | default: assert(0 && "Unexpected ValueType for argument!"); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1622 | case MVT::i8: |
| 1623 | case MVT::i16: |
Nick Lewycky | 70084fd | 2006-09-21 02:08:31 +0000 | [diff] [blame] | 1624 | case MVT::i32: { |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1625 | unsigned MaxNumIntRegs = (isFastCall ? 2 : FASTCC_NUM_INT_ARGS_INREGS); |
| 1626 | if (NumIntRegs < MaxNumIntRegs) { |
| 1627 | RegsToPass.push_back( |
| 1628 | std::make_pair(GPRArgRegs[Arg.getValueType()-MVT::i8][NumIntRegs], |
| 1629 | Arg)); |
| 1630 | ++NumIntRegs; |
| 1631 | break; |
| 1632 | } |
Nick Lewycky | 70084fd | 2006-09-21 02:08:31 +0000 | [diff] [blame] | 1633 | } // Fall through |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1634 | case MVT::f32: { |
| 1635 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1636 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1637 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1638 | ArgOffset += 4; |
| 1639 | break; |
| 1640 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1641 | case MVT::f64: { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1642 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1643 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1644 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1645 | ArgOffset += 8; |
| 1646 | break; |
| 1647 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1648 | case MVT::v16i8: |
| 1649 | case MVT::v8i16: |
| 1650 | case MVT::v4i32: |
| 1651 | case MVT::v2i64: |
| 1652 | case MVT::v4f32: |
Evan Cheng | 6b5783d | 2006-05-25 18:56:34 +0000 | [diff] [blame] | 1653 | case MVT::v2f64: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1654 | if (isFastCall) { |
| 1655 | assert(0 && "Unexpected ValueType for argument!"); |
| 1656 | } else { |
| 1657 | if (NumXMMRegs < 4) { |
| 1658 | RegsToPass.push_back(std::make_pair(XMMArgRegs[NumXMMRegs], Arg)); |
| 1659 | NumXMMRegs++; |
| 1660 | } else { |
| 1661 | // XMM arguments have to be aligned on 16-byte boundary. |
| 1662 | ArgOffset = ((ArgOffset + 15) / 16) * 16; |
| 1663 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
| 1664 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1665 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1666 | ArgOffset += 16; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1667 | } |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1668 | } |
| 1669 | break; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1670 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1671 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1672 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1673 | if (!MemOpChains.empty()) |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1674 | Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 1675 | &MemOpChains[0], MemOpChains.size()); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1676 | |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1677 | // Build a sequence of copy-to-reg nodes chained together with token chain |
| 1678 | // and flag operands which copy the outgoing args into registers. |
| 1679 | SDOperand InFlag; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1680 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { |
| 1681 | Chain = DAG.getCopyToReg(Chain, RegsToPass[i].first, RegsToPass[i].second, |
| 1682 | InFlag); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1683 | InFlag = Chain.getValue(1); |
| 1684 | } |
| 1685 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1686 | // If the callee is a GlobalAddress node (quite common, every direct call is) |
| 1687 | // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 1688 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
| 1689 | // We should use extra load for direct calls to dllimported functions |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1690 | if (!Subtarget->GVRequiresExtraLoad(G->getGlobal(), true)) |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 1691 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy()); |
| 1692 | } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1693 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); |
| 1694 | |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1695 | std::vector<MVT::ValueType> NodeTys; |
| 1696 | NodeTys.push_back(MVT::Other); // Returns a chain |
| 1697 | NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. |
| 1698 | std::vector<SDOperand> Ops; |
| 1699 | Ops.push_back(Chain); |
| 1700 | Ops.push_back(Callee); |
Evan Cheng | b69d113 | 2006-06-14 18:17:40 +0000 | [diff] [blame] | 1701 | |
| 1702 | // Add argument registers to the end of the list so that they are known live |
| 1703 | // into the call. |
| 1704 | for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1705 | Ops.push_back(DAG.getRegister(RegsToPass[i].first, |
Evan Cheng | b69d113 | 2006-06-14 18:17:40 +0000 | [diff] [blame] | 1706 | RegsToPass[i].second.getValueType())); |
| 1707 | |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1708 | if (InFlag.Val) |
| 1709 | Ops.push_back(InFlag); |
| 1710 | |
| 1711 | // FIXME: Do not generate X86ISD::TAILCALL for now. |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 1712 | Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1713 | NodeTys, &Ops[0], Ops.size()); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1714 | InFlag = Chain.getValue(1); |
| 1715 | |
| 1716 | NodeTys.clear(); |
| 1717 | NodeTys.push_back(MVT::Other); // Returns a chain |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1718 | if (RetVT != MVT::Other) |
| 1719 | NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1720 | Ops.clear(); |
| 1721 | Ops.push_back(Chain); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1722 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
| 1723 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1724 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1725 | Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1726 | if (RetVT != MVT::Other) |
| 1727 | InFlag = Chain.getValue(1); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1728 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1729 | std::vector<SDOperand> ResultVals; |
| 1730 | NodeTys.clear(); |
| 1731 | switch (RetVT) { |
| 1732 | default: assert(0 && "Unknown value type to return!"); |
| 1733 | case MVT::Other: break; |
| 1734 | case MVT::i8: |
| 1735 | Chain = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag).getValue(1); |
| 1736 | ResultVals.push_back(Chain.getValue(0)); |
| 1737 | NodeTys.push_back(MVT::i8); |
| 1738 | break; |
| 1739 | case MVT::i16: |
| 1740 | Chain = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag).getValue(1); |
| 1741 | ResultVals.push_back(Chain.getValue(0)); |
| 1742 | NodeTys.push_back(MVT::i16); |
| 1743 | break; |
| 1744 | case MVT::i32: |
| 1745 | if (Op.Val->getValueType(1) == MVT::i32) { |
| 1746 | Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1); |
| 1747 | ResultVals.push_back(Chain.getValue(0)); |
| 1748 | Chain = DAG.getCopyFromReg(Chain, X86::EDX, MVT::i32, |
| 1749 | Chain.getValue(2)).getValue(1); |
| 1750 | ResultVals.push_back(Chain.getValue(0)); |
| 1751 | NodeTys.push_back(MVT::i32); |
| 1752 | } else { |
| 1753 | Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1); |
| 1754 | ResultVals.push_back(Chain.getValue(0)); |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1755 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1756 | NodeTys.push_back(MVT::i32); |
| 1757 | break; |
| 1758 | case MVT::v16i8: |
| 1759 | case MVT::v8i16: |
| 1760 | case MVT::v4i32: |
| 1761 | case MVT::v2i64: |
| 1762 | case MVT::v4f32: |
| 1763 | case MVT::v2f64: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1764 | if (isFastCall) { |
| 1765 | assert(0 && "Unknown value type to return!"); |
| 1766 | } else { |
| 1767 | Chain = DAG.getCopyFromReg(Chain, X86::XMM0, RetVT, InFlag).getValue(1); |
| 1768 | ResultVals.push_back(Chain.getValue(0)); |
| 1769 | NodeTys.push_back(RetVT); |
| 1770 | } |
| 1771 | break; |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1772 | case MVT::f32: |
| 1773 | case MVT::f64: { |
| 1774 | std::vector<MVT::ValueType> Tys; |
| 1775 | Tys.push_back(MVT::f64); |
| 1776 | Tys.push_back(MVT::Other); |
| 1777 | Tys.push_back(MVT::Flag); |
| 1778 | std::vector<SDOperand> Ops; |
| 1779 | Ops.push_back(Chain); |
| 1780 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1781 | SDOperand RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, |
| 1782 | &Ops[0], Ops.size()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1783 | Chain = RetVal.getValue(1); |
| 1784 | InFlag = RetVal.getValue(2); |
| 1785 | if (X86ScalarSSE) { |
| 1786 | // FIXME: Currently the FST is flagged to the FP_GET_RESULT. This |
| 1787 | // shouldn't be necessary except that RFP cannot be live across |
| 1788 | // multiple blocks. When stackifier is fixed, they can be uncoupled. |
| 1789 | MachineFunction &MF = DAG.getMachineFunction(); |
| 1790 | int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); |
| 1791 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 1792 | Tys.clear(); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1793 | Tys.push_back(MVT::Other); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1794 | Ops.clear(); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1795 | Ops.push_back(Chain); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1796 | Ops.push_back(RetVal); |
| 1797 | Ops.push_back(StackSlot); |
| 1798 | Ops.push_back(DAG.getValueType(RetVT)); |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1799 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1800 | Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1801 | RetVal = DAG.getLoad(RetVT, Chain, StackSlot, NULL, 0); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1802 | Chain = RetVal.getValue(1); |
| 1803 | } |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 1804 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1805 | if (RetVT == MVT::f32 && !X86ScalarSSE) |
| 1806 | // FIXME: we would really like to remember that this FP_ROUND |
| 1807 | // operation is okay to eliminate if we allow excess FP precision. |
| 1808 | RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal); |
| 1809 | ResultVals.push_back(RetVal); |
| 1810 | NodeTys.push_back(RetVT); |
| 1811 | break; |
| 1812 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1813 | } |
Nate Begeman | 4c5dcf5 | 2006-02-17 00:03:04 +0000 | [diff] [blame] | 1814 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1815 | |
| 1816 | // If the function returns void, just return the chain. |
| 1817 | if (ResultVals.empty()) |
| 1818 | return Chain; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1819 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1820 | // Otherwise, merge everything together with a MERGE_VALUES node. |
| 1821 | NodeTys.push_back(MVT::Other); |
| 1822 | ResultVals.push_back(Chain); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 1823 | SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, NodeTys, |
| 1824 | &ResultVals[0], ResultVals.size()); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 1825 | return Res.getValue(Op.ResNo); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 1826 | } |
| 1827 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1828 | //===----------------------------------------------------------------------===// |
| 1829 | // StdCall Calling Convention implementation |
| 1830 | //===----------------------------------------------------------------------===// |
| 1831 | // StdCall calling convention seems to be standard for many Windows' API |
| 1832 | // routines and around. It differs from C calling convention just a little: |
| 1833 | // callee should clean up the stack, not caller. Symbols should be also |
| 1834 | // decorated in some fancy way :) It doesn't support any vector arguments. |
| 1835 | |
| 1836 | /// HowToPassStdCallCCArgument - Returns how an formal argument of the specified |
| 1837 | /// type should be passed. Returns the size of the stack slot |
| 1838 | static void |
| 1839 | HowToPassStdCallCCArgument(MVT::ValueType ObjectVT, unsigned &ObjSize) { |
| 1840 | switch (ObjectVT) { |
| 1841 | default: assert(0 && "Unhandled argument type!"); |
| 1842 | case MVT::i8: ObjSize = 1; break; |
| 1843 | case MVT::i16: ObjSize = 2; break; |
| 1844 | case MVT::i32: ObjSize = 4; break; |
| 1845 | case MVT::i64: ObjSize = 8; break; |
| 1846 | case MVT::f32: ObjSize = 4; break; |
| 1847 | case MVT::f64: ObjSize = 8; break; |
| 1848 | } |
| 1849 | } |
| 1850 | |
| 1851 | SDOperand X86TargetLowering::LowerStdCallCCArguments(SDOperand Op, |
| 1852 | SelectionDAG &DAG) { |
| 1853 | unsigned NumArgs = Op.Val->getNumValues() - 1; |
| 1854 | MachineFunction &MF = DAG.getMachineFunction(); |
| 1855 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 1856 | SDOperand Root = Op.getOperand(0); |
| 1857 | std::vector<SDOperand> ArgValues; |
| 1858 | |
| 1859 | // Add DAG nodes to load the arguments... On entry to a function on the X86, |
| 1860 | // the stack frame looks like this: |
| 1861 | // |
| 1862 | // [ESP] -- return address |
| 1863 | // [ESP + 4] -- first argument (leftmost lexically) |
| 1864 | // [ESP + 8] -- second argument, if first argument is <= 4 bytes in size |
| 1865 | // ... |
| 1866 | // |
| 1867 | unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot |
| 1868 | for (unsigned i = 0; i < NumArgs; ++i) { |
| 1869 | MVT::ValueType ObjectVT = Op.getValue(i).getValueType(); |
| 1870 | unsigned ArgIncrement = 4; |
| 1871 | unsigned ObjSize = 0; |
| 1872 | HowToPassStdCallCCArgument(ObjectVT, ObjSize); |
| 1873 | if (ObjSize > 4) |
| 1874 | ArgIncrement = ObjSize; |
| 1875 | |
| 1876 | SDOperand ArgValue; |
| 1877 | // Create the frame index object for this incoming parameter... |
| 1878 | int FI = MFI->CreateFixedObject(ObjSize, ArgOffset); |
| 1879 | SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 1880 | ArgValue = DAG.getLoad(Op.Val->getValueType(i), Root, FIN, NULL, 0); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1881 | ArgValues.push_back(ArgValue); |
| 1882 | ArgOffset += ArgIncrement; // Move on to the next argument... |
| 1883 | } |
| 1884 | |
| 1885 | ArgValues.push_back(Root); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1886 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1887 | // If the function takes variable number of arguments, make a frame index for |
| 1888 | // the start of the first vararg value... for expansion of llvm.va_start. |
| 1889 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
| 1890 | if (isVarArg) { |
| 1891 | BytesToPopOnReturn = 0; // Callee pops nothing. |
| 1892 | BytesCallerReserves = ArgOffset; |
| 1893 | VarArgsFrameIndex = MFI->CreateFixedObject(1, ArgOffset); |
| 1894 | } else { |
| 1895 | BytesToPopOnReturn = ArgOffset; // Callee pops everything.. |
| 1896 | BytesCallerReserves = 0; |
| 1897 | } |
| 1898 | RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only. |
| 1899 | ReturnAddrIndex = 0; // No return address slot generated yet. |
| 1900 | |
| 1901 | MF.getInfo<X86FunctionInfo>()->setBytesToPopOnReturn(BytesToPopOnReturn); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1902 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1903 | // Return the new list of results. |
| 1904 | std::vector<MVT::ValueType> RetVTs(Op.Val->value_begin(), |
| 1905 | Op.Val->value_end()); |
| 1906 | return DAG.getNode(ISD::MERGE_VALUES, RetVTs, &ArgValues[0],ArgValues.size()); |
| 1907 | } |
| 1908 | |
| 1909 | |
| 1910 | SDOperand X86TargetLowering::LowerStdCallCCCallTo(SDOperand Op, |
| 1911 | SelectionDAG &DAG) { |
| 1912 | SDOperand Chain = Op.getOperand(0); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1913 | bool isVarArg = cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; |
| 1914 | bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; |
| 1915 | SDOperand Callee = Op.getOperand(4); |
| 1916 | MVT::ValueType RetVT= Op.Val->getValueType(0); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1917 | unsigned NumOps = (Op.getNumOperands() - 5) / 2; |
| 1918 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1919 | // Count how many bytes are to be pushed on the stack. |
| 1920 | unsigned NumBytes = 0; |
| 1921 | for (unsigned i = 0; i != NumOps; ++i) { |
| 1922 | SDOperand Arg = Op.getOperand(5+2*i); |
| 1923 | |
| 1924 | switch (Arg.getValueType()) { |
| 1925 | default: assert(0 && "Unexpected ValueType for argument!"); |
| 1926 | case MVT::i8: |
| 1927 | case MVT::i16: |
| 1928 | case MVT::i32: |
| 1929 | case MVT::f32: |
| 1930 | NumBytes += 4; |
| 1931 | break; |
| 1932 | case MVT::i64: |
| 1933 | case MVT::f64: |
| 1934 | NumBytes += 8; |
| 1935 | break; |
| 1936 | } |
| 1937 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1938 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1939 | Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); |
| 1940 | |
| 1941 | // Arguments go on the stack in reverse order, as specified by the ABI. |
| 1942 | unsigned ArgOffset = 0; |
| 1943 | std::vector<SDOperand> MemOpChains; |
| 1944 | SDOperand StackPtr = DAG.getRegister(X86StackPtr, getPointerTy()); |
| 1945 | for (unsigned i = 0; i != NumOps; ++i) { |
| 1946 | SDOperand Arg = Op.getOperand(5+2*i); |
| 1947 | |
| 1948 | switch (Arg.getValueType()) { |
| 1949 | default: assert(0 && "Unexpected ValueType for argument!"); |
| 1950 | case MVT::i8: |
| 1951 | case MVT::i16: { |
| 1952 | // Promote the integer to 32 bits. If the input type is signed use a |
| 1953 | // sign extend, otherwise use a zero extend. |
| 1954 | unsigned ExtOp = |
| 1955 | dyn_cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue() ? |
| 1956 | ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; |
| 1957 | Arg = DAG.getNode(ExtOp, MVT::i32, Arg); |
| 1958 | } |
| 1959 | // Fallthrough |
| 1960 | |
| 1961 | case MVT::i32: |
| 1962 | case MVT::f32: { |
| 1963 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
| 1964 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1965 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1966 | ArgOffset += 4; |
| 1967 | break; |
| 1968 | } |
| 1969 | case MVT::i64: |
| 1970 | case MVT::f64: { |
| 1971 | SDOperand PtrOff = DAG.getConstant(ArgOffset, getPointerTy()); |
| 1972 | PtrOff = DAG.getNode(ISD::ADD, getPointerTy(), StackPtr, PtrOff); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 1973 | MemOpChains.push_back(DAG.getStore(Chain, Arg, PtrOff, NULL, 0)); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1974 | ArgOffset += 8; |
| 1975 | break; |
| 1976 | } |
| 1977 | } |
| 1978 | } |
| 1979 | |
| 1980 | if (!MemOpChains.empty()) |
| 1981 | Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, |
| 1982 | &MemOpChains[0], MemOpChains.size()); |
| 1983 | |
| 1984 | // If the callee is a GlobalAddress node (quite common, every direct call is) |
| 1985 | // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 1986 | if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { |
| 1987 | // We should use extra load for direct calls to dllimported functions |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 1988 | if (!Subtarget->GVRequiresExtraLoad(G->getGlobal(), true)) |
Anton Korobeynikov | a598685 | 2006-11-20 10:46:14 +0000 | [diff] [blame] | 1989 | Callee = DAG.getTargetGlobalAddress(G->getGlobal(), getPointerTy()); |
| 1990 | } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 1991 | Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); |
| 1992 | |
| 1993 | std::vector<MVT::ValueType> NodeTys; |
| 1994 | NodeTys.push_back(MVT::Other); // Returns a chain |
| 1995 | NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. |
| 1996 | std::vector<SDOperand> Ops; |
| 1997 | Ops.push_back(Chain); |
| 1998 | Ops.push_back(Callee); |
| 1999 | |
| 2000 | Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, |
| 2001 | NodeTys, &Ops[0], Ops.size()); |
| 2002 | SDOperand InFlag = Chain.getValue(1); |
| 2003 | |
| 2004 | // Create the CALLSEQ_END node. |
| 2005 | unsigned NumBytesForCalleeToPush; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2006 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2007 | if (isVarArg) { |
| 2008 | NumBytesForCalleeToPush = 0; |
| 2009 | } else { |
| 2010 | NumBytesForCalleeToPush = NumBytes; |
| 2011 | } |
| 2012 | |
| 2013 | NodeTys.clear(); |
| 2014 | NodeTys.push_back(MVT::Other); // Returns a chain |
| 2015 | if (RetVT != MVT::Other) |
| 2016 | NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use. |
| 2017 | Ops.clear(); |
| 2018 | Ops.push_back(Chain); |
| 2019 | Ops.push_back(DAG.getConstant(NumBytes, getPointerTy())); |
| 2020 | Ops.push_back(DAG.getConstant(NumBytesForCalleeToPush, getPointerTy())); |
| 2021 | Ops.push_back(InFlag); |
| 2022 | Chain = DAG.getNode(ISD::CALLSEQ_END, NodeTys, &Ops[0], Ops.size()); |
| 2023 | if (RetVT != MVT::Other) |
| 2024 | InFlag = Chain.getValue(1); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2025 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2026 | std::vector<SDOperand> ResultVals; |
| 2027 | NodeTys.clear(); |
| 2028 | switch (RetVT) { |
| 2029 | default: assert(0 && "Unknown value type to return!"); |
| 2030 | case MVT::Other: break; |
| 2031 | case MVT::i8: |
| 2032 | Chain = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag).getValue(1); |
| 2033 | ResultVals.push_back(Chain.getValue(0)); |
| 2034 | NodeTys.push_back(MVT::i8); |
| 2035 | break; |
| 2036 | case MVT::i16: |
| 2037 | Chain = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag).getValue(1); |
| 2038 | ResultVals.push_back(Chain.getValue(0)); |
| 2039 | NodeTys.push_back(MVT::i16); |
| 2040 | break; |
| 2041 | case MVT::i32: |
| 2042 | if (Op.Val->getValueType(1) == MVT::i32) { |
| 2043 | Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1); |
| 2044 | ResultVals.push_back(Chain.getValue(0)); |
| 2045 | Chain = DAG.getCopyFromReg(Chain, X86::EDX, MVT::i32, |
| 2046 | Chain.getValue(2)).getValue(1); |
| 2047 | ResultVals.push_back(Chain.getValue(0)); |
| 2048 | NodeTys.push_back(MVT::i32); |
| 2049 | } else { |
| 2050 | Chain = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, InFlag).getValue(1); |
| 2051 | ResultVals.push_back(Chain.getValue(0)); |
| 2052 | } |
| 2053 | NodeTys.push_back(MVT::i32); |
| 2054 | break; |
| 2055 | case MVT::f32: |
| 2056 | case MVT::f64: { |
| 2057 | std::vector<MVT::ValueType> Tys; |
| 2058 | Tys.push_back(MVT::f64); |
| 2059 | Tys.push_back(MVT::Other); |
| 2060 | Tys.push_back(MVT::Flag); |
| 2061 | std::vector<SDOperand> Ops; |
| 2062 | Ops.push_back(Chain); |
| 2063 | Ops.push_back(InFlag); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2064 | SDOperand RetVal = DAG.getNode(X86ISD::FP_GET_RESULT, Tys, |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2065 | &Ops[0], Ops.size()); |
| 2066 | Chain = RetVal.getValue(1); |
| 2067 | InFlag = RetVal.getValue(2); |
| 2068 | if (X86ScalarSSE) { |
| 2069 | // FIXME: Currently the FST is flagged to the FP_GET_RESULT. This |
| 2070 | // shouldn't be necessary except that RFP cannot be live across |
| 2071 | // multiple blocks. When stackifier is fixed, they can be uncoupled. |
| 2072 | MachineFunction &MF = DAG.getMachineFunction(); |
| 2073 | int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); |
| 2074 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 2075 | Tys.clear(); |
| 2076 | Tys.push_back(MVT::Other); |
| 2077 | Ops.clear(); |
| 2078 | Ops.push_back(Chain); |
| 2079 | Ops.push_back(RetVal); |
| 2080 | Ops.push_back(StackSlot); |
| 2081 | Ops.push_back(DAG.getValueType(RetVT)); |
| 2082 | Ops.push_back(InFlag); |
| 2083 | Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 2084 | RetVal = DAG.getLoad(RetVT, Chain, StackSlot, NULL, 0); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2085 | Chain = RetVal.getValue(1); |
| 2086 | } |
| 2087 | |
| 2088 | if (RetVT == MVT::f32 && !X86ScalarSSE) |
| 2089 | // FIXME: we would really like to remember that this FP_ROUND |
| 2090 | // operation is okay to eliminate if we allow excess FP precision. |
| 2091 | RetVal = DAG.getNode(ISD::FP_ROUND, MVT::f32, RetVal); |
| 2092 | ResultVals.push_back(RetVal); |
| 2093 | NodeTys.push_back(RetVT); |
| 2094 | break; |
| 2095 | } |
| 2096 | } |
| 2097 | |
| 2098 | // If the function returns void, just return the chain. |
| 2099 | if (ResultVals.empty()) |
| 2100 | return Chain; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2101 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2102 | // Otherwise, merge everything together with a MERGE_VALUES node. |
| 2103 | NodeTys.push_back(MVT::Other); |
| 2104 | ResultVals.push_back(Chain); |
| 2105 | SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, NodeTys, |
| 2106 | &ResultVals[0], ResultVals.size()); |
| 2107 | return Res.getValue(Op.ResNo); |
| 2108 | } |
| 2109 | |
| 2110 | //===----------------------------------------------------------------------===// |
| 2111 | // FastCall Calling Convention implementation |
| 2112 | //===----------------------------------------------------------------------===// |
| 2113 | // |
| 2114 | // The X86 'fastcall' calling convention passes up to two integer arguments in |
| 2115 | // registers (an appropriate portion of ECX/EDX), passes arguments in C order, |
| 2116 | // and requires that the callee pop its arguments off the stack (allowing proper |
| 2117 | // tail calls), and has the same return value conventions as C calling convs. |
| 2118 | // |
| 2119 | // This calling convention always arranges for the callee pop value to be 8n+4 |
| 2120 | // bytes, which is needed for tail recursion elimination and stack alignment |
| 2121 | // reasons. |
| 2122 | // |
| 2123 | |
| 2124 | /// HowToPassFastCallCCArgument - Returns how an formal argument of the |
| 2125 | /// specified type should be passed. If it is through stack, returns the size of |
| 2126 | /// the stack slot; if it is through integer register, returns the number of |
| 2127 | /// integer registers are needed. |
| 2128 | static void |
| 2129 | HowToPassFastCallCCArgument(MVT::ValueType ObjectVT, |
| 2130 | unsigned NumIntRegs, |
| 2131 | unsigned &ObjSize, |
| 2132 | unsigned &ObjIntRegs) |
| 2133 | { |
| 2134 | ObjSize = 0; |
| 2135 | ObjIntRegs = 0; |
| 2136 | |
| 2137 | switch (ObjectVT) { |
| 2138 | default: assert(0 && "Unhandled argument type!"); |
| 2139 | case MVT::i8: |
| 2140 | if (NumIntRegs < 2) |
| 2141 | ObjIntRegs = 1; |
| 2142 | else |
| 2143 | ObjSize = 1; |
| 2144 | break; |
| 2145 | case MVT::i16: |
| 2146 | if (NumIntRegs < 2) |
| 2147 | ObjIntRegs = 1; |
| 2148 | else |
| 2149 | ObjSize = 2; |
| 2150 | break; |
| 2151 | case MVT::i32: |
| 2152 | if (NumIntRegs < 2) |
| 2153 | ObjIntRegs = 1; |
| 2154 | else |
| 2155 | ObjSize = 4; |
| 2156 | break; |
| 2157 | case MVT::i64: |
| 2158 | if (NumIntRegs+2 <= 2) { |
| 2159 | ObjIntRegs = 2; |
| 2160 | } else if (NumIntRegs+1 <= 2) { |
| 2161 | ObjIntRegs = 1; |
| 2162 | ObjSize = 4; |
| 2163 | } else |
| 2164 | ObjSize = 8; |
| 2165 | case MVT::f32: |
| 2166 | ObjSize = 4; |
| 2167 | break; |
| 2168 | case MVT::f64: |
| 2169 | ObjSize = 8; |
| 2170 | break; |
| 2171 | } |
| 2172 | } |
| 2173 | |
| 2174 | SDOperand |
| 2175 | X86TargetLowering::LowerFastCallCCArguments(SDOperand Op, SelectionDAG &DAG) { |
| 2176 | unsigned NumArgs = Op.Val->getNumValues()-1; |
| 2177 | MachineFunction &MF = DAG.getMachineFunction(); |
| 2178 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 2179 | SDOperand Root = Op.getOperand(0); |
| 2180 | std::vector<SDOperand> ArgValues; |
| 2181 | |
| 2182 | // Add DAG nodes to load the arguments... On entry to a function the stack |
| 2183 | // frame looks like this: |
| 2184 | // |
| 2185 | // [ESP] -- return address |
| 2186 | // [ESP + 4] -- first nonreg argument (leftmost lexically) |
| 2187 | // [ESP + 8] -- second nonreg argument, if 1st argument is <= 4 bytes in size |
| 2188 | // ... |
| 2189 | unsigned ArgOffset = 0; // Frame mechanisms handle retaddr slot |
| 2190 | |
| 2191 | // Keep track of the number of integer regs passed so far. This can be either |
| 2192 | // 0 (neither ECX or EDX used), 1 (ECX is used) or 2 (ECX and EDX are both |
| 2193 | // used). |
| 2194 | unsigned NumIntRegs = 0; |
| 2195 | |
| 2196 | for (unsigned i = 0; i < NumArgs; ++i) { |
| 2197 | MVT::ValueType ObjectVT = Op.getValue(i).getValueType(); |
| 2198 | unsigned ArgIncrement = 4; |
| 2199 | unsigned ObjSize = 0; |
| 2200 | unsigned ObjIntRegs = 0; |
| 2201 | |
| 2202 | HowToPassFastCallCCArgument(ObjectVT, NumIntRegs, ObjSize, ObjIntRegs); |
| 2203 | if (ObjSize > 4) |
| 2204 | ArgIncrement = ObjSize; |
| 2205 | |
| 2206 | unsigned Reg = 0; |
| 2207 | SDOperand ArgValue; |
| 2208 | if (ObjIntRegs) { |
| 2209 | switch (ObjectVT) { |
| 2210 | default: assert(0 && "Unhandled argument type!"); |
| 2211 | case MVT::i8: |
| 2212 | Reg = AddLiveIn(MF, NumIntRegs ? X86::DL : X86::CL, |
| 2213 | X86::GR8RegisterClass); |
| 2214 | ArgValue = DAG.getCopyFromReg(Root, Reg, MVT::i8); |
| 2215 | break; |
| 2216 | case MVT::i16: |
| 2217 | Reg = AddLiveIn(MF, NumIntRegs ? X86::DX : X86::CX, |
| 2218 | X86::GR16RegisterClass); |
| 2219 | ArgValue = DAG.getCopyFromReg(Root, Reg, MVT::i16); |
| 2220 | break; |
| 2221 | case MVT::i32: |
| 2222 | Reg = AddLiveIn(MF, NumIntRegs ? X86::EDX : X86::ECX, |
| 2223 | X86::GR32RegisterClass); |
| 2224 | ArgValue = DAG.getCopyFromReg(Root, Reg, MVT::i32); |
| 2225 | break; |
| 2226 | case MVT::i64: |
| 2227 | Reg = AddLiveIn(MF, NumIntRegs ? X86::EDX : X86::ECX, |
| 2228 | X86::GR32RegisterClass); |
| 2229 | ArgValue = DAG.getCopyFromReg(Root, Reg, MVT::i32); |
| 2230 | if (ObjIntRegs == 2) { |
| 2231 | Reg = AddLiveIn(MF, X86::EDX, X86::GR32RegisterClass); |
| 2232 | SDOperand ArgValue2 = DAG.getCopyFromReg(Root, Reg, MVT::i32); |
| 2233 | ArgValue= DAG.getNode(ISD::BUILD_PAIR, MVT::i64, ArgValue, ArgValue2); |
| 2234 | } |
| 2235 | break; |
| 2236 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2237 | |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2238 | NumIntRegs += ObjIntRegs; |
| 2239 | } |
| 2240 | |
| 2241 | if (ObjSize) { |
| 2242 | // Create the SelectionDAG nodes corresponding to a load from this |
| 2243 | // parameter. |
| 2244 | int FI = MFI->CreateFixedObject(ObjSize, ArgOffset); |
| 2245 | SDOperand FIN = DAG.getFrameIndex(FI, getPointerTy()); |
| 2246 | if (ObjectVT == MVT::i64 && ObjIntRegs) { |
| 2247 | SDOperand ArgValue2 = DAG.getLoad(Op.Val->getValueType(i), Root, FIN, |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 2248 | NULL, 0); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2249 | ArgValue = DAG.getNode(ISD::BUILD_PAIR, MVT::i64, ArgValue, ArgValue2); |
| 2250 | } else |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 2251 | ArgValue = DAG.getLoad(Op.Val->getValueType(i), Root, FIN, NULL, 0); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2252 | ArgOffset += ArgIncrement; // Move on to the next argument. |
| 2253 | } |
| 2254 | |
| 2255 | ArgValues.push_back(ArgValue); |
| 2256 | } |
| 2257 | |
| 2258 | ArgValues.push_back(Root); |
| 2259 | |
| 2260 | // Make sure the instruction takes 8n+4 bytes to make sure the start of the |
| 2261 | // arguments and the arguments after the retaddr has been pushed are aligned. |
| 2262 | if ((ArgOffset & 7) == 0) |
| 2263 | ArgOffset += 4; |
| 2264 | |
| 2265 | VarArgsFrameIndex = 0xAAAAAAA; // fastcc functions can't have varargs. |
| 2266 | RegSaveFrameIndex = 0xAAAAAAA; // X86-64 only. |
| 2267 | ReturnAddrIndex = 0; // No return address slot generated yet. |
| 2268 | BytesToPopOnReturn = ArgOffset; // Callee pops all stack arguments. |
| 2269 | BytesCallerReserves = 0; |
| 2270 | |
| 2271 | MF.getInfo<X86FunctionInfo>()->setBytesToPopOnReturn(BytesToPopOnReturn); |
| 2272 | |
| 2273 | // Finally, inform the code generator which regs we return values in. |
| 2274 | switch (getValueType(MF.getFunction()->getReturnType())) { |
| 2275 | default: assert(0 && "Unknown type!"); |
| 2276 | case MVT::isVoid: break; |
Chris Lattner | 13bf6c1 | 2006-10-03 17:18:42 +0000 | [diff] [blame] | 2277 | case MVT::i1: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 2278 | case MVT::i8: |
| 2279 | case MVT::i16: |
| 2280 | case MVT::i32: |
| 2281 | MF.addLiveOut(X86::ECX); |
| 2282 | break; |
| 2283 | case MVT::i64: |
| 2284 | MF.addLiveOut(X86::ECX); |
| 2285 | MF.addLiveOut(X86::EDX); |
| 2286 | break; |
| 2287 | case MVT::f32: |
| 2288 | case MVT::f64: |
| 2289 | MF.addLiveOut(X86::ST0); |
| 2290 | break; |
| 2291 | } |
| 2292 | |
| 2293 | // Return the new list of results. |
| 2294 | std::vector<MVT::ValueType> RetVTs(Op.Val->value_begin(), |
| 2295 | Op.Val->value_end()); |
| 2296 | return DAG.getNode(ISD::MERGE_VALUES, RetVTs, &ArgValues[0],ArgValues.size()); |
| 2297 | } |
| 2298 | |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 2299 | SDOperand X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) { |
| 2300 | if (ReturnAddrIndex == 0) { |
| 2301 | // Set up a frame object for the return address. |
| 2302 | MachineFunction &MF = DAG.getMachineFunction(); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2303 | if (Subtarget->is64Bit()) |
| 2304 | ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(8, -8); |
| 2305 | else |
| 2306 | ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(4, -4); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 2307 | } |
| 2308 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2309 | return DAG.getFrameIndex(ReturnAddrIndex, getPointerTy()); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 2310 | } |
| 2311 | |
| 2312 | |
| 2313 | |
| 2314 | std::pair<SDOperand, SDOperand> X86TargetLowering:: |
| 2315 | LowerFrameReturnAddress(bool isFrameAddress, SDOperand Chain, unsigned Depth, |
| 2316 | SelectionDAG &DAG) { |
| 2317 | SDOperand Result; |
| 2318 | if (Depth) // Depths > 0 not supported yet! |
| 2319 | Result = DAG.getConstant(0, getPointerTy()); |
| 2320 | else { |
| 2321 | SDOperand RetAddrFI = getReturnAddressFrameIndex(DAG); |
| 2322 | if (!isFrameAddress) |
| 2323 | // Just load the return address |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2324 | Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), RetAddrFI, |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 2325 | NULL, 0); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 2326 | else |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 2327 | Result = DAG.getNode(ISD::SUB, getPointerTy(), RetAddrFI, |
| 2328 | DAG.getConstant(4, getPointerTy())); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 2329 | } |
| 2330 | return std::make_pair(Result, Chain); |
| 2331 | } |
| 2332 | |
Evan Cheng | 6dfa999 | 2006-01-30 23:41:35 +0000 | [diff] [blame] | 2333 | /// translateX86CC - do a one to one translation of a ISD::CondCode to the X86 |
| 2334 | /// specific condition code. It returns a false if it cannot do a direct |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 2335 | /// translation. X86CC is the translated CondCode. LHS/RHS are modified as |
| 2336 | /// needed. |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 2337 | static bool translateX86CC(ISD::CondCode SetCCOpcode, bool isFP, |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 2338 | unsigned &X86CC, SDOperand &LHS, SDOperand &RHS, |
| 2339 | SelectionDAG &DAG) { |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2340 | X86CC = X86::COND_INVALID; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2341 | if (!isFP) { |
Chris Lattner | bfd68a7 | 2006-09-13 17:04:54 +0000 | [diff] [blame] | 2342 | if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS)) { |
| 2343 | if (SetCCOpcode == ISD::SETGT && RHSC->isAllOnesValue()) { |
| 2344 | // X > -1 -> X == 0, jump !sign. |
| 2345 | RHS = DAG.getConstant(0, RHS.getValueType()); |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2346 | X86CC = X86::COND_NS; |
Chris Lattner | bfd68a7 | 2006-09-13 17:04:54 +0000 | [diff] [blame] | 2347 | return true; |
| 2348 | } else if (SetCCOpcode == ISD::SETLT && RHSC->isNullValue()) { |
| 2349 | // X < 0 -> X == 0, jump on sign. |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2350 | X86CC = X86::COND_S; |
Chris Lattner | bfd68a7 | 2006-09-13 17:04:54 +0000 | [diff] [blame] | 2351 | return true; |
| 2352 | } |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 2353 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2354 | |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2355 | switch (SetCCOpcode) { |
| 2356 | default: break; |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2357 | case ISD::SETEQ: X86CC = X86::COND_E; break; |
| 2358 | case ISD::SETGT: X86CC = X86::COND_G; break; |
| 2359 | case ISD::SETGE: X86CC = X86::COND_GE; break; |
| 2360 | case ISD::SETLT: X86CC = X86::COND_L; break; |
| 2361 | case ISD::SETLE: X86CC = X86::COND_LE; break; |
| 2362 | case ISD::SETNE: X86CC = X86::COND_NE; break; |
| 2363 | case ISD::SETULT: X86CC = X86::COND_B; break; |
| 2364 | case ISD::SETUGT: X86CC = X86::COND_A; break; |
| 2365 | case ISD::SETULE: X86CC = X86::COND_BE; break; |
| 2366 | case ISD::SETUGE: X86CC = X86::COND_AE; break; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2367 | } |
| 2368 | } else { |
| 2369 | // On a floating point condition, the flags are set as follows: |
| 2370 | // ZF PF CF op |
| 2371 | // 0 | 0 | 0 | X > Y |
| 2372 | // 0 | 0 | 1 | X < Y |
| 2373 | // 1 | 0 | 0 | X == Y |
| 2374 | // 1 | 1 | 1 | unordered |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 2375 | bool Flip = false; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2376 | switch (SetCCOpcode) { |
| 2377 | default: break; |
| 2378 | case ISD::SETUEQ: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2379 | case ISD::SETEQ: X86CC = X86::COND_E; break; |
Evan Cheng | 5001ea1 | 2006-04-17 07:24:10 +0000 | [diff] [blame] | 2380 | case ISD::SETOLT: Flip = true; // Fallthrough |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2381 | case ISD::SETOGT: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2382 | case ISD::SETGT: X86CC = X86::COND_A; break; |
Evan Cheng | 5001ea1 | 2006-04-17 07:24:10 +0000 | [diff] [blame] | 2383 | case ISD::SETOLE: Flip = true; // Fallthrough |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2384 | case ISD::SETOGE: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2385 | case ISD::SETGE: X86CC = X86::COND_AE; break; |
Evan Cheng | 5001ea1 | 2006-04-17 07:24:10 +0000 | [diff] [blame] | 2386 | case ISD::SETUGT: Flip = true; // Fallthrough |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2387 | case ISD::SETULT: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2388 | case ISD::SETLT: X86CC = X86::COND_B; break; |
Evan Cheng | 5001ea1 | 2006-04-17 07:24:10 +0000 | [diff] [blame] | 2389 | case ISD::SETUGE: Flip = true; // Fallthrough |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2390 | case ISD::SETULE: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2391 | case ISD::SETLE: X86CC = X86::COND_BE; break; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2392 | case ISD::SETONE: |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2393 | case ISD::SETNE: X86CC = X86::COND_NE; break; |
| 2394 | case ISD::SETUO: X86CC = X86::COND_P; break; |
| 2395 | case ISD::SETO: X86CC = X86::COND_NP; break; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2396 | } |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 2397 | if (Flip) |
| 2398 | std::swap(LHS, RHS); |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2399 | } |
Evan Cheng | 6dfa999 | 2006-01-30 23:41:35 +0000 | [diff] [blame] | 2400 | |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2401 | return X86CC != X86::COND_INVALID; |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 2402 | } |
| 2403 | |
Evan Cheng | 4a46080 | 2006-01-11 00:33:36 +0000 | [diff] [blame] | 2404 | /// hasFPCMov - is there a floating point cmov for the specific X86 condition |
| 2405 | /// code. Current x86 isa includes the following FP cmov instructions: |
Evan Cheng | aaca22c | 2006-01-10 20:26:56 +0000 | [diff] [blame] | 2406 | /// fcmovb, fcomvbe, fcomve, fcmovu, fcmovae, fcmova, fcmovne, fcmovnu. |
Evan Cheng | 4a46080 | 2006-01-11 00:33:36 +0000 | [diff] [blame] | 2407 | static bool hasFPCMov(unsigned X86CC) { |
Evan Cheng | aaca22c | 2006-01-10 20:26:56 +0000 | [diff] [blame] | 2408 | switch (X86CC) { |
| 2409 | default: |
| 2410 | return false; |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 2411 | case X86::COND_B: |
| 2412 | case X86::COND_BE: |
| 2413 | case X86::COND_E: |
| 2414 | case X86::COND_P: |
| 2415 | case X86::COND_A: |
| 2416 | case X86::COND_AE: |
| 2417 | case X86::COND_NE: |
| 2418 | case X86::COND_NP: |
Evan Cheng | aaca22c | 2006-01-10 20:26:56 +0000 | [diff] [blame] | 2419 | return true; |
| 2420 | } |
| 2421 | } |
| 2422 | |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2423 | /// isUndefOrInRange - Op is either an undef node or a ConstantSDNode. Return |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2424 | /// true if Op is undef or if its value falls within the specified range (L, H]. |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2425 | static bool isUndefOrInRange(SDOperand Op, unsigned Low, unsigned Hi) { |
| 2426 | if (Op.getOpcode() == ISD::UNDEF) |
| 2427 | return true; |
| 2428 | |
| 2429 | unsigned Val = cast<ConstantSDNode>(Op)->getValue(); |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2430 | return (Val >= Low && Val < Hi); |
| 2431 | } |
| 2432 | |
| 2433 | /// isUndefOrEqual - Op is either an undef node or a ConstantSDNode. Return |
| 2434 | /// true if Op is undef or if its value equal to the specified value. |
| 2435 | static bool isUndefOrEqual(SDOperand Op, unsigned Val) { |
| 2436 | if (Op.getOpcode() == ISD::UNDEF) |
| 2437 | return true; |
| 2438 | return cast<ConstantSDNode>(Op)->getValue() == Val; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2439 | } |
| 2440 | |
Evan Cheng | 0188ecb | 2006-03-22 18:59:22 +0000 | [diff] [blame] | 2441 | /// isPSHUFDMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2442 | /// specifies a shuffle of elements that is suitable for input to PSHUFD. |
| 2443 | bool X86::isPSHUFDMask(SDNode *N) { |
| 2444 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2445 | |
| 2446 | if (N->getNumOperands() != 4) |
| 2447 | return false; |
| 2448 | |
| 2449 | // Check if the value doesn't reference the second vector. |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2450 | for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2451 | SDOperand Arg = N->getOperand(i); |
| 2452 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2453 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2454 | if (cast<ConstantSDNode>(Arg)->getValue() >= 4) |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2455 | return false; |
| 2456 | } |
| 2457 | |
| 2458 | return true; |
| 2459 | } |
| 2460 | |
| 2461 | /// isPSHUFHWMask - Return true if the specified VECTOR_SHUFFLE operand |
Evan Cheng | c21a053 | 2006-04-05 01:47:37 +0000 | [diff] [blame] | 2462 | /// specifies a shuffle of elements that is suitable for input to PSHUFHW. |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2463 | bool X86::isPSHUFHWMask(SDNode *N) { |
| 2464 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2465 | |
| 2466 | if (N->getNumOperands() != 8) |
| 2467 | return false; |
| 2468 | |
| 2469 | // Lower quadword copied in order. |
| 2470 | for (unsigned i = 0; i != 4; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2471 | SDOperand Arg = N->getOperand(i); |
| 2472 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2473 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2474 | if (cast<ConstantSDNode>(Arg)->getValue() != i) |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2475 | return false; |
| 2476 | } |
| 2477 | |
| 2478 | // Upper quadword shuffled. |
| 2479 | for (unsigned i = 4; i != 8; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2480 | SDOperand Arg = N->getOperand(i); |
| 2481 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2482 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2483 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2484 | if (Val < 4 || Val > 7) |
| 2485 | return false; |
| 2486 | } |
| 2487 | |
| 2488 | return true; |
| 2489 | } |
| 2490 | |
| 2491 | /// isPSHUFLWMask - Return true if the specified VECTOR_SHUFFLE operand |
Evan Cheng | c21a053 | 2006-04-05 01:47:37 +0000 | [diff] [blame] | 2492 | /// specifies a shuffle of elements that is suitable for input to PSHUFLW. |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2493 | bool X86::isPSHUFLWMask(SDNode *N) { |
| 2494 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2495 | |
| 2496 | if (N->getNumOperands() != 8) |
| 2497 | return false; |
| 2498 | |
| 2499 | // Upper quadword copied in order. |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2500 | for (unsigned i = 4; i != 8; ++i) |
| 2501 | if (!isUndefOrEqual(N->getOperand(i), i)) |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2502 | return false; |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2503 | |
| 2504 | // Lower quadword shuffled. |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2505 | for (unsigned i = 0; i != 4; ++i) |
| 2506 | if (!isUndefOrInRange(N->getOperand(i), 0, 4)) |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2507 | return false; |
Evan Cheng | 0188ecb | 2006-03-22 18:59:22 +0000 | [diff] [blame] | 2508 | |
| 2509 | return true; |
| 2510 | } |
| 2511 | |
Evan Cheng | 14aed5e | 2006-03-24 01:18:28 +0000 | [diff] [blame] | 2512 | /// isSHUFPMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2513 | /// specifies a shuffle of elements that is suitable for input to SHUFP*. |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2514 | static bool isSHUFPMask(std::vector<SDOperand> &N) { |
| 2515 | unsigned NumElems = N.size(); |
| 2516 | if (NumElems != 2 && NumElems != 4) return false; |
Evan Cheng | 14aed5e | 2006-03-24 01:18:28 +0000 | [diff] [blame] | 2517 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2518 | unsigned Half = NumElems / 2; |
| 2519 | for (unsigned i = 0; i < Half; ++i) |
| 2520 | if (!isUndefOrInRange(N[i], 0, NumElems)) |
| 2521 | return false; |
| 2522 | for (unsigned i = Half; i < NumElems; ++i) |
| 2523 | if (!isUndefOrInRange(N[i], NumElems, NumElems*2)) |
| 2524 | return false; |
Evan Cheng | 14aed5e | 2006-03-24 01:18:28 +0000 | [diff] [blame] | 2525 | |
| 2526 | return true; |
| 2527 | } |
| 2528 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2529 | bool X86::isSHUFPMask(SDNode *N) { |
| 2530 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2531 | std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); |
| 2532 | return ::isSHUFPMask(Ops); |
| 2533 | } |
| 2534 | |
| 2535 | /// isCommutedSHUFP - Returns true if the shuffle mask is except |
| 2536 | /// the reverse of what x86 shuffles want. x86 shuffles requires the lower |
| 2537 | /// half elements to come from vector 1 (which would equal the dest.) and |
| 2538 | /// the upper half to come from vector 2. |
| 2539 | static bool isCommutedSHUFP(std::vector<SDOperand> &Ops) { |
| 2540 | unsigned NumElems = Ops.size(); |
| 2541 | if (NumElems != 2 && NumElems != 4) return false; |
| 2542 | |
| 2543 | unsigned Half = NumElems / 2; |
| 2544 | for (unsigned i = 0; i < Half; ++i) |
| 2545 | if (!isUndefOrInRange(Ops[i], NumElems, NumElems*2)) |
| 2546 | return false; |
| 2547 | for (unsigned i = Half; i < NumElems; ++i) |
| 2548 | if (!isUndefOrInRange(Ops[i], 0, NumElems)) |
| 2549 | return false; |
| 2550 | return true; |
| 2551 | } |
| 2552 | |
| 2553 | static bool isCommutedSHUFP(SDNode *N) { |
| 2554 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2555 | std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); |
| 2556 | return isCommutedSHUFP(Ops); |
| 2557 | } |
| 2558 | |
Evan Cheng | 2c0dbd0 | 2006-03-24 02:58:06 +0000 | [diff] [blame] | 2559 | /// isMOVHLPSMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2560 | /// specifies a shuffle of elements that is suitable for input to MOVHLPS. |
| 2561 | bool X86::isMOVHLPSMask(SDNode *N) { |
| 2562 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2563 | |
Evan Cheng | 2064a2b | 2006-03-28 06:50:32 +0000 | [diff] [blame] | 2564 | if (N->getNumOperands() != 4) |
Evan Cheng | 2c0dbd0 | 2006-03-24 02:58:06 +0000 | [diff] [blame] | 2565 | return false; |
| 2566 | |
Evan Cheng | 2064a2b | 2006-03-28 06:50:32 +0000 | [diff] [blame] | 2567 | // Expect bit0 == 6, bit1 == 7, bit2 == 2, bit3 == 3 |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2568 | return isUndefOrEqual(N->getOperand(0), 6) && |
| 2569 | isUndefOrEqual(N->getOperand(1), 7) && |
| 2570 | isUndefOrEqual(N->getOperand(2), 2) && |
| 2571 | isUndefOrEqual(N->getOperand(3), 3); |
Evan Cheng | 2064a2b | 2006-03-28 06:50:32 +0000 | [diff] [blame] | 2572 | } |
| 2573 | |
Evan Cheng | 6e56e2c | 2006-11-07 22:14:24 +0000 | [diff] [blame] | 2574 | /// isMOVHLPS_v_undef_Mask - Special case of isMOVHLPSMask for canonical form |
| 2575 | /// of vector_shuffle v, v, <2, 3, 2, 3>, i.e. vector_shuffle v, undef, |
| 2576 | /// <2, 3, 2, 3> |
| 2577 | bool X86::isMOVHLPS_v_undef_Mask(SDNode *N) { |
| 2578 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2579 | |
| 2580 | if (N->getNumOperands() != 4) |
| 2581 | return false; |
| 2582 | |
| 2583 | // Expect bit0 == 2, bit1 == 3, bit2 == 2, bit3 == 3 |
| 2584 | return isUndefOrEqual(N->getOperand(0), 2) && |
| 2585 | isUndefOrEqual(N->getOperand(1), 3) && |
| 2586 | isUndefOrEqual(N->getOperand(2), 2) && |
| 2587 | isUndefOrEqual(N->getOperand(3), 3); |
| 2588 | } |
| 2589 | |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2590 | /// isMOVLPMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2591 | /// specifies a shuffle of elements that is suitable for input to MOVLP{S|D}. |
| 2592 | bool X86::isMOVLPMask(SDNode *N) { |
| 2593 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2594 | |
| 2595 | unsigned NumElems = N->getNumOperands(); |
| 2596 | if (NumElems != 2 && NumElems != 4) |
| 2597 | return false; |
| 2598 | |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2599 | for (unsigned i = 0; i < NumElems/2; ++i) |
| 2600 | if (!isUndefOrEqual(N->getOperand(i), i + NumElems)) |
| 2601 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2602 | |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2603 | for (unsigned i = NumElems/2; i < NumElems; ++i) |
| 2604 | if (!isUndefOrEqual(N->getOperand(i), i)) |
| 2605 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2606 | |
| 2607 | return true; |
| 2608 | } |
| 2609 | |
| 2610 | /// isMOVHPMask - Return true if the specified VECTOR_SHUFFLE operand |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 2611 | /// specifies a shuffle of elements that is suitable for input to MOVHP{S|D} |
| 2612 | /// and MOVLHPS. |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2613 | bool X86::isMOVHPMask(SDNode *N) { |
| 2614 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2615 | |
| 2616 | unsigned NumElems = N->getNumOperands(); |
| 2617 | if (NumElems != 2 && NumElems != 4) |
| 2618 | return false; |
| 2619 | |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2620 | for (unsigned i = 0; i < NumElems/2; ++i) |
| 2621 | if (!isUndefOrEqual(N->getOperand(i), i)) |
| 2622 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2623 | |
| 2624 | for (unsigned i = 0; i < NumElems/2; ++i) { |
| 2625 | SDOperand Arg = N->getOperand(i + NumElems/2); |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2626 | if (!isUndefOrEqual(Arg, i + NumElems)) |
| 2627 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2628 | } |
| 2629 | |
| 2630 | return true; |
| 2631 | } |
| 2632 | |
Evan Cheng | 0038e59 | 2006-03-28 00:39:58 +0000 | [diff] [blame] | 2633 | /// isUNPCKLMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2634 | /// specifies a shuffle of elements that is suitable for input to UNPCKL. |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2635 | bool static isUNPCKLMask(std::vector<SDOperand> &N, bool V2IsSplat = false) { |
| 2636 | unsigned NumElems = N.size(); |
Evan Cheng | 0038e59 | 2006-03-28 00:39:58 +0000 | [diff] [blame] | 2637 | if (NumElems != 2 && NumElems != 4 && NumElems != 8 && NumElems != 16) |
| 2638 | return false; |
| 2639 | |
| 2640 | for (unsigned i = 0, j = 0; i != NumElems; i += 2, ++j) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2641 | SDOperand BitI = N[i]; |
| 2642 | SDOperand BitI1 = N[i+1]; |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2643 | if (!isUndefOrEqual(BitI, j)) |
| 2644 | return false; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2645 | if (V2IsSplat) { |
| 2646 | if (isUndefOrEqual(BitI1, NumElems)) |
| 2647 | return false; |
| 2648 | } else { |
| 2649 | if (!isUndefOrEqual(BitI1, j + NumElems)) |
| 2650 | return false; |
| 2651 | } |
Evan Cheng | 0038e59 | 2006-03-28 00:39:58 +0000 | [diff] [blame] | 2652 | } |
| 2653 | |
| 2654 | return true; |
| 2655 | } |
| 2656 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2657 | bool X86::isUNPCKLMask(SDNode *N, bool V2IsSplat) { |
| 2658 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2659 | std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); |
| 2660 | return ::isUNPCKLMask(Ops, V2IsSplat); |
| 2661 | } |
| 2662 | |
Evan Cheng | 4fcb922 | 2006-03-28 02:43:26 +0000 | [diff] [blame] | 2663 | /// isUNPCKHMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2664 | /// specifies a shuffle of elements that is suitable for input to UNPCKH. |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2665 | bool static isUNPCKHMask(std::vector<SDOperand> &N, bool V2IsSplat = false) { |
| 2666 | unsigned NumElems = N.size(); |
Evan Cheng | 4fcb922 | 2006-03-28 02:43:26 +0000 | [diff] [blame] | 2667 | if (NumElems != 2 && NumElems != 4 && NumElems != 8 && NumElems != 16) |
| 2668 | return false; |
| 2669 | |
| 2670 | for (unsigned i = 0, j = 0; i != NumElems; i += 2, ++j) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2671 | SDOperand BitI = N[i]; |
| 2672 | SDOperand BitI1 = N[i+1]; |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2673 | if (!isUndefOrEqual(BitI, j + NumElems/2)) |
| 2674 | return false; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2675 | if (V2IsSplat) { |
| 2676 | if (isUndefOrEqual(BitI1, NumElems)) |
| 2677 | return false; |
| 2678 | } else { |
| 2679 | if (!isUndefOrEqual(BitI1, j + NumElems/2 + NumElems)) |
| 2680 | return false; |
| 2681 | } |
Evan Cheng | 4fcb922 | 2006-03-28 02:43:26 +0000 | [diff] [blame] | 2682 | } |
| 2683 | |
| 2684 | return true; |
| 2685 | } |
| 2686 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2687 | bool X86::isUNPCKHMask(SDNode *N, bool V2IsSplat) { |
| 2688 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2689 | std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); |
| 2690 | return ::isUNPCKHMask(Ops, V2IsSplat); |
| 2691 | } |
| 2692 | |
Evan Cheng | 1d5a8cc | 2006-04-05 07:20:06 +0000 | [diff] [blame] | 2693 | /// isUNPCKL_v_undef_Mask - Special case of isUNPCKLMask for canonical form |
| 2694 | /// of vector_shuffle v, v, <0, 4, 1, 5>, i.e. vector_shuffle v, undef, |
| 2695 | /// <0, 0, 1, 1> |
| 2696 | bool X86::isUNPCKL_v_undef_Mask(SDNode *N) { |
| 2697 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2698 | |
| 2699 | unsigned NumElems = N->getNumOperands(); |
| 2700 | if (NumElems != 4 && NumElems != 8 && NumElems != 16) |
| 2701 | return false; |
| 2702 | |
| 2703 | for (unsigned i = 0, j = 0; i != NumElems; i += 2, ++j) { |
| 2704 | SDOperand BitI = N->getOperand(i); |
| 2705 | SDOperand BitI1 = N->getOperand(i+1); |
| 2706 | |
Evan Cheng | c5cdff2 | 2006-04-07 21:53:05 +0000 | [diff] [blame] | 2707 | if (!isUndefOrEqual(BitI, j)) |
| 2708 | return false; |
| 2709 | if (!isUndefOrEqual(BitI1, j)) |
| 2710 | return false; |
Evan Cheng | 1d5a8cc | 2006-04-05 07:20:06 +0000 | [diff] [blame] | 2711 | } |
| 2712 | |
| 2713 | return true; |
| 2714 | } |
| 2715 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2716 | /// isMOVLMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2717 | /// specifies a shuffle of elements that is suitable for input to MOVSS, |
| 2718 | /// MOVSD, and MOVD, i.e. setting the lowest element. |
| 2719 | static bool isMOVLMask(std::vector<SDOperand> &N) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2720 | unsigned NumElems = N.size(); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2721 | if (NumElems != 2 && NumElems != 4 && NumElems != 8 && NumElems != 16) |
Evan Cheng | d6d1cbd | 2006-04-11 00:19:04 +0000 | [diff] [blame] | 2722 | return false; |
| 2723 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2724 | if (!isUndefOrEqual(N[0], NumElems)) |
Evan Cheng | d6d1cbd | 2006-04-11 00:19:04 +0000 | [diff] [blame] | 2725 | return false; |
| 2726 | |
| 2727 | for (unsigned i = 1; i < NumElems; ++i) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2728 | SDOperand Arg = N[i]; |
Evan Cheng | d6d1cbd | 2006-04-11 00:19:04 +0000 | [diff] [blame] | 2729 | if (!isUndefOrEqual(Arg, i)) |
| 2730 | return false; |
| 2731 | } |
| 2732 | |
| 2733 | return true; |
| 2734 | } |
Evan Cheng | 1d5a8cc | 2006-04-05 07:20:06 +0000 | [diff] [blame] | 2735 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2736 | bool X86::isMOVLMask(SDNode *N) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2737 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2738 | std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2739 | return ::isMOVLMask(Ops); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2740 | } |
| 2741 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2742 | /// isCommutedMOVL - Returns true if the shuffle mask is except the reverse |
| 2743 | /// of what x86 movss want. X86 movs requires the lowest element to be lowest |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2744 | /// element of vector 2 and the other elements to come from vector 1 in order. |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 2745 | static bool isCommutedMOVL(std::vector<SDOperand> &Ops, bool V2IsSplat = false, |
| 2746 | bool V2IsUndef = false) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2747 | unsigned NumElems = Ops.size(); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 2748 | if (NumElems != 2 && NumElems != 4 && NumElems != 8 && NumElems != 16) |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2749 | return false; |
| 2750 | |
| 2751 | if (!isUndefOrEqual(Ops[0], 0)) |
| 2752 | return false; |
| 2753 | |
| 2754 | for (unsigned i = 1; i < NumElems; ++i) { |
| 2755 | SDOperand Arg = Ops[i]; |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 2756 | if (!(isUndefOrEqual(Arg, i+NumElems) || |
| 2757 | (V2IsUndef && isUndefOrInRange(Arg, NumElems, NumElems*2)) || |
| 2758 | (V2IsSplat && isUndefOrEqual(Arg, NumElems)))) |
| 2759 | return false; |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2760 | } |
| 2761 | |
| 2762 | return true; |
| 2763 | } |
| 2764 | |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 2765 | static bool isCommutedMOVL(SDNode *N, bool V2IsSplat = false, |
| 2766 | bool V2IsUndef = false) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2767 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2768 | std::vector<SDOperand> Ops(N->op_begin(), N->op_end()); |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 2769 | return isCommutedMOVL(Ops, V2IsSplat, V2IsUndef); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 2770 | } |
| 2771 | |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 2772 | /// isMOVSHDUPMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2773 | /// specifies a shuffle of elements that is suitable for input to MOVSHDUP. |
| 2774 | bool X86::isMOVSHDUPMask(SDNode *N) { |
| 2775 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2776 | |
| 2777 | if (N->getNumOperands() != 4) |
| 2778 | return false; |
| 2779 | |
| 2780 | // Expect 1, 1, 3, 3 |
| 2781 | for (unsigned i = 0; i < 2; ++i) { |
| 2782 | SDOperand Arg = N->getOperand(i); |
| 2783 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2784 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2785 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2786 | if (Val != 1) return false; |
| 2787 | } |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 2788 | |
| 2789 | bool HasHi = false; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 2790 | for (unsigned i = 2; i < 4; ++i) { |
| 2791 | SDOperand Arg = N->getOperand(i); |
| 2792 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2793 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2794 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2795 | if (Val != 3) return false; |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 2796 | HasHi = true; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 2797 | } |
Evan Cheng | 39fc145 | 2006-04-15 03:13:24 +0000 | [diff] [blame] | 2798 | |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 2799 | // Don't use movshdup if it can be done with a shufps. |
| 2800 | return HasHi; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 2801 | } |
| 2802 | |
| 2803 | /// isMOVSLDUPMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2804 | /// specifies a shuffle of elements that is suitable for input to MOVSLDUP. |
| 2805 | bool X86::isMOVSLDUPMask(SDNode *N) { |
| 2806 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2807 | |
| 2808 | if (N->getNumOperands() != 4) |
| 2809 | return false; |
| 2810 | |
| 2811 | // Expect 0, 0, 2, 2 |
| 2812 | for (unsigned i = 0; i < 2; ++i) { |
| 2813 | SDOperand Arg = N->getOperand(i); |
| 2814 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2815 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2816 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2817 | if (Val != 0) return false; |
| 2818 | } |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 2819 | |
| 2820 | bool HasHi = false; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 2821 | for (unsigned i = 2; i < 4; ++i) { |
| 2822 | SDOperand Arg = N->getOperand(i); |
| 2823 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2824 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2825 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2826 | if (Val != 2) return false; |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 2827 | HasHi = true; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 2828 | } |
Evan Cheng | 39fc145 | 2006-04-15 03:13:24 +0000 | [diff] [blame] | 2829 | |
Evan Cheng | 57ebe9f | 2006-04-15 05:37:34 +0000 | [diff] [blame] | 2830 | // Don't use movshdup if it can be done with a shufps. |
| 2831 | return HasHi; |
Evan Cheng | d953947 | 2006-04-14 21:59:03 +0000 | [diff] [blame] | 2832 | } |
| 2833 | |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 2834 | /// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies |
| 2835 | /// a splat of a single element. |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2836 | static bool isSplatMask(SDNode *N) { |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 2837 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2838 | |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 2839 | // This is a splat operation if each element of the permute is the same, and |
| 2840 | // if the value doesn't reference the second vector. |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 2841 | unsigned NumElems = N->getNumOperands(); |
| 2842 | SDOperand ElementBase; |
| 2843 | unsigned i = 0; |
| 2844 | for (; i != NumElems; ++i) { |
| 2845 | SDOperand Elt = N->getOperand(i); |
Reid Spencer | 3ed469c | 2006-11-02 20:25:50 +0000 | [diff] [blame] | 2846 | if (isa<ConstantSDNode>(Elt)) { |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 2847 | ElementBase = Elt; |
| 2848 | break; |
| 2849 | } |
| 2850 | } |
| 2851 | |
| 2852 | if (!ElementBase.Val) |
| 2853 | return false; |
| 2854 | |
| 2855 | for (; i != NumElems; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2856 | SDOperand Arg = N->getOperand(i); |
| 2857 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2858 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 2859 | if (Arg != ElementBase) return false; |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 2860 | } |
| 2861 | |
| 2862 | // Make sure it is a splat of the first vector operand. |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 2863 | return cast<ConstantSDNode>(ElementBase)->getValue() < NumElems; |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 2864 | } |
| 2865 | |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2866 | /// isSplatMask - Return true if the specified VECTOR_SHUFFLE operand specifies |
| 2867 | /// a splat of a single element and it's a 2 or 4 element mask. |
| 2868 | bool X86::isSplatMask(SDNode *N) { |
| 2869 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2870 | |
Evan Cheng | 94fe5eb | 2006-04-19 23:28:59 +0000 | [diff] [blame] | 2871 | // We can only splat 64-bit, and 32-bit quantities with a single instruction. |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 2872 | if (N->getNumOperands() != 4 && N->getNumOperands() != 2) |
| 2873 | return false; |
| 2874 | return ::isSplatMask(N); |
| 2875 | } |
| 2876 | |
Evan Cheng | f686d9b | 2006-10-27 21:08:32 +0000 | [diff] [blame] | 2877 | /// isSplatLoMask - Return true if the specified VECTOR_SHUFFLE operand |
| 2878 | /// specifies a splat of zero element. |
| 2879 | bool X86::isSplatLoMask(SDNode *N) { |
| 2880 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2881 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 2882 | for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i) |
Evan Cheng | f686d9b | 2006-10-27 21:08:32 +0000 | [diff] [blame] | 2883 | if (!isUndefOrEqual(N->getOperand(i), 0)) |
| 2884 | return false; |
| 2885 | return true; |
| 2886 | } |
| 2887 | |
Evan Cheng | 63d3300 | 2006-03-22 08:01:21 +0000 | [diff] [blame] | 2888 | /// getShuffleSHUFImmediate - Return the appropriate immediate to shuffle |
| 2889 | /// the specified isShuffleMask VECTOR_SHUFFLE mask with PSHUF* and SHUFP* |
| 2890 | /// instructions. |
| 2891 | unsigned X86::getShuffleSHUFImmediate(SDNode *N) { |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 2892 | unsigned NumOperands = N->getNumOperands(); |
| 2893 | unsigned Shift = (NumOperands == 4) ? 2 : 1; |
| 2894 | unsigned Mask = 0; |
Evan Cheng | 36b27f3 | 2006-03-28 23:41:33 +0000 | [diff] [blame] | 2895 | for (unsigned i = 0; i < NumOperands; ++i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2896 | unsigned Val = 0; |
| 2897 | SDOperand Arg = N->getOperand(NumOperands-i-1); |
| 2898 | if (Arg.getOpcode() != ISD::UNDEF) |
| 2899 | Val = cast<ConstantSDNode>(Arg)->getValue(); |
Evan Cheng | 14aed5e | 2006-03-24 01:18:28 +0000 | [diff] [blame] | 2900 | if (Val >= NumOperands) Val -= NumOperands; |
Evan Cheng | 63d3300 | 2006-03-22 08:01:21 +0000 | [diff] [blame] | 2901 | Mask |= Val; |
Evan Cheng | 36b27f3 | 2006-03-28 23:41:33 +0000 | [diff] [blame] | 2902 | if (i != NumOperands - 1) |
| 2903 | Mask <<= Shift; |
| 2904 | } |
Evan Cheng | 63d3300 | 2006-03-22 08:01:21 +0000 | [diff] [blame] | 2905 | |
| 2906 | return Mask; |
| 2907 | } |
| 2908 | |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2909 | /// getShufflePSHUFHWImmediate - Return the appropriate immediate to shuffle |
| 2910 | /// the specified isShuffleMask VECTOR_SHUFFLE mask with PSHUFHW |
| 2911 | /// instructions. |
| 2912 | unsigned X86::getShufflePSHUFHWImmediate(SDNode *N) { |
| 2913 | unsigned Mask = 0; |
| 2914 | // 8 nodes, but we only care about the last 4. |
| 2915 | for (unsigned i = 7; i >= 4; --i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2916 | unsigned Val = 0; |
| 2917 | SDOperand Arg = N->getOperand(i); |
| 2918 | if (Arg.getOpcode() != ISD::UNDEF) |
| 2919 | Val = cast<ConstantSDNode>(Arg)->getValue(); |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2920 | Mask |= (Val - 4); |
| 2921 | if (i != 4) |
| 2922 | Mask <<= 2; |
| 2923 | } |
| 2924 | |
| 2925 | return Mask; |
| 2926 | } |
| 2927 | |
| 2928 | /// getShufflePSHUFLWImmediate - Return the appropriate immediate to shuffle |
| 2929 | /// the specified isShuffleMask VECTOR_SHUFFLE mask with PSHUFLW |
| 2930 | /// instructions. |
| 2931 | unsigned X86::getShufflePSHUFLWImmediate(SDNode *N) { |
| 2932 | unsigned Mask = 0; |
| 2933 | // 8 nodes, but we only care about the first 4. |
| 2934 | for (int i = 3; i >= 0; --i) { |
Evan Cheng | ef698ca | 2006-03-31 00:30:29 +0000 | [diff] [blame] | 2935 | unsigned Val = 0; |
| 2936 | SDOperand Arg = N->getOperand(i); |
| 2937 | if (Arg.getOpcode() != ISD::UNDEF) |
| 2938 | Val = cast<ConstantSDNode>(Arg)->getValue(); |
Evan Cheng | 506d3df | 2006-03-29 23:07:14 +0000 | [diff] [blame] | 2939 | Mask |= Val; |
| 2940 | if (i != 0) |
| 2941 | Mask <<= 2; |
| 2942 | } |
| 2943 | |
| 2944 | return Mask; |
| 2945 | } |
| 2946 | |
Evan Cheng | c21a053 | 2006-04-05 01:47:37 +0000 | [diff] [blame] | 2947 | /// isPSHUFHW_PSHUFLWMask - true if the specified VECTOR_SHUFFLE operand |
| 2948 | /// specifies a 8 element shuffle that can be broken into a pair of |
| 2949 | /// PSHUFHW and PSHUFLW. |
| 2950 | static bool isPSHUFHW_PSHUFLWMask(SDNode *N) { |
| 2951 | assert(N->getOpcode() == ISD::BUILD_VECTOR); |
| 2952 | |
| 2953 | if (N->getNumOperands() != 8) |
| 2954 | return false; |
| 2955 | |
| 2956 | // Lower quadword shuffled. |
| 2957 | for (unsigned i = 0; i != 4; ++i) { |
| 2958 | SDOperand Arg = N->getOperand(i); |
| 2959 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2960 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2961 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2962 | if (Val > 4) |
| 2963 | return false; |
| 2964 | } |
| 2965 | |
| 2966 | // Upper quadword shuffled. |
| 2967 | for (unsigned i = 4; i != 8; ++i) { |
| 2968 | SDOperand Arg = N->getOperand(i); |
| 2969 | if (Arg.getOpcode() == ISD::UNDEF) continue; |
| 2970 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2971 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2972 | if (Val < 4 || Val > 7) |
| 2973 | return false; |
| 2974 | } |
| 2975 | |
| 2976 | return true; |
| 2977 | } |
| 2978 | |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2979 | /// CommuteVectorShuffle - Swap vector_shuffle operandsas well as |
| 2980 | /// values in ther permute mask. |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 2981 | static SDOperand CommuteVectorShuffle(SDOperand Op, SDOperand &V1, |
| 2982 | SDOperand &V2, SDOperand &Mask, |
| 2983 | SelectionDAG &DAG) { |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2984 | MVT::ValueType VT = Op.getValueType(); |
| 2985 | MVT::ValueType MaskVT = Mask.getValueType(); |
| 2986 | MVT::ValueType EltVT = MVT::getVectorBaseType(MaskVT); |
| 2987 | unsigned NumElems = Mask.getNumOperands(); |
| 2988 | std::vector<SDOperand> MaskVec; |
| 2989 | |
| 2990 | for (unsigned i = 0; i != NumElems; ++i) { |
| 2991 | SDOperand Arg = Mask.getOperand(i); |
Evan Cheng | 80d428c | 2006-04-19 22:48:17 +0000 | [diff] [blame] | 2992 | if (Arg.getOpcode() == ISD::UNDEF) { |
| 2993 | MaskVec.push_back(DAG.getNode(ISD::UNDEF, EltVT)); |
| 2994 | continue; |
| 2995 | } |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 2996 | assert(isa<ConstantSDNode>(Arg) && "Invalid VECTOR_SHUFFLE mask!"); |
| 2997 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 2998 | if (Val < NumElems) |
| 2999 | MaskVec.push_back(DAG.getConstant(Val + NumElems, EltVT)); |
| 3000 | else |
| 3001 | MaskVec.push_back(DAG.getConstant(Val - NumElems, EltVT)); |
| 3002 | } |
| 3003 | |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 3004 | std::swap(V1, V2); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3005 | Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 3006 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 3007 | } |
| 3008 | |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 3009 | /// ShouldXformToMOVHLPS - Return true if the node should be transformed to |
| 3010 | /// match movhlps. The lower half elements should come from upper half of |
| 3011 | /// V1 (and in order), and the upper half elements should come from the upper |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3012 | /// half of V2 (and in order). |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 3013 | static bool ShouldXformToMOVHLPS(SDNode *Mask) { |
| 3014 | unsigned NumElems = Mask->getNumOperands(); |
| 3015 | if (NumElems != 4) |
| 3016 | return false; |
| 3017 | for (unsigned i = 0, e = 2; i != e; ++i) |
| 3018 | if (!isUndefOrEqual(Mask->getOperand(i), i+2)) |
| 3019 | return false; |
| 3020 | for (unsigned i = 2; i != 4; ++i) |
| 3021 | if (!isUndefOrEqual(Mask->getOperand(i), i+4)) |
| 3022 | return false; |
| 3023 | return true; |
| 3024 | } |
| 3025 | |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 3026 | /// isScalarLoadToVector - Returns true if the node is a scalar load that |
| 3027 | /// is promoted to a vector. |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 3028 | static inline bool isScalarLoadToVector(SDNode *N) { |
| 3029 | if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) { |
| 3030 | N = N->getOperand(0).Val; |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3031 | return ISD::isNON_EXTLoad(N); |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 3032 | } |
| 3033 | return false; |
| 3034 | } |
| 3035 | |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 3036 | /// ShouldXformToMOVLP{S|D} - Return true if the node should be transformed to |
| 3037 | /// match movlp{s|d}. The lower half elements should come from lower half of |
| 3038 | /// V1 (and in order), and the upper half elements should come from the upper |
| 3039 | /// half of V2 (and in order). And since V1 will become the source of the |
| 3040 | /// MOVLP, it must be either a vector load or a scalar load to vector. |
Evan Cheng | 23425f5 | 2006-10-09 21:39:25 +0000 | [diff] [blame] | 3041 | static bool ShouldXformToMOVLP(SDNode *V1, SDNode *V2, SDNode *Mask) { |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3042 | if (!ISD::isNON_EXTLoad(V1) && !isScalarLoadToVector(V1)) |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 3043 | return false; |
Evan Cheng | 23425f5 | 2006-10-09 21:39:25 +0000 | [diff] [blame] | 3044 | // Is V2 is a vector load, don't do this transformation. We will try to use |
| 3045 | // load folding shufps op. |
| 3046 | if (ISD::isNON_EXTLoad(V2)) |
| 3047 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 3048 | |
Evan Cheng | 533a0aa | 2006-04-19 20:35:22 +0000 | [diff] [blame] | 3049 | unsigned NumElems = Mask->getNumOperands(); |
| 3050 | if (NumElems != 2 && NumElems != 4) |
| 3051 | return false; |
| 3052 | for (unsigned i = 0, e = NumElems/2; i != e; ++i) |
| 3053 | if (!isUndefOrEqual(Mask->getOperand(i), i)) |
| 3054 | return false; |
| 3055 | for (unsigned i = NumElems/2; i != NumElems; ++i) |
| 3056 | if (!isUndefOrEqual(Mask->getOperand(i), i+NumElems)) |
| 3057 | return false; |
| 3058 | return true; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 3059 | } |
| 3060 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 3061 | /// isSplatVector - Returns true if N is a BUILD_VECTOR node whose elements are |
| 3062 | /// all the same. |
| 3063 | static bool isSplatVector(SDNode *N) { |
| 3064 | if (N->getOpcode() != ISD::BUILD_VECTOR) |
| 3065 | return false; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 3066 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 3067 | SDOperand SplatValue = N->getOperand(0); |
| 3068 | for (unsigned i = 1, e = N->getNumOperands(); i != e; ++i) |
| 3069 | if (N->getOperand(i) != SplatValue) |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 3070 | return false; |
| 3071 | return true; |
| 3072 | } |
| 3073 | |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 3074 | /// isUndefShuffle - Returns true if N is a VECTOR_SHUFFLE that can be resolved |
| 3075 | /// to an undef. |
| 3076 | static bool isUndefShuffle(SDNode *N) { |
| 3077 | if (N->getOpcode() != ISD::BUILD_VECTOR) |
| 3078 | return false; |
| 3079 | |
| 3080 | SDOperand V1 = N->getOperand(0); |
| 3081 | SDOperand V2 = N->getOperand(1); |
| 3082 | SDOperand Mask = N->getOperand(2); |
| 3083 | unsigned NumElems = Mask.getNumOperands(); |
| 3084 | for (unsigned i = 0; i != NumElems; ++i) { |
| 3085 | SDOperand Arg = Mask.getOperand(i); |
| 3086 | if (Arg.getOpcode() != ISD::UNDEF) { |
| 3087 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 3088 | if (Val < NumElems && V1.getOpcode() != ISD::UNDEF) |
| 3089 | return false; |
| 3090 | else if (Val >= NumElems && V2.getOpcode() != ISD::UNDEF) |
| 3091 | return false; |
| 3092 | } |
| 3093 | } |
| 3094 | return true; |
| 3095 | } |
| 3096 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 3097 | /// NormalizeMask - V2 is a splat, modify the mask (if needed) so all elements |
| 3098 | /// that point to V2 points to its first element. |
| 3099 | static SDOperand NormalizeMask(SDOperand Mask, SelectionDAG &DAG) { |
| 3100 | assert(Mask.getOpcode() == ISD::BUILD_VECTOR); |
| 3101 | |
| 3102 | bool Changed = false; |
| 3103 | std::vector<SDOperand> MaskVec; |
| 3104 | unsigned NumElems = Mask.getNumOperands(); |
| 3105 | for (unsigned i = 0; i != NumElems; ++i) { |
| 3106 | SDOperand Arg = Mask.getOperand(i); |
| 3107 | if (Arg.getOpcode() != ISD::UNDEF) { |
| 3108 | unsigned Val = cast<ConstantSDNode>(Arg)->getValue(); |
| 3109 | if (Val > NumElems) { |
| 3110 | Arg = DAG.getConstant(NumElems, Arg.getValueType()); |
| 3111 | Changed = true; |
| 3112 | } |
| 3113 | } |
| 3114 | MaskVec.push_back(Arg); |
| 3115 | } |
| 3116 | |
| 3117 | if (Changed) |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3118 | Mask = DAG.getNode(ISD::BUILD_VECTOR, Mask.getValueType(), |
| 3119 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 3120 | return Mask; |
| 3121 | } |
| 3122 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3123 | /// getMOVLMask - Returns a vector_shuffle mask for an movs{s|d}, movd |
| 3124 | /// operation of specified width. |
| 3125 | static SDOperand getMOVLMask(unsigned NumElems, SelectionDAG &DAG) { |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 3126 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
| 3127 | MVT::ValueType BaseVT = MVT::getVectorBaseType(MaskVT); |
| 3128 | |
| 3129 | std::vector<SDOperand> MaskVec; |
| 3130 | MaskVec.push_back(DAG.getConstant(NumElems, BaseVT)); |
| 3131 | for (unsigned i = 1; i != NumElems; ++i) |
| 3132 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3133 | return DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 3134 | } |
| 3135 | |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 3136 | /// getUnpacklMask - Returns a vector_shuffle mask for an unpackl operation |
| 3137 | /// of specified width. |
| 3138 | static SDOperand getUnpacklMask(unsigned NumElems, SelectionDAG &DAG) { |
| 3139 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
| 3140 | MVT::ValueType BaseVT = MVT::getVectorBaseType(MaskVT); |
| 3141 | std::vector<SDOperand> MaskVec; |
| 3142 | for (unsigned i = 0, e = NumElems/2; i != e; ++i) { |
| 3143 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
| 3144 | MaskVec.push_back(DAG.getConstant(i + NumElems, BaseVT)); |
| 3145 | } |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3146 | return DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 3147 | } |
| 3148 | |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 3149 | /// getUnpackhMask - Returns a vector_shuffle mask for an unpackh operation |
| 3150 | /// of specified width. |
| 3151 | static SDOperand getUnpackhMask(unsigned NumElems, SelectionDAG &DAG) { |
| 3152 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
| 3153 | MVT::ValueType BaseVT = MVT::getVectorBaseType(MaskVT); |
| 3154 | unsigned Half = NumElems/2; |
| 3155 | std::vector<SDOperand> MaskVec; |
| 3156 | for (unsigned i = 0; i != Half; ++i) { |
| 3157 | MaskVec.push_back(DAG.getConstant(i + Half, BaseVT)); |
| 3158 | MaskVec.push_back(DAG.getConstant(i + NumElems + Half, BaseVT)); |
| 3159 | } |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3160 | return DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0], MaskVec.size()); |
Evan Cheng | 39623da | 2006-04-20 08:58:49 +0000 | [diff] [blame] | 3161 | } |
| 3162 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3163 | /// getZeroVector - Returns a vector of specified type with all zero elements. |
| 3164 | /// |
| 3165 | static SDOperand getZeroVector(MVT::ValueType VT, SelectionDAG &DAG) { |
| 3166 | assert(MVT::isVector(VT) && "Expected a vector type"); |
| 3167 | unsigned NumElems = getVectorNumElements(VT); |
| 3168 | MVT::ValueType EVT = MVT::getVectorBaseType(VT); |
| 3169 | bool isFP = MVT::isFloatingPoint(EVT); |
| 3170 | SDOperand Zero = isFP ? DAG.getConstantFP(0.0, EVT) : DAG.getConstant(0, EVT); |
| 3171 | std::vector<SDOperand> ZeroVec(NumElems, Zero); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3172 | return DAG.getNode(ISD::BUILD_VECTOR, VT, &ZeroVec[0], ZeroVec.size()); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3173 | } |
| 3174 | |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 3175 | /// PromoteSplat - Promote a splat of v8i16 or v16i8 to v4i32. |
| 3176 | /// |
| 3177 | static SDOperand PromoteSplat(SDOperand Op, SelectionDAG &DAG) { |
| 3178 | SDOperand V1 = Op.getOperand(0); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3179 | SDOperand Mask = Op.getOperand(2); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 3180 | MVT::ValueType VT = Op.getValueType(); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3181 | unsigned NumElems = Mask.getNumOperands(); |
| 3182 | Mask = getUnpacklMask(NumElems, DAG); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 3183 | while (NumElems != 4) { |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3184 | V1 = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V1, Mask); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 3185 | NumElems >>= 1; |
| 3186 | } |
| 3187 | V1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, V1); |
| 3188 | |
| 3189 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3190 | Mask = getZeroVector(MaskVT, DAG); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 3191 | SDOperand Shuffle = DAG.getNode(ISD::VECTOR_SHUFFLE, MVT::v4i32, V1, |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3192 | DAG.getNode(ISD::UNDEF, MVT::v4i32), Mask); |
Evan Cheng | c575ca2 | 2006-04-17 20:43:08 +0000 | [diff] [blame] | 3193 | return DAG.getNode(ISD::BIT_CONVERT, VT, Shuffle); |
| 3194 | } |
| 3195 | |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3196 | /// isZeroNode - Returns true if Elt is a constant zero or a floating point |
| 3197 | /// constant +0.0. |
| 3198 | static inline bool isZeroNode(SDOperand Elt) { |
| 3199 | return ((isa<ConstantSDNode>(Elt) && |
| 3200 | cast<ConstantSDNode>(Elt)->getValue() == 0) || |
| 3201 | (isa<ConstantFPSDNode>(Elt) && |
| 3202 | cast<ConstantFPSDNode>(Elt)->isExactlyValue(0.0))); |
| 3203 | } |
| 3204 | |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 3205 | /// getShuffleVectorZeroOrUndef - Return a vector_shuffle of the specified |
| 3206 | /// vector and zero or undef vector. |
| 3207 | static SDOperand getShuffleVectorZeroOrUndef(SDOperand V2, MVT::ValueType VT, |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3208 | unsigned NumElems, unsigned Idx, |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 3209 | bool isZero, SelectionDAG &DAG) { |
| 3210 | SDOperand V1 = isZero ? getZeroVector(VT, DAG) : DAG.getNode(ISD::UNDEF, VT); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3211 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
| 3212 | MVT::ValueType EVT = MVT::getVectorBaseType(MaskVT); |
| 3213 | SDOperand Zero = DAG.getConstant(0, EVT); |
| 3214 | std::vector<SDOperand> MaskVec(NumElems, Zero); |
| 3215 | MaskVec[Idx] = DAG.getConstant(NumElems, EVT); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3216 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3217 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 3218 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); |
Evan Cheng | 017dcc6 | 2006-04-21 01:05:10 +0000 | [diff] [blame] | 3219 | } |
| 3220 | |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 3221 | /// LowerBuildVectorv16i8 - Custom lower build_vector of v16i8. |
| 3222 | /// |
| 3223 | static SDOperand LowerBuildVectorv16i8(SDOperand Op, unsigned NonZeros, |
| 3224 | unsigned NumNonZero, unsigned NumZero, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3225 | SelectionDAG &DAG, TargetLowering &TLI) { |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 3226 | if (NumNonZero > 8) |
| 3227 | return SDOperand(); |
| 3228 | |
| 3229 | SDOperand V(0, 0); |
| 3230 | bool First = true; |
| 3231 | for (unsigned i = 0; i < 16; ++i) { |
| 3232 | bool ThisIsNonZero = (NonZeros & (1 << i)) != 0; |
| 3233 | if (ThisIsNonZero && First) { |
| 3234 | if (NumZero) |
| 3235 | V = getZeroVector(MVT::v8i16, DAG); |
| 3236 | else |
| 3237 | V = DAG.getNode(ISD::UNDEF, MVT::v8i16); |
| 3238 | First = false; |
| 3239 | } |
| 3240 | |
| 3241 | if ((i & 1) != 0) { |
| 3242 | SDOperand ThisElt(0, 0), LastElt(0, 0); |
| 3243 | bool LastIsNonZero = (NonZeros & (1 << (i-1))) != 0; |
| 3244 | if (LastIsNonZero) { |
| 3245 | LastElt = DAG.getNode(ISD::ZERO_EXTEND, MVT::i16, Op.getOperand(i-1)); |
| 3246 | } |
| 3247 | if (ThisIsNonZero) { |
| 3248 | ThisElt = DAG.getNode(ISD::ZERO_EXTEND, MVT::i16, Op.getOperand(i)); |
| 3249 | ThisElt = DAG.getNode(ISD::SHL, MVT::i16, |
| 3250 | ThisElt, DAG.getConstant(8, MVT::i8)); |
| 3251 | if (LastIsNonZero) |
| 3252 | ThisElt = DAG.getNode(ISD::OR, MVT::i16, ThisElt, LastElt); |
| 3253 | } else |
| 3254 | ThisElt = LastElt; |
| 3255 | |
| 3256 | if (ThisElt.Val) |
| 3257 | V = DAG.getNode(ISD::INSERT_VECTOR_ELT, MVT::v8i16, V, ThisElt, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3258 | DAG.getConstant(i/2, TLI.getPointerTy())); |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 3259 | } |
| 3260 | } |
| 3261 | |
| 3262 | return DAG.getNode(ISD::BIT_CONVERT, MVT::v16i8, V); |
| 3263 | } |
| 3264 | |
| 3265 | /// LowerBuildVectorv16i8 - Custom lower build_vector of v8i16. |
| 3266 | /// |
| 3267 | static SDOperand LowerBuildVectorv8i16(SDOperand Op, unsigned NonZeros, |
| 3268 | unsigned NumNonZero, unsigned NumZero, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3269 | SelectionDAG &DAG, TargetLowering &TLI) { |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 3270 | if (NumNonZero > 4) |
| 3271 | return SDOperand(); |
| 3272 | |
| 3273 | SDOperand V(0, 0); |
| 3274 | bool First = true; |
| 3275 | for (unsigned i = 0; i < 8; ++i) { |
| 3276 | bool isNonZero = (NonZeros & (1 << i)) != 0; |
| 3277 | if (isNonZero) { |
| 3278 | if (First) { |
| 3279 | if (NumZero) |
| 3280 | V = getZeroVector(MVT::v8i16, DAG); |
| 3281 | else |
| 3282 | V = DAG.getNode(ISD::UNDEF, MVT::v8i16); |
| 3283 | First = false; |
| 3284 | } |
| 3285 | V = DAG.getNode(ISD::INSERT_VECTOR_ELT, MVT::v8i16, V, Op.getOperand(i), |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3286 | DAG.getConstant(i, TLI.getPointerTy())); |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 3287 | } |
| 3288 | } |
| 3289 | |
| 3290 | return V; |
| 3291 | } |
| 3292 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3293 | SDOperand |
| 3294 | X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { |
| 3295 | // All zero's are handled with pxor. |
| 3296 | if (ISD::isBuildVectorAllZeros(Op.Val)) |
| 3297 | return Op; |
| 3298 | |
| 3299 | // All one's are handled with pcmpeqd. |
| 3300 | if (ISD::isBuildVectorAllOnes(Op.Val)) |
| 3301 | return Op; |
| 3302 | |
| 3303 | MVT::ValueType VT = Op.getValueType(); |
| 3304 | MVT::ValueType EVT = MVT::getVectorBaseType(VT); |
| 3305 | unsigned EVTBits = MVT::getSizeInBits(EVT); |
| 3306 | |
| 3307 | unsigned NumElems = Op.getNumOperands(); |
| 3308 | unsigned NumZero = 0; |
| 3309 | unsigned NumNonZero = 0; |
| 3310 | unsigned NonZeros = 0; |
| 3311 | std::set<SDOperand> Values; |
| 3312 | for (unsigned i = 0; i < NumElems; ++i) { |
| 3313 | SDOperand Elt = Op.getOperand(i); |
| 3314 | if (Elt.getOpcode() != ISD::UNDEF) { |
| 3315 | Values.insert(Elt); |
| 3316 | if (isZeroNode(Elt)) |
| 3317 | NumZero++; |
| 3318 | else { |
| 3319 | NonZeros |= (1 << i); |
| 3320 | NumNonZero++; |
| 3321 | } |
| 3322 | } |
| 3323 | } |
| 3324 | |
| 3325 | if (NumNonZero == 0) |
| 3326 | // Must be a mix of zero and undef. Return a zero vector. |
| 3327 | return getZeroVector(VT, DAG); |
| 3328 | |
| 3329 | // Splat is obviously ok. Let legalizer expand it to a shuffle. |
| 3330 | if (Values.size() == 1) |
| 3331 | return SDOperand(); |
| 3332 | |
| 3333 | // Special case for single non-zero element. |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3334 | if (NumNonZero == 1) { |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3335 | unsigned Idx = CountTrailingZeros_32(NonZeros); |
| 3336 | SDOperand Item = Op.getOperand(Idx); |
| 3337 | Item = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Item); |
| 3338 | if (Idx == 0) |
| 3339 | // Turn it into a MOVL (i.e. movss, movsd, or movd) to a zero vector. |
| 3340 | return getShuffleVectorZeroOrUndef(Item, VT, NumElems, Idx, |
| 3341 | NumZero > 0, DAG); |
| 3342 | |
| 3343 | if (EVTBits == 32) { |
| 3344 | // Turn it into a shuffle of zero and zero-extended scalar to vector. |
| 3345 | Item = getShuffleVectorZeroOrUndef(Item, VT, NumElems, 0, NumZero > 0, |
| 3346 | DAG); |
| 3347 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
| 3348 | MVT::ValueType MaskEVT = MVT::getVectorBaseType(MaskVT); |
| 3349 | std::vector<SDOperand> MaskVec; |
| 3350 | for (unsigned i = 0; i < NumElems; i++) |
| 3351 | MaskVec.push_back(DAG.getConstant((i == Idx) ? 0 : 1, MaskEVT)); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3352 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3353 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3354 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, Item, |
| 3355 | DAG.getNode(ISD::UNDEF, VT), Mask); |
| 3356 | } |
| 3357 | } |
| 3358 | |
Evan Cheng | e111303 | 2006-10-04 18:33:38 +0000 | [diff] [blame] | 3359 | // Let legalizer expand 2-wide build_vector's. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3360 | if (EVTBits == 64) |
| 3361 | return SDOperand(); |
| 3362 | |
| 3363 | // If element VT is < 32 bits, convert it to inserts into a zero vector. |
| 3364 | if (EVTBits == 8) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3365 | SDOperand V = LowerBuildVectorv16i8(Op, NonZeros,NumNonZero,NumZero, DAG, |
| 3366 | *this); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3367 | if (V.Val) return V; |
| 3368 | } |
| 3369 | |
| 3370 | if (EVTBits == 16) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3371 | SDOperand V = LowerBuildVectorv8i16(Op, NonZeros,NumNonZero,NumZero, DAG, |
| 3372 | *this); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3373 | if (V.Val) return V; |
| 3374 | } |
| 3375 | |
| 3376 | // If element VT is == 32 bits, turn it into a number of shuffles. |
| 3377 | std::vector<SDOperand> V(NumElems); |
| 3378 | if (NumElems == 4 && NumZero > 0) { |
| 3379 | for (unsigned i = 0; i < 4; ++i) { |
| 3380 | bool isZero = !(NonZeros & (1 << i)); |
| 3381 | if (isZero) |
| 3382 | V[i] = getZeroVector(VT, DAG); |
| 3383 | else |
| 3384 | V[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Op.getOperand(i)); |
| 3385 | } |
| 3386 | |
| 3387 | for (unsigned i = 0; i < 2; ++i) { |
| 3388 | switch ((NonZeros & (0x3 << i*2)) >> (i*2)) { |
| 3389 | default: break; |
| 3390 | case 0: |
| 3391 | V[i] = V[i*2]; // Must be a zero vector. |
| 3392 | break; |
| 3393 | case 1: |
| 3394 | V[i] = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[i*2+1], V[i*2], |
| 3395 | getMOVLMask(NumElems, DAG)); |
| 3396 | break; |
| 3397 | case 2: |
| 3398 | V[i] = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[i*2], V[i*2+1], |
| 3399 | getMOVLMask(NumElems, DAG)); |
| 3400 | break; |
| 3401 | case 3: |
| 3402 | V[i] = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[i*2], V[i*2+1], |
| 3403 | getUnpacklMask(NumElems, DAG)); |
| 3404 | break; |
| 3405 | } |
| 3406 | } |
| 3407 | |
Evan Cheng | 069287d | 2006-05-16 07:21:53 +0000 | [diff] [blame] | 3408 | // Take advantage of the fact GR32 to VR128 scalar_to_vector (i.e. movd) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3409 | // clears the upper bits. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3410 | // FIXME: we can do the same for v4f32 case when we know both parts of |
| 3411 | // the lower half come from scalar_to_vector (loadf32). We should do |
| 3412 | // that in post legalizer dag combiner with target specific hooks. |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3413 | if (MVT::isInteger(EVT) && (NonZeros & (0x3 << 2)) == 0) |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3414 | return V[0]; |
| 3415 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
| 3416 | MVT::ValueType EVT = MVT::getVectorBaseType(MaskVT); |
| 3417 | std::vector<SDOperand> MaskVec; |
| 3418 | bool Reverse = (NonZeros & 0x3) == 2; |
| 3419 | for (unsigned i = 0; i < 2; ++i) |
| 3420 | if (Reverse) |
| 3421 | MaskVec.push_back(DAG.getConstant(1-i, EVT)); |
| 3422 | else |
| 3423 | MaskVec.push_back(DAG.getConstant(i, EVT)); |
| 3424 | Reverse = ((NonZeros & (0x3 << 2)) >> 2) == 2; |
| 3425 | for (unsigned i = 0; i < 2; ++i) |
| 3426 | if (Reverse) |
| 3427 | MaskVec.push_back(DAG.getConstant(1-i+NumElems, EVT)); |
| 3428 | else |
| 3429 | MaskVec.push_back(DAG.getConstant(i+NumElems, EVT)); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3430 | SDOperand ShufMask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3431 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3432 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[0], V[1], ShufMask); |
| 3433 | } |
| 3434 | |
| 3435 | if (Values.size() > 2) { |
| 3436 | // Expand into a number of unpckl*. |
| 3437 | // e.g. for v4f32 |
| 3438 | // Step 1: unpcklps 0, 2 ==> X: <?, ?, 2, 0> |
| 3439 | // : unpcklps 1, 3 ==> Y: <?, ?, 3, 1> |
| 3440 | // Step 2: unpcklps X, Y ==> <3, 2, 1, 0> |
| 3441 | SDOperand UnpckMask = getUnpacklMask(NumElems, DAG); |
| 3442 | for (unsigned i = 0; i < NumElems; ++i) |
| 3443 | V[i] = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, Op.getOperand(i)); |
| 3444 | NumElems >>= 1; |
| 3445 | while (NumElems != 0) { |
| 3446 | for (unsigned i = 0; i < NumElems; ++i) |
| 3447 | V[i] = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V[i], V[i + NumElems], |
| 3448 | UnpckMask); |
| 3449 | NumElems >>= 1; |
| 3450 | } |
| 3451 | return V[0]; |
| 3452 | } |
| 3453 | |
| 3454 | return SDOperand(); |
| 3455 | } |
| 3456 | |
| 3457 | SDOperand |
| 3458 | X86TargetLowering::LowerVECTOR_SHUFFLE(SDOperand Op, SelectionDAG &DAG) { |
| 3459 | SDOperand V1 = Op.getOperand(0); |
| 3460 | SDOperand V2 = Op.getOperand(1); |
| 3461 | SDOperand PermMask = Op.getOperand(2); |
| 3462 | MVT::ValueType VT = Op.getValueType(); |
| 3463 | unsigned NumElems = PermMask.getNumOperands(); |
| 3464 | bool V1IsUndef = V1.getOpcode() == ISD::UNDEF; |
| 3465 | bool V2IsUndef = V2.getOpcode() == ISD::UNDEF; |
Evan Cheng | d9b8e40 | 2006-10-16 06:36:00 +0000 | [diff] [blame] | 3466 | bool V1IsSplat = false; |
| 3467 | bool V2IsSplat = false; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3468 | |
Evan Cheng | 8cf723d | 2006-09-08 01:50:06 +0000 | [diff] [blame] | 3469 | if (isUndefShuffle(Op.Val)) |
| 3470 | return DAG.getNode(ISD::UNDEF, VT); |
| 3471 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3472 | if (isSplatMask(PermMask.Val)) { |
| 3473 | if (NumElems <= 4) return Op; |
| 3474 | // Promote it to a v4i32 splat. |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3475 | return PromoteSplat(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3476 | } |
| 3477 | |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3478 | if (X86::isMOVLMask(PermMask.Val)) |
| 3479 | return (V1IsUndef) ? V2 : Op; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3480 | |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3481 | if (X86::isMOVSHDUPMask(PermMask.Val) || |
| 3482 | X86::isMOVSLDUPMask(PermMask.Val) || |
| 3483 | X86::isMOVHLPSMask(PermMask.Val) || |
| 3484 | X86::isMOVHPMask(PermMask.Val) || |
| 3485 | X86::isMOVLPMask(PermMask.Val)) |
| 3486 | return Op; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3487 | |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3488 | if (ShouldXformToMOVHLPS(PermMask.Val) || |
| 3489 | ShouldXformToMOVLP(V1.Val, V2.Val, PermMask.Val)) |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 3490 | return CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3491 | |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 3492 | bool Commuted = false; |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3493 | V1IsSplat = isSplatVector(V1.Val); |
| 3494 | V2IsSplat = isSplatVector(V2.Val); |
| 3495 | if ((V1IsSplat || V1IsUndef) && !(V2IsSplat || V2IsUndef)) { |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 3496 | Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3497 | std::swap(V1IsSplat, V2IsSplat); |
| 3498 | std::swap(V1IsUndef, V2IsUndef); |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 3499 | Commuted = true; |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3500 | } |
| 3501 | |
| 3502 | if (isCommutedMOVL(PermMask.Val, V2IsSplat, V2IsUndef)) { |
| 3503 | if (V2IsUndef) return V1; |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 3504 | Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3505 | if (V2IsSplat) { |
| 3506 | // V2 is a splat, so the mask may be malformed. That is, it may point |
| 3507 | // to any V2 element. The instruction selectior won't like this. Get |
| 3508 | // a corrected mask and commute to form a proper MOVS{S|D}. |
| 3509 | SDOperand NewMask = getMOVLMask(NumElems, DAG); |
| 3510 | if (NewMask.Val != PermMask.Val) |
| 3511 | Op = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, NewMask); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3512 | } |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3513 | return Op; |
Evan Cheng | d9b8e40 | 2006-10-16 06:36:00 +0000 | [diff] [blame] | 3514 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3515 | |
Evan Cheng | d9b8e40 | 2006-10-16 06:36:00 +0000 | [diff] [blame] | 3516 | if (X86::isUNPCKL_v_undef_Mask(PermMask.Val) || |
| 3517 | X86::isUNPCKLMask(PermMask.Val) || |
| 3518 | X86::isUNPCKHMask(PermMask.Val)) |
| 3519 | return Op; |
Evan Cheng | e111303 | 2006-10-04 18:33:38 +0000 | [diff] [blame] | 3520 | |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3521 | if (V2IsSplat) { |
| 3522 | // Normalize mask so all entries that point to V2 points to its first |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3523 | // element then try to match unpck{h|l} again. If match, return a |
Evan Cheng | 9bbbb98 | 2006-10-25 20:48:19 +0000 | [diff] [blame] | 3524 | // new vector_shuffle with the corrected mask. |
| 3525 | SDOperand NewMask = NormalizeMask(PermMask, DAG); |
| 3526 | if (NewMask.Val != PermMask.Val) { |
| 3527 | if (X86::isUNPCKLMask(PermMask.Val, true)) { |
| 3528 | SDOperand NewMask = getUnpacklMask(NumElems, DAG); |
| 3529 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, NewMask); |
| 3530 | } else if (X86::isUNPCKHMask(PermMask.Val, true)) { |
| 3531 | SDOperand NewMask = getUnpackhMask(NumElems, DAG); |
| 3532 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, NewMask); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3533 | } |
| 3534 | } |
| 3535 | } |
| 3536 | |
| 3537 | // Normalize the node to match x86 shuffle ops if needed |
Evan Cheng | 9eca5e8 | 2006-10-25 21:49:50 +0000 | [diff] [blame] | 3538 | if (V2.getOpcode() != ISD::UNDEF && isCommutedSHUFP(PermMask.Val)) |
| 3539 | Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
| 3540 | |
| 3541 | if (Commuted) { |
| 3542 | // Commute is back and try unpck* again. |
| 3543 | Op = CommuteVectorShuffle(Op, V1, V2, PermMask, DAG); |
| 3544 | if (X86::isUNPCKL_v_undef_Mask(PermMask.Val) || |
| 3545 | X86::isUNPCKLMask(PermMask.Val) || |
| 3546 | X86::isUNPCKHMask(PermMask.Val)) |
| 3547 | return Op; |
| 3548 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3549 | |
| 3550 | // If VT is integer, try PSHUF* first, then SHUFP*. |
| 3551 | if (MVT::isInteger(VT)) { |
| 3552 | if (X86::isPSHUFDMask(PermMask.Val) || |
| 3553 | X86::isPSHUFHWMask(PermMask.Val) || |
| 3554 | X86::isPSHUFLWMask(PermMask.Val)) { |
| 3555 | if (V2.getOpcode() != ISD::UNDEF) |
| 3556 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, |
| 3557 | DAG.getNode(ISD::UNDEF, V1.getValueType()),PermMask); |
| 3558 | return Op; |
| 3559 | } |
| 3560 | |
| 3561 | if (X86::isSHUFPMask(PermMask.Val)) |
| 3562 | return Op; |
| 3563 | |
| 3564 | // Handle v8i16 shuffle high / low shuffle node pair. |
| 3565 | if (VT == MVT::v8i16 && isPSHUFHW_PSHUFLWMask(PermMask.Val)) { |
| 3566 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(NumElems); |
| 3567 | MVT::ValueType BaseVT = MVT::getVectorBaseType(MaskVT); |
| 3568 | std::vector<SDOperand> MaskVec; |
| 3569 | for (unsigned i = 0; i != 4; ++i) |
| 3570 | MaskVec.push_back(PermMask.getOperand(i)); |
| 3571 | for (unsigned i = 4; i != 8; ++i) |
| 3572 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3573 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3574 | &MaskVec[0], MaskVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3575 | V1 = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); |
| 3576 | MaskVec.clear(); |
| 3577 | for (unsigned i = 0; i != 4; ++i) |
| 3578 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
| 3579 | for (unsigned i = 4; i != 8; ++i) |
| 3580 | MaskVec.push_back(PermMask.getOperand(i)); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3581 | Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, &MaskVec[0],MaskVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3582 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, Mask); |
| 3583 | } |
| 3584 | } else { |
| 3585 | // Floating point cases in the other order. |
| 3586 | if (X86::isSHUFPMask(PermMask.Val)) |
| 3587 | return Op; |
| 3588 | if (X86::isPSHUFDMask(PermMask.Val) || |
| 3589 | X86::isPSHUFHWMask(PermMask.Val) || |
| 3590 | X86::isPSHUFLWMask(PermMask.Val)) { |
| 3591 | if (V2.getOpcode() != ISD::UNDEF) |
| 3592 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, |
| 3593 | DAG.getNode(ISD::UNDEF, V1.getValueType()),PermMask); |
| 3594 | return Op; |
| 3595 | } |
| 3596 | } |
| 3597 | |
| 3598 | if (NumElems == 4) { |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3599 | MVT::ValueType MaskVT = PermMask.getValueType(); |
| 3600 | MVT::ValueType MaskEVT = MVT::getVectorBaseType(MaskVT); |
Evan Cheng | 43f3bd3 | 2006-04-28 07:03:38 +0000 | [diff] [blame] | 3601 | std::vector<std::pair<int, int> > Locs; |
| 3602 | Locs.reserve(NumElems); |
| 3603 | std::vector<SDOperand> Mask1(NumElems, DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 3604 | std::vector<SDOperand> Mask2(NumElems, DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 3605 | unsigned NumHi = 0; |
| 3606 | unsigned NumLo = 0; |
| 3607 | // If no more than two elements come from either vector. This can be |
| 3608 | // implemented with two shuffles. First shuffle gather the elements. |
| 3609 | // The second shuffle, which takes the first shuffle as both of its |
| 3610 | // vector operands, put the elements into the right order. |
| 3611 | for (unsigned i = 0; i != NumElems; ++i) { |
| 3612 | SDOperand Elt = PermMask.getOperand(i); |
| 3613 | if (Elt.getOpcode() == ISD::UNDEF) { |
| 3614 | Locs[i] = std::make_pair(-1, -1); |
| 3615 | } else { |
| 3616 | unsigned Val = cast<ConstantSDNode>(Elt)->getValue(); |
| 3617 | if (Val < NumElems) { |
| 3618 | Locs[i] = std::make_pair(0, NumLo); |
| 3619 | Mask1[NumLo] = Elt; |
| 3620 | NumLo++; |
| 3621 | } else { |
| 3622 | Locs[i] = std::make_pair(1, NumHi); |
| 3623 | if (2+NumHi < NumElems) |
| 3624 | Mask1[2+NumHi] = Elt; |
| 3625 | NumHi++; |
| 3626 | } |
| 3627 | } |
| 3628 | } |
| 3629 | if (NumLo <= 2 && NumHi <= 2) { |
| 3630 | V1 = DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3631 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3632 | &Mask1[0], Mask1.size())); |
Evan Cheng | 43f3bd3 | 2006-04-28 07:03:38 +0000 | [diff] [blame] | 3633 | for (unsigned i = 0; i != NumElems; ++i) { |
| 3634 | if (Locs[i].first == -1) |
| 3635 | continue; |
| 3636 | else { |
| 3637 | unsigned Idx = (i < NumElems/2) ? 0 : NumElems; |
| 3638 | Idx += Locs[i].first * (NumElems/2) + Locs[i].second; |
| 3639 | Mask2[i] = DAG.getConstant(Idx, MaskEVT); |
| 3640 | } |
| 3641 | } |
| 3642 | |
| 3643 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V1, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3644 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3645 | &Mask2[0], Mask2.size())); |
Evan Cheng | 43f3bd3 | 2006-04-28 07:03:38 +0000 | [diff] [blame] | 3646 | } |
| 3647 | |
| 3648 | // Break it into (shuffle shuffle_hi, shuffle_lo). |
| 3649 | Locs.clear(); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3650 | std::vector<SDOperand> LoMask(NumElems, DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 3651 | std::vector<SDOperand> HiMask(NumElems, DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 3652 | std::vector<SDOperand> *MaskPtr = &LoMask; |
| 3653 | unsigned MaskIdx = 0; |
| 3654 | unsigned LoIdx = 0; |
| 3655 | unsigned HiIdx = NumElems/2; |
| 3656 | for (unsigned i = 0; i != NumElems; ++i) { |
| 3657 | if (i == NumElems/2) { |
| 3658 | MaskPtr = &HiMask; |
| 3659 | MaskIdx = 1; |
| 3660 | LoIdx = 0; |
| 3661 | HiIdx = NumElems/2; |
| 3662 | } |
| 3663 | SDOperand Elt = PermMask.getOperand(i); |
| 3664 | if (Elt.getOpcode() == ISD::UNDEF) { |
| 3665 | Locs[i] = std::make_pair(-1, -1); |
| 3666 | } else if (cast<ConstantSDNode>(Elt)->getValue() < NumElems) { |
| 3667 | Locs[i] = std::make_pair(MaskIdx, LoIdx); |
| 3668 | (*MaskPtr)[LoIdx] = Elt; |
| 3669 | LoIdx++; |
| 3670 | } else { |
| 3671 | Locs[i] = std::make_pair(MaskIdx, HiIdx); |
| 3672 | (*MaskPtr)[HiIdx] = Elt; |
| 3673 | HiIdx++; |
| 3674 | } |
| 3675 | } |
| 3676 | |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 3677 | SDOperand LoShuffle = |
| 3678 | DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3679 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3680 | &LoMask[0], LoMask.size())); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3681 | SDOperand HiShuffle = |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 3682 | DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1, V2, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3683 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3684 | &HiMask[0], HiMask.size())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3685 | std::vector<SDOperand> MaskOps; |
| 3686 | for (unsigned i = 0; i != NumElems; ++i) { |
| 3687 | if (Locs[i].first == -1) { |
| 3688 | MaskOps.push_back(DAG.getNode(ISD::UNDEF, MaskEVT)); |
| 3689 | } else { |
| 3690 | unsigned Idx = Locs[i].first * NumElems + Locs[i].second; |
| 3691 | MaskOps.push_back(DAG.getConstant(Idx, MaskEVT)); |
| 3692 | } |
| 3693 | } |
| 3694 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, LoShuffle, HiShuffle, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3695 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3696 | &MaskOps[0], MaskOps.size())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3697 | } |
| 3698 | |
| 3699 | return SDOperand(); |
| 3700 | } |
| 3701 | |
| 3702 | SDOperand |
| 3703 | X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) { |
| 3704 | if (!isa<ConstantSDNode>(Op.getOperand(1))) |
| 3705 | return SDOperand(); |
| 3706 | |
| 3707 | MVT::ValueType VT = Op.getValueType(); |
| 3708 | // TODO: handle v16i8. |
| 3709 | if (MVT::getSizeInBits(VT) == 16) { |
| 3710 | // Transform it so it match pextrw which produces a 32-bit result. |
| 3711 | MVT::ValueType EVT = (MVT::ValueType)(VT+1); |
| 3712 | SDOperand Extract = DAG.getNode(X86ISD::PEXTRW, EVT, |
| 3713 | Op.getOperand(0), Op.getOperand(1)); |
| 3714 | SDOperand Assert = DAG.getNode(ISD::AssertZext, EVT, Extract, |
| 3715 | DAG.getValueType(VT)); |
| 3716 | return DAG.getNode(ISD::TRUNCATE, VT, Assert); |
| 3717 | } else if (MVT::getSizeInBits(VT) == 32) { |
| 3718 | SDOperand Vec = Op.getOperand(0); |
| 3719 | unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
| 3720 | if (Idx == 0) |
| 3721 | return Op; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3722 | // SHUFPS the element to the lowest double word, then movss. |
| 3723 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3724 | std::vector<SDOperand> IdxVec; |
| 3725 | IdxVec.push_back(DAG.getConstant(Idx, MVT::getVectorBaseType(MaskVT))); |
| 3726 | IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(MaskVT))); |
| 3727 | IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(MaskVT))); |
| 3728 | IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(MaskVT))); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3729 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3730 | &IdxVec[0], IdxVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3731 | Vec = DAG.getNode(ISD::VECTOR_SHUFFLE, Vec.getValueType(), |
Evan Cheng | 6e56e2c | 2006-11-07 22:14:24 +0000 | [diff] [blame] | 3732 | Vec, DAG.getNode(ISD::UNDEF, Vec.getValueType()), Mask); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3733 | return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, VT, Vec, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 3734 | DAG.getConstant(0, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3735 | } else if (MVT::getSizeInBits(VT) == 64) { |
| 3736 | SDOperand Vec = Op.getOperand(0); |
| 3737 | unsigned Idx = cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
| 3738 | if (Idx == 0) |
| 3739 | return Op; |
| 3740 | |
| 3741 | // UNPCKHPD the element to the lowest double word, then movsd. |
| 3742 | // Note if the lower 64 bits of the result of the UNPCKHPD is then stored |
| 3743 | // to a f64mem, the whole operation is folded into a single MOVHPDmr. |
| 3744 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); |
| 3745 | std::vector<SDOperand> IdxVec; |
| 3746 | IdxVec.push_back(DAG.getConstant(1, MVT::getVectorBaseType(MaskVT))); |
| 3747 | IdxVec.push_back(DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(MaskVT))); |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3748 | SDOperand Mask = DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3749 | &IdxVec[0], IdxVec.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3750 | Vec = DAG.getNode(ISD::VECTOR_SHUFFLE, Vec.getValueType(), |
| 3751 | Vec, DAG.getNode(ISD::UNDEF, Vec.getValueType()), Mask); |
| 3752 | return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, VT, Vec, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 3753 | DAG.getConstant(0, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3754 | } |
| 3755 | |
| 3756 | return SDOperand(); |
| 3757 | } |
| 3758 | |
| 3759 | SDOperand |
| 3760 | X86TargetLowering::LowerINSERT_VECTOR_ELT(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 069287d | 2006-05-16 07:21:53 +0000 | [diff] [blame] | 3761 | // Transform it so it match pinsrw which expects a 16-bit value in a GR32 |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3762 | // as its second argument. |
| 3763 | MVT::ValueType VT = Op.getValueType(); |
| 3764 | MVT::ValueType BaseVT = MVT::getVectorBaseType(VT); |
| 3765 | SDOperand N0 = Op.getOperand(0); |
| 3766 | SDOperand N1 = Op.getOperand(1); |
| 3767 | SDOperand N2 = Op.getOperand(2); |
| 3768 | if (MVT::getSizeInBits(BaseVT) == 16) { |
| 3769 | if (N1.getValueType() != MVT::i32) |
| 3770 | N1 = DAG.getNode(ISD::ANY_EXTEND, MVT::i32, N1); |
| 3771 | if (N2.getValueType() != MVT::i32) |
| 3772 | N2 = DAG.getConstant(cast<ConstantSDNode>(N2)->getValue(), MVT::i32); |
| 3773 | return DAG.getNode(X86ISD::PINSRW, VT, N0, N1, N2); |
| 3774 | } else if (MVT::getSizeInBits(BaseVT) == 32) { |
| 3775 | unsigned Idx = cast<ConstantSDNode>(N2)->getValue(); |
| 3776 | if (Idx == 0) { |
| 3777 | // Use a movss. |
| 3778 | N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, VT, N1); |
| 3779 | MVT::ValueType MaskVT = MVT::getIntVectorWithNumElements(4); |
| 3780 | MVT::ValueType BaseVT = MVT::getVectorBaseType(MaskVT); |
| 3781 | std::vector<SDOperand> MaskVec; |
| 3782 | MaskVec.push_back(DAG.getConstant(4, BaseVT)); |
| 3783 | for (unsigned i = 1; i <= 3; ++i) |
| 3784 | MaskVec.push_back(DAG.getConstant(i, BaseVT)); |
| 3785 | return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, N0, N1, |
Chris Lattner | e219945 | 2006-08-11 17:38:39 +0000 | [diff] [blame] | 3786 | DAG.getNode(ISD::BUILD_VECTOR, MaskVT, |
| 3787 | &MaskVec[0], MaskVec.size())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3788 | } else { |
| 3789 | // Use two pinsrw instructions to insert a 32 bit value. |
| 3790 | Idx <<= 1; |
| 3791 | if (MVT::isFloatingPoint(N1.getValueType())) { |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3792 | if (ISD::isNON_EXTLoad(N1.Val)) { |
Evan Cheng | 069287d | 2006-05-16 07:21:53 +0000 | [diff] [blame] | 3793 | // Just load directly from f32mem to GR32. |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3794 | LoadSDNode *LD = cast<LoadSDNode>(N1); |
| 3795 | N1 = DAG.getLoad(MVT::i32, LD->getChain(), LD->getBasePtr(), |
| 3796 | LD->getSrcValue(), LD->getSrcValueOffset()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3797 | } else { |
| 3798 | N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, MVT::v4f32, N1); |
| 3799 | N1 = DAG.getNode(ISD::BIT_CONVERT, MVT::v4i32, N1); |
| 3800 | N1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, MVT::i32, N1, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 3801 | DAG.getConstant(0, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3802 | } |
| 3803 | } |
| 3804 | N0 = DAG.getNode(ISD::BIT_CONVERT, MVT::v8i16, N0); |
| 3805 | N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 3806 | DAG.getConstant(Idx, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3807 | N1 = DAG.getNode(ISD::SRL, MVT::i32, N1, DAG.getConstant(16, MVT::i8)); |
| 3808 | N0 = DAG.getNode(X86ISD::PINSRW, MVT::v8i16, N0, N1, |
Evan Cheng | 015188f | 2006-06-15 08:14:54 +0000 | [diff] [blame] | 3809 | DAG.getConstant(Idx+1, getPointerTy())); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3810 | return DAG.getNode(ISD::BIT_CONVERT, VT, N0); |
| 3811 | } |
| 3812 | } |
| 3813 | |
| 3814 | return SDOperand(); |
| 3815 | } |
| 3816 | |
| 3817 | SDOperand |
| 3818 | X86TargetLowering::LowerSCALAR_TO_VECTOR(SDOperand Op, SelectionDAG &DAG) { |
| 3819 | SDOperand AnyExt = DAG.getNode(ISD::ANY_EXTEND, MVT::i32, Op.getOperand(0)); |
| 3820 | return DAG.getNode(X86ISD::S2VEC, Op.getValueType(), AnyExt); |
| 3821 | } |
| 3822 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3823 | // ConstantPool, JumpTable, GlobalAddress, and ExternalSymbol are lowered as |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3824 | // their target countpart wrapped in the X86ISD::Wrapper node. Suppose N is |
| 3825 | // one of the above mentioned nodes. It has to be wrapped because otherwise |
| 3826 | // Select(N) returns N. So the raw TargetGlobalAddress nodes, etc. can only |
| 3827 | // be used to form addressing mode. These wrapped nodes will be selected |
| 3828 | // into MOV32ri. |
| 3829 | SDOperand |
| 3830 | X86TargetLowering::LowerConstantPool(SDOperand Op, SelectionDAG &DAG) { |
| 3831 | ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(Op); |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3832 | SDOperand Result = DAG.getTargetConstantPool(CP->getConstVal(), |
| 3833 | getPointerTy(), |
| 3834 | CP->getAlignment()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3835 | if (Subtarget->isTargetDarwin()) { |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3836 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3837 | // With PIC, the address is actually $g + Offset. |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3838 | if (!Subtarget->is64Bit() && |
| 3839 | getTargetMachine().getRelocationModel() == Reloc::PIC_) |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3840 | Result = DAG.getNode(ISD::ADD, getPointerTy(), |
| 3841 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), Result); |
| 3842 | } |
| 3843 | |
| 3844 | return Result; |
| 3845 | } |
| 3846 | |
| 3847 | SDOperand |
| 3848 | X86TargetLowering::LowerGlobalAddress(SDOperand Op, SelectionDAG &DAG) { |
| 3849 | GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3850 | SDOperand Result = DAG.getTargetGlobalAddress(GV, getPointerTy()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3851 | if (Subtarget->isTargetDarwin()) { |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3852 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3853 | // With PIC, the address is actually $g + Offset. |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3854 | if (!Subtarget->is64Bit() && |
| 3855 | getTargetMachine().getRelocationModel() == Reloc::PIC_) |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3856 | Result = DAG.getNode(ISD::ADD, getPointerTy(), |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 3857 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
| 3858 | Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3859 | |
| 3860 | // For Darwin, external and weak symbols are indirect, so we want to load |
| 3861 | // the value at address GV, not the value of GV itself. This means that |
| 3862 | // the GlobalAddress must be in the base or index register of the address, |
| 3863 | // not the GV offset field. |
| 3864 | if (getTargetMachine().getRelocationModel() != Reloc::Static && |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3865 | Subtarget->GVRequiresExtraLoad(GV, false)) |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 3866 | Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result, NULL, 0); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3867 | } else if (Subtarget->GVRequiresExtraLoad(GV, false)) { |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3868 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 3869 | Result = DAG.getLoad(getPointerTy(), DAG.getEntryNode(), Result, NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3870 | } |
| 3871 | |
| 3872 | return Result; |
| 3873 | } |
| 3874 | |
| 3875 | SDOperand |
| 3876 | X86TargetLowering::LowerExternalSymbol(SDOperand Op, SelectionDAG &DAG) { |
| 3877 | const char *Sym = cast<ExternalSymbolSDNode>(Op)->getSymbol(); |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3878 | SDOperand Result = DAG.getTargetExternalSymbol(Sym, getPointerTy()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3879 | if (Subtarget->isTargetDarwin()) { |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 3880 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3881 | // With PIC, the address is actually $g + Offset. |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 3882 | if (!Subtarget->is64Bit() && |
| 3883 | getTargetMachine().getRelocationModel() == Reloc::PIC_) |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3884 | Result = DAG.getNode(ISD::ADD, getPointerTy(), |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 3885 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
| 3886 | Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3887 | } |
| 3888 | |
| 3889 | return Result; |
| 3890 | } |
| 3891 | |
| 3892 | SDOperand X86TargetLowering::LowerShift(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3893 | assert(Op.getNumOperands() == 3 && Op.getValueType() == MVT::i32 && |
| 3894 | "Not an i64 shift!"); |
| 3895 | bool isSRA = Op.getOpcode() == ISD::SRA_PARTS; |
| 3896 | SDOperand ShOpLo = Op.getOperand(0); |
| 3897 | SDOperand ShOpHi = Op.getOperand(1); |
| 3898 | SDOperand ShAmt = Op.getOperand(2); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3899 | SDOperand Tmp1 = isSRA ? |
| 3900 | DAG.getNode(ISD::SRA, MVT::i32, ShOpHi, DAG.getConstant(31, MVT::i8)) : |
| 3901 | DAG.getConstant(0, MVT::i32); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3902 | |
| 3903 | SDOperand Tmp2, Tmp3; |
| 3904 | if (Op.getOpcode() == ISD::SHL_PARTS) { |
| 3905 | Tmp2 = DAG.getNode(X86ISD::SHLD, MVT::i32, ShOpHi, ShOpLo, ShAmt); |
| 3906 | Tmp3 = DAG.getNode(ISD::SHL, MVT::i32, ShOpLo, ShAmt); |
| 3907 | } else { |
| 3908 | Tmp2 = DAG.getNode(X86ISD::SHRD, MVT::i32, ShOpLo, ShOpHi, ShAmt); |
Evan Cheng | b7b5706 | 2006-01-19 01:46:14 +0000 | [diff] [blame] | 3909 | Tmp3 = DAG.getNode(isSRA ? ISD::SRA : ISD::SRL, MVT::i32, ShOpHi, ShAmt); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3910 | } |
| 3911 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3912 | const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
| 3913 | SDOperand AndNode = DAG.getNode(ISD::AND, MVT::i8, ShAmt, |
| 3914 | DAG.getConstant(32, MVT::i8)); |
| 3915 | SDOperand COps[]={DAG.getEntryNode(), AndNode, DAG.getConstant(0, MVT::i8)}; |
| 3916 | SDOperand InFlag = DAG.getNode(X86ISD::CMP, VTs, 2, COps, 3).getValue(1); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3917 | |
| 3918 | SDOperand Hi, Lo; |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 3919 | SDOperand CC = DAG.getConstant(X86::COND_NE, MVT::i8); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3920 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3921 | VTs = DAG.getNodeValueTypes(MVT::i32, MVT::Flag); |
| 3922 | SmallVector<SDOperand, 4> Ops; |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3923 | if (Op.getOpcode() == ISD::SHL_PARTS) { |
| 3924 | Ops.push_back(Tmp2); |
| 3925 | Ops.push_back(Tmp3); |
| 3926 | Ops.push_back(CC); |
| 3927 | Ops.push_back(InFlag); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3928 | Hi = DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3929 | InFlag = Hi.getValue(1); |
| 3930 | |
| 3931 | Ops.clear(); |
| 3932 | Ops.push_back(Tmp3); |
| 3933 | Ops.push_back(Tmp1); |
| 3934 | Ops.push_back(CC); |
| 3935 | Ops.push_back(InFlag); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3936 | Lo = DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3937 | } else { |
| 3938 | Ops.push_back(Tmp2); |
| 3939 | Ops.push_back(Tmp3); |
| 3940 | Ops.push_back(CC); |
Evan Cheng | 910cd3c | 2006-01-09 22:29:54 +0000 | [diff] [blame] | 3941 | Ops.push_back(InFlag); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3942 | Lo = DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3943 | InFlag = Lo.getValue(1); |
| 3944 | |
| 3945 | Ops.clear(); |
| 3946 | Ops.push_back(Tmp3); |
| 3947 | Ops.push_back(Tmp1); |
| 3948 | Ops.push_back(CC); |
| 3949 | Ops.push_back(InFlag); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3950 | Hi = DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3951 | } |
| 3952 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3953 | VTs = DAG.getNodeValueTypes(MVT::i32, MVT::i32); |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 3954 | Ops.clear(); |
| 3955 | Ops.push_back(Lo); |
| 3956 | Ops.push_back(Hi); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 3957 | return DAG.getNode(ISD::MERGE_VALUES, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3958 | } |
Evan Cheng | a3195e8 | 2006-01-12 22:54:21 +0000 | [diff] [blame] | 3959 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3960 | SDOperand X86TargetLowering::LowerSINT_TO_FP(SDOperand Op, SelectionDAG &DAG) { |
| 3961 | assert(Op.getOperand(0).getValueType() <= MVT::i64 && |
| 3962 | Op.getOperand(0).getValueType() >= MVT::i16 && |
| 3963 | "Unknown SINT_TO_FP to lower!"); |
| 3964 | |
| 3965 | SDOperand Result; |
| 3966 | MVT::ValueType SrcVT = Op.getOperand(0).getValueType(); |
| 3967 | unsigned Size = MVT::getSizeInBits(SrcVT)/8; |
| 3968 | MachineFunction &MF = DAG.getMachineFunction(); |
| 3969 | int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); |
| 3970 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 3971 | SDOperand Chain = DAG.getStore(DAG.getEntryNode(), Op.getOperand(0), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 3972 | StackSlot, NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3973 | |
| 3974 | // Build the FILD |
| 3975 | std::vector<MVT::ValueType> Tys; |
| 3976 | Tys.push_back(MVT::f64); |
| 3977 | Tys.push_back(MVT::Other); |
| 3978 | if (X86ScalarSSE) Tys.push_back(MVT::Flag); |
| 3979 | std::vector<SDOperand> Ops; |
| 3980 | Ops.push_back(Chain); |
| 3981 | Ops.push_back(StackSlot); |
| 3982 | Ops.push_back(DAG.getValueType(SrcVT)); |
| 3983 | Result = DAG.getNode(X86ScalarSSE ? X86ISD::FILD_FLAG :X86ISD::FILD, |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 3984 | Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3985 | |
| 3986 | if (X86ScalarSSE) { |
| 3987 | Chain = Result.getValue(1); |
| 3988 | SDOperand InFlag = Result.getValue(2); |
| 3989 | |
| 3990 | // FIXME: Currently the FST is flagged to the FILD_FLAG. This |
| 3991 | // shouldn't be necessary except that RFP cannot be live across |
| 3992 | // multiple blocks. When stackifier is fixed, they can be uncoupled. |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3993 | MachineFunction &MF = DAG.getMachineFunction(); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 3994 | int SSFI = MF.getFrameInfo()->CreateStackObject(8, 8); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3995 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
Evan Cheng | a3195e8 | 2006-01-12 22:54:21 +0000 | [diff] [blame] | 3996 | std::vector<MVT::ValueType> Tys; |
Evan Cheng | 6dab053 | 2006-01-30 08:02:57 +0000 | [diff] [blame] | 3997 | Tys.push_back(MVT::Other); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 3998 | std::vector<SDOperand> Ops; |
Evan Cheng | a3195e8 | 2006-01-12 22:54:21 +0000 | [diff] [blame] | 3999 | Ops.push_back(Chain); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4000 | Ops.push_back(Result); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4001 | Ops.push_back(StackSlot); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4002 | Ops.push_back(DAG.getValueType(Op.getValueType())); |
| 4003 | Ops.push_back(InFlag); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 4004 | Chain = DAG.getNode(X86ISD::FST, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 4005 | Result = DAG.getLoad(Op.getValueType(), Chain, StackSlot, NULL, 0); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4006 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4007 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4008 | return Result; |
| 4009 | } |
| 4010 | |
| 4011 | SDOperand X86TargetLowering::LowerFP_TO_SINT(SDOperand Op, SelectionDAG &DAG) { |
| 4012 | assert(Op.getValueType() <= MVT::i64 && Op.getValueType() >= MVT::i16 && |
| 4013 | "Unknown FP_TO_SINT to lower!"); |
| 4014 | // We lower FP->sint64 into FISTP64, followed by a load, all to a temporary |
| 4015 | // stack slot. |
| 4016 | MachineFunction &MF = DAG.getMachineFunction(); |
| 4017 | unsigned MemSize = MVT::getSizeInBits(Op.getValueType())/8; |
| 4018 | int SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize); |
| 4019 | SDOperand StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 4020 | |
| 4021 | unsigned Opc; |
| 4022 | switch (Op.getValueType()) { |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4023 | default: assert(0 && "Invalid FP_TO_SINT to lower!"); |
| 4024 | case MVT::i16: Opc = X86ISD::FP_TO_INT16_IN_MEM; break; |
| 4025 | case MVT::i32: Opc = X86ISD::FP_TO_INT32_IN_MEM; break; |
| 4026 | case MVT::i64: Opc = X86ISD::FP_TO_INT64_IN_MEM; break; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4027 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4028 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4029 | SDOperand Chain = DAG.getEntryNode(); |
| 4030 | SDOperand Value = Op.getOperand(0); |
| 4031 | if (X86ScalarSSE) { |
| 4032 | assert(Op.getValueType() == MVT::i64 && "Invalid FP_TO_SINT to lower!"); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4033 | Chain = DAG.getStore(Chain, Value, StackSlot, NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4034 | std::vector<MVT::ValueType> Tys; |
| 4035 | Tys.push_back(MVT::f64); |
| 4036 | Tys.push_back(MVT::Other); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4037 | std::vector<SDOperand> Ops; |
Evan Cheng | 6dab053 | 2006-01-30 08:02:57 +0000 | [diff] [blame] | 4038 | Ops.push_back(Chain); |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4039 | Ops.push_back(StackSlot); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4040 | Ops.push_back(DAG.getValueType(Op.getOperand(0).getValueType())); |
Chris Lattner | bd564bf | 2006-08-08 02:23:42 +0000 | [diff] [blame] | 4041 | Value = DAG.getNode(X86ISD::FLD, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4042 | Chain = Value.getValue(1); |
| 4043 | SSFI = MF.getFrameInfo()->CreateStackObject(MemSize, MemSize); |
| 4044 | StackSlot = DAG.getFrameIndex(SSFI, getPointerTy()); |
| 4045 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4046 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4047 | // Build the FP_TO_INT*_IN_MEM |
| 4048 | std::vector<SDOperand> Ops; |
| 4049 | Ops.push_back(Chain); |
| 4050 | Ops.push_back(Value); |
| 4051 | Ops.push_back(StackSlot); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4052 | SDOperand FIST = DAG.getNode(Opc, MVT::Other, &Ops[0], Ops.size()); |
Evan Cheng | d9558e0 | 2006-01-06 00:43:03 +0000 | [diff] [blame] | 4053 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4054 | // Load the result. |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 4055 | return DAG.getLoad(Op.getValueType(), FIST, StackSlot, NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4056 | } |
| 4057 | |
| 4058 | SDOperand X86TargetLowering::LowerFABS(SDOperand Op, SelectionDAG &DAG) { |
| 4059 | MVT::ValueType VT = Op.getValueType(); |
| 4060 | const Type *OpNTy = MVT::getTypeForValueType(VT); |
| 4061 | std::vector<Constant*> CV; |
| 4062 | if (VT == MVT::f64) { |
| 4063 | CV.push_back(ConstantFP::get(OpNTy, BitsToDouble(~(1ULL << 63)))); |
| 4064 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 4065 | } else { |
| 4066 | CV.push_back(ConstantFP::get(OpNTy, BitsToFloat(~(1U << 31)))); |
| 4067 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 4068 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 4069 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 4070 | } |
| 4071 | Constant *CS = ConstantStruct::get(CV); |
| 4072 | SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4); |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 4073 | std::vector<MVT::ValueType> Tys; |
| 4074 | Tys.push_back(VT); |
| 4075 | Tys.push_back(MVT::Other); |
| 4076 | SmallVector<SDOperand, 3> Ops; |
| 4077 | Ops.push_back(DAG.getEntryNode()); |
| 4078 | Ops.push_back(CPIdx); |
| 4079 | Ops.push_back(DAG.getSrcValue(NULL)); |
| 4080 | SDOperand Mask = DAG.getNode(X86ISD::LOAD_PACK, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4081 | return DAG.getNode(X86ISD::FAND, VT, Op.getOperand(0), Mask); |
| 4082 | } |
| 4083 | |
| 4084 | SDOperand X86TargetLowering::LowerFNEG(SDOperand Op, SelectionDAG &DAG) { |
| 4085 | MVT::ValueType VT = Op.getValueType(); |
| 4086 | const Type *OpNTy = MVT::getTypeForValueType(VT); |
| 4087 | std::vector<Constant*> CV; |
| 4088 | if (VT == MVT::f64) { |
| 4089 | CV.push_back(ConstantFP::get(OpNTy, BitsToDouble(1ULL << 63))); |
| 4090 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 4091 | } else { |
| 4092 | CV.push_back(ConstantFP::get(OpNTy, BitsToFloat(1U << 31))); |
| 4093 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 4094 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 4095 | CV.push_back(ConstantFP::get(OpNTy, 0.0)); |
| 4096 | } |
| 4097 | Constant *CS = ConstantStruct::get(CV); |
| 4098 | SDOperand CPIdx = DAG.getConstantPool(CS, getPointerTy(), 4); |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 4099 | std::vector<MVT::ValueType> Tys; |
| 4100 | Tys.push_back(VT); |
| 4101 | Tys.push_back(MVT::Other); |
| 4102 | SmallVector<SDOperand, 3> Ops; |
| 4103 | Ops.push_back(DAG.getEntryNode()); |
| 4104 | Ops.push_back(CPIdx); |
| 4105 | Ops.push_back(DAG.getSrcValue(NULL)); |
| 4106 | SDOperand Mask = DAG.getNode(X86ISD::LOAD_PACK, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4107 | return DAG.getNode(X86ISD::FXOR, VT, Op.getOperand(0), Mask); |
| 4108 | } |
| 4109 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4110 | SDOperand X86TargetLowering::LowerSETCC(SDOperand Op, SelectionDAG &DAG, |
| 4111 | SDOperand Chain) { |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4112 | assert(Op.getValueType() == MVT::i8 && "SetCC type must be 8-bit integer"); |
| 4113 | SDOperand Cond; |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4114 | SDOperand Op0 = Op.getOperand(0); |
| 4115 | SDOperand Op1 = Op.getOperand(1); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4116 | SDOperand CC = Op.getOperand(2); |
| 4117 | ISD::CondCode SetCCOpcode = cast<CondCodeSDNode>(CC)->get(); |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 4118 | const MVT::ValueType *VTs1 = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
| 4119 | const MVT::ValueType *VTs2 = DAG.getNodeValueTypes(MVT::i8, MVT::Flag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4120 | bool isFP = MVT::isFloatingPoint(Op.getOperand(1).getValueType()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4121 | unsigned X86CC; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4122 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4123 | if (translateX86CC(cast<CondCodeSDNode>(CC)->get(), isFP, X86CC, |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 4124 | Op0, Op1, DAG)) { |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4125 | SDOperand Ops1[] = { Chain, Op0, Op1 }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 4126 | Cond = DAG.getNode(X86ISD::CMP, VTs1, 2, Ops1, 3).getValue(1); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4127 | SDOperand Ops2[] = { DAG.getConstant(X86CC, MVT::i8), Cond }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 4128 | return DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops2, 2); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4129 | } |
| 4130 | |
| 4131 | assert(isFP && "Illegal integer SetCC!"); |
| 4132 | |
| 4133 | SDOperand COps[] = { Chain, Op0, Op1 }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 4134 | Cond = DAG.getNode(X86ISD::CMP, VTs1, 2, COps, 3).getValue(1); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4135 | |
| 4136 | switch (SetCCOpcode) { |
| 4137 | default: assert(false && "Illegal floating point SetCC!"); |
| 4138 | case ISD::SETOEQ: { // !PF & ZF |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4139 | SDOperand Ops1[] = { DAG.getConstant(X86::COND_NP, MVT::i8), Cond }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 4140 | SDOperand Tmp1 = DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops1, 2); |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4141 | SDOperand Ops2[] = { DAG.getConstant(X86::COND_E, MVT::i8), |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4142 | Tmp1.getValue(1) }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 4143 | SDOperand Tmp2 = DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops2, 2); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4144 | return DAG.getNode(ISD::AND, MVT::i8, Tmp1, Tmp2); |
| 4145 | } |
| 4146 | case ISD::SETUNE: { // PF | !ZF |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4147 | SDOperand Ops1[] = { DAG.getConstant(X86::COND_P, MVT::i8), Cond }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 4148 | SDOperand Tmp1 = DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops1, 2); |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4149 | SDOperand Ops2[] = { DAG.getConstant(X86::COND_NE, MVT::i8), |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4150 | Tmp1.getValue(1) }; |
Evan Cheng | cf12ec4 | 2006-10-12 19:12:56 +0000 | [diff] [blame] | 4151 | SDOperand Tmp2 = DAG.getNode(X86ISD::SETCC, VTs2, 2, Ops2, 2); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4152 | return DAG.getNode(ISD::OR, MVT::i8, Tmp1, Tmp2); |
| 4153 | } |
Evan Cheng | d5781fc | 2005-12-21 20:21:51 +0000 | [diff] [blame] | 4154 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4155 | } |
Evan Cheng | 6dfa999 | 2006-01-30 23:41:35 +0000 | [diff] [blame] | 4156 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4157 | SDOperand X86TargetLowering::LowerSELECT(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4158 | bool addTest = true; |
| 4159 | SDOperand Chain = DAG.getEntryNode(); |
| 4160 | SDOperand Cond = Op.getOperand(0); |
| 4161 | SDOperand CC; |
| 4162 | const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
Evan Cheng | 9bba894 | 2006-01-26 02:13:10 +0000 | [diff] [blame] | 4163 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4164 | if (Cond.getOpcode() == ISD::SETCC) |
| 4165 | Cond = LowerSETCC(Cond, DAG, Chain); |
| 4166 | |
| 4167 | if (Cond.getOpcode() == X86ISD::SETCC) { |
| 4168 | CC = Cond.getOperand(0); |
| 4169 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4170 | // If condition flag is set by a X86ISD::CMP, then make a copy of it |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4171 | // (since flag operand cannot be shared). Use it as the condition setting |
| 4172 | // operand in place of the X86ISD::SETCC. |
| 4173 | // If the X86ISD::SETCC has more than one use, then perhaps it's better |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4174 | // to use a test instead of duplicating the X86ISD::CMP (for register |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4175 | // pressure reason)? |
| 4176 | SDOperand Cmp = Cond.getOperand(1); |
| 4177 | unsigned Opc = Cmp.getOpcode(); |
| 4178 | bool IllegalFPCMov = !X86ScalarSSE && |
| 4179 | MVT::isFloatingPoint(Op.getValueType()) && |
| 4180 | !hasFPCMov(cast<ConstantSDNode>(CC)->getSignExtended()); |
| 4181 | if ((Opc == X86ISD::CMP || Opc == X86ISD::COMI || Opc == X86ISD::UCOMI) && |
| 4182 | !IllegalFPCMov) { |
| 4183 | SDOperand Ops[] = { Chain, Cmp.getOperand(1), Cmp.getOperand(2) }; |
| 4184 | Cond = DAG.getNode(Opc, VTs, 2, Ops, 3); |
| 4185 | addTest = false; |
| 4186 | } |
| 4187 | } |
Evan Cheng | aaca22c | 2006-01-10 20:26:56 +0000 | [diff] [blame] | 4188 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4189 | if (addTest) { |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4190 | CC = DAG.getConstant(X86::COND_NE, MVT::i8); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4191 | SDOperand Ops[] = { Chain, Cond, DAG.getConstant(0, MVT::i8) }; |
| 4192 | Cond = DAG.getNode(X86ISD::CMP, VTs, 2, Ops, 3); |
Evan Cheng | 7df96d6 | 2005-12-17 01:21:05 +0000 | [diff] [blame] | 4193 | } |
Evan Cheng | 6dfa999 | 2006-01-30 23:41:35 +0000 | [diff] [blame] | 4194 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4195 | VTs = DAG.getNodeValueTypes(Op.getValueType(), MVT::Flag); |
| 4196 | SmallVector<SDOperand, 4> Ops; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4197 | // X86ISD::CMOV means set the result (which is operand 1) to the RHS if |
| 4198 | // condition is true. |
| 4199 | Ops.push_back(Op.getOperand(2)); |
| 4200 | Ops.push_back(Op.getOperand(1)); |
| 4201 | Ops.push_back(CC); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4202 | Ops.push_back(Cond.getValue(1)); |
| 4203 | return DAG.getNode(X86ISD::CMOV, VTs, 2, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4204 | } |
Evan Cheng | 9bba894 | 2006-01-26 02:13:10 +0000 | [diff] [blame] | 4205 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4206 | SDOperand X86TargetLowering::LowerBRCOND(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4207 | bool addTest = true; |
| 4208 | SDOperand Chain = Op.getOperand(0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4209 | SDOperand Cond = Op.getOperand(1); |
| 4210 | SDOperand Dest = Op.getOperand(2); |
| 4211 | SDOperand CC; |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4212 | const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
| 4213 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4214 | if (Cond.getOpcode() == ISD::SETCC) |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4215 | Cond = LowerSETCC(Cond, DAG, Chain); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4216 | |
| 4217 | if (Cond.getOpcode() == X86ISD::SETCC) { |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4218 | CC = Cond.getOperand(0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4219 | |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4220 | // If condition flag is set by a X86ISD::CMP, then make a copy of it |
| 4221 | // (since flag operand cannot be shared). Use it as the condition setting |
| 4222 | // operand in place of the X86ISD::SETCC. |
| 4223 | // If the X86ISD::SETCC has more than one use, then perhaps it's better |
| 4224 | // to use a test instead of duplicating the X86ISD::CMP (for register |
| 4225 | // pressure reason)? |
| 4226 | SDOperand Cmp = Cond.getOperand(1); |
| 4227 | unsigned Opc = Cmp.getOpcode(); |
| 4228 | if (Opc == X86ISD::CMP || Opc == X86ISD::COMI || Opc == X86ISD::UCOMI) { |
| 4229 | SDOperand Ops[] = { Chain, Cmp.getOperand(1), Cmp.getOperand(2) }; |
| 4230 | Cond = DAG.getNode(Opc, VTs, 2, Ops, 3); |
| 4231 | addTest = false; |
| 4232 | } |
| 4233 | } |
Evan Cheng | 1bcee36 | 2006-01-13 01:03:02 +0000 | [diff] [blame] | 4234 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4235 | if (addTest) { |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 4236 | CC = DAG.getConstant(X86::COND_NE, MVT::i8); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4237 | SDOperand Ops[] = { Chain, Cond, DAG.getConstant(0, MVT::i8) }; |
| 4238 | Cond = DAG.getNode(X86ISD::CMP, VTs, 2, Ops, 3); |
Evan Cheng | 898101c | 2005-12-19 23:12:38 +0000 | [diff] [blame] | 4239 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4240 | return DAG.getNode(X86ISD::BRCOND, Op.getValueType(), |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4241 | Cond, Op.getOperand(2), CC, Cond.getValue(1)); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4242 | } |
Evan Cheng | 67f92a7 | 2006-01-11 22:15:48 +0000 | [diff] [blame] | 4243 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4244 | SDOperand X86TargetLowering::LowerJumpTable(SDOperand Op, SelectionDAG &DAG) { |
| 4245 | JumpTableSDNode *JT = cast<JumpTableSDNode>(Op); |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 4246 | SDOperand Result = DAG.getTargetJumpTable(JT->getIndex(), getPointerTy()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4247 | if (Subtarget->isTargetDarwin()) { |
Evan Cheng | d0ff02c | 2006-11-29 23:19:46 +0000 | [diff] [blame] | 4248 | Result = DAG.getNode(X86ISD::Wrapper, getPointerTy(), Result); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4249 | // With PIC, the address is actually $g + Offset. |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4250 | if (!Subtarget->is64Bit() && |
| 4251 | getTargetMachine().getRelocationModel() == Reloc::PIC_) |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4252 | Result = DAG.getNode(ISD::ADD, getPointerTy(), |
Chris Lattner | 8c0c10c | 2006-05-16 06:45:34 +0000 | [diff] [blame] | 4253 | DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4254 | Result); |
Evan Cheng | 67f92a7 | 2006-01-11 22:15:48 +0000 | [diff] [blame] | 4255 | } |
Evan Cheng | bbbb2fb | 2006-02-25 09:55:19 +0000 | [diff] [blame] | 4256 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4257 | return Result; |
| 4258 | } |
Evan Cheng | 7ccced6 | 2006-02-18 00:15:05 +0000 | [diff] [blame] | 4259 | |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 4260 | SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { |
| 4261 | unsigned CallingConv= cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4262 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4263 | if (Subtarget->is64Bit()) |
| 4264 | return LowerX86_64CCCCallTo(Op, DAG); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 4265 | else |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4266 | switch (CallingConv) { |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 4267 | default: |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4268 | assert(0 && "Unsupported calling convention"); |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 4269 | case CallingConv::Fast: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4270 | if (EnableFastCC) { |
| 4271 | return LowerFastCCCallTo(Op, DAG, false); |
| 4272 | } |
| 4273 | // Falls through |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 4274 | case CallingConv::C: |
| 4275 | case CallingConv::CSRet: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4276 | return LowerCCCCallTo(Op, DAG); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4277 | case CallingConv::X86_StdCall: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4278 | return LowerStdCallCCCallTo(Op, DAG); |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 4279 | case CallingConv::X86_FastCall: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4280 | return LowerFastCCCallTo(Op, DAG, true); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4281 | } |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 4282 | } |
| 4283 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4284 | SDOperand X86TargetLowering::LowerRET(SDOperand Op, SelectionDAG &DAG) { |
| 4285 | SDOperand Copy; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4286 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4287 | switch(Op.getNumOperands()) { |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4288 | default: |
| 4289 | assert(0 && "Do not know how to return this many arguments!"); |
| 4290 | abort(); |
Chris Lattner | b2be403 | 2006-04-17 20:32:50 +0000 | [diff] [blame] | 4291 | case 1: // ret void. |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4292 | return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, Op.getOperand(0), |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4293 | DAG.getConstant(getBytesToPopOnReturn(), MVT::i16)); |
Evan Cheng | 6848be1 | 2006-05-26 23:10:12 +0000 | [diff] [blame] | 4294 | case 3: { |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4295 | MVT::ValueType ArgVT = Op.getOperand(1).getValueType(); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4296 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4297 | if (MVT::isVector(ArgVT) || |
| 4298 | (Subtarget->is64Bit() && MVT::isFloatingPoint(ArgVT))) { |
Chris Lattner | b2be403 | 2006-04-17 20:32:50 +0000 | [diff] [blame] | 4299 | // Integer or FP vector result -> XMM0. |
| 4300 | if (DAG.getMachineFunction().liveout_empty()) |
| 4301 | DAG.getMachineFunction().addLiveOut(X86::XMM0); |
| 4302 | Copy = DAG.getCopyToReg(Op.getOperand(0), X86::XMM0, Op.getOperand(1), |
| 4303 | SDOperand()); |
| 4304 | } else if (MVT::isInteger(ArgVT)) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4305 | // Integer result -> EAX / RAX. |
| 4306 | // The C calling convention guarantees the return value has been |
| 4307 | // promoted to at least MVT::i32. The X86-64 ABI doesn't require the |
| 4308 | // value to be promoted MVT::i64. So we don't have to extend it to |
| 4309 | // 64-bit. Return the value in EAX, but mark RAX as liveout. |
| 4310 | unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX; |
Chris Lattner | b2be403 | 2006-04-17 20:32:50 +0000 | [diff] [blame] | 4311 | if (DAG.getMachineFunction().liveout_empty()) |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4312 | DAG.getMachineFunction().addLiveOut(Reg); |
Chris Lattner | b2be403 | 2006-04-17 20:32:50 +0000 | [diff] [blame] | 4313 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4314 | Reg = (ArgVT == MVT::i64) ? X86::RAX : X86::EAX; |
| 4315 | Copy = DAG.getCopyToReg(Op.getOperand(0), Reg, Op.getOperand(1), |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4316 | SDOperand()); |
Chris Lattner | b2be403 | 2006-04-17 20:32:50 +0000 | [diff] [blame] | 4317 | } else if (!X86ScalarSSE) { |
| 4318 | // FP return with fp-stack value. |
| 4319 | if (DAG.getMachineFunction().liveout_empty()) |
| 4320 | DAG.getMachineFunction().addLiveOut(X86::ST0); |
| 4321 | |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4322 | std::vector<MVT::ValueType> Tys; |
| 4323 | Tys.push_back(MVT::Other); |
| 4324 | Tys.push_back(MVT::Flag); |
| 4325 | std::vector<SDOperand> Ops; |
| 4326 | Ops.push_back(Op.getOperand(0)); |
| 4327 | Ops.push_back(Op.getOperand(1)); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4328 | Copy = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, &Ops[0], Ops.size()); |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4329 | } else { |
Chris Lattner | b2be403 | 2006-04-17 20:32:50 +0000 | [diff] [blame] | 4330 | // FP return with ScalarSSE (return on fp-stack). |
| 4331 | if (DAG.getMachineFunction().liveout_empty()) |
| 4332 | DAG.getMachineFunction().addLiveOut(X86::ST0); |
| 4333 | |
Evan Cheng | 0d084c9 | 2006-02-01 00:20:21 +0000 | [diff] [blame] | 4334 | SDOperand MemLoc; |
| 4335 | SDOperand Chain = Op.getOperand(0); |
Evan Cheng | 0e8671b | 2006-01-31 23:19:54 +0000 | [diff] [blame] | 4336 | SDOperand Value = Op.getOperand(1); |
| 4337 | |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 4338 | if (ISD::isNON_EXTLoad(Value.Val) && |
Evan Cheng | 760df29 | 2006-02-01 01:19:32 +0000 | [diff] [blame] | 4339 | (Chain == Value.getValue(1) || Chain == Value.getOperand(0))) { |
Evan Cheng | 0e8671b | 2006-01-31 23:19:54 +0000 | [diff] [blame] | 4340 | Chain = Value.getOperand(0); |
| 4341 | MemLoc = Value.getOperand(1); |
| 4342 | } else { |
| 4343 | // Spill the value to memory and reload it into top of stack. |
| 4344 | unsigned Size = MVT::getSizeInBits(ArgVT)/8; |
| 4345 | MachineFunction &MF = DAG.getMachineFunction(); |
| 4346 | int SSFI = MF.getFrameInfo()->CreateStackObject(Size, Size); |
| 4347 | MemLoc = DAG.getFrameIndex(SSFI, getPointerTy()); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4348 | Chain = DAG.getStore(Op.getOperand(0), Value, MemLoc, NULL, 0); |
Evan Cheng | 0e8671b | 2006-01-31 23:19:54 +0000 | [diff] [blame] | 4349 | } |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4350 | std::vector<MVT::ValueType> Tys; |
| 4351 | Tys.push_back(MVT::f64); |
| 4352 | Tys.push_back(MVT::Other); |
| 4353 | std::vector<SDOperand> Ops; |
| 4354 | Ops.push_back(Chain); |
Evan Cheng | 0e8671b | 2006-01-31 23:19:54 +0000 | [diff] [blame] | 4355 | Ops.push_back(MemLoc); |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4356 | Ops.push_back(DAG.getValueType(ArgVT)); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4357 | Copy = DAG.getNode(X86ISD::FLD, Tys, &Ops[0], Ops.size()); |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4358 | Tys.clear(); |
| 4359 | Tys.push_back(MVT::Other); |
| 4360 | Tys.push_back(MVT::Flag); |
| 4361 | Ops.clear(); |
| 4362 | Ops.push_back(Copy.getValue(1)); |
| 4363 | Ops.push_back(Copy); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4364 | Copy = DAG.getNode(X86ISD::FP_SET_RESULT, Tys, &Ops[0], Ops.size()); |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4365 | } |
| 4366 | break; |
| 4367 | } |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4368 | case 5: { |
| 4369 | unsigned Reg1 = Subtarget->is64Bit() ? X86::RAX : X86::EAX; |
| 4370 | unsigned Reg2 = Subtarget->is64Bit() ? X86::RDX : X86::EDX; |
Chris Lattner | b2be403 | 2006-04-17 20:32:50 +0000 | [diff] [blame] | 4371 | if (DAG.getMachineFunction().liveout_empty()) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4372 | DAG.getMachineFunction().addLiveOut(Reg1); |
| 4373 | DAG.getMachineFunction().addLiveOut(Reg2); |
Chris Lattner | b2be403 | 2006-04-17 20:32:50 +0000 | [diff] [blame] | 4374 | } |
| 4375 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4376 | Copy = DAG.getCopyToReg(Op.getOperand(0), Reg2, Op.getOperand(3), |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4377 | SDOperand()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4378 | Copy = DAG.getCopyToReg(Copy, Reg1, Op.getOperand(1), Copy.getValue(1)); |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4379 | break; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4380 | } |
Nate Begeman | ee62557 | 2006-01-27 21:09:22 +0000 | [diff] [blame] | 4381 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4382 | return DAG.getNode(X86ISD::RET_FLAG, MVT::Other, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4383 | Copy, DAG.getConstant(getBytesToPopOnReturn(), MVT::i16), |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4384 | Copy.getValue(1)); |
| 4385 | } |
| 4386 | |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 4387 | SDOperand |
| 4388 | X86TargetLowering::LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | e8bd0a3 | 2006-06-06 23:30:24 +0000 | [diff] [blame] | 4389 | MachineFunction &MF = DAG.getMachineFunction(); |
| 4390 | const Function* Fn = MF.getFunction(); |
| 4391 | if (Fn->hasExternalLinkage() && |
Anton Korobeynikov | bcb9770 | 2006-09-17 20:25:45 +0000 | [diff] [blame] | 4392 | Subtarget->isTargetCygwin() && |
Evan Cheng | b12223e | 2006-06-09 06:24:42 +0000 | [diff] [blame] | 4393 | Fn->getName() == "main") |
Evan Cheng | e8bd0a3 | 2006-06-06 23:30:24 +0000 | [diff] [blame] | 4394 | MF.getInfo<X86FunctionInfo>()->setForceFramePointer(true); |
| 4395 | |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 4396 | unsigned CC = cast<ConstantSDNode>(Op.getOperand(1))->getValue(); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4397 | if (Subtarget->is64Bit()) |
| 4398 | return LowerX86_64CCCArguments(Op, DAG); |
Evan Cheng | 25caf63 | 2006-05-23 21:06:34 +0000 | [diff] [blame] | 4399 | else |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4400 | switch(CC) { |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 4401 | default: |
| 4402 | assert(0 && "Unsupported calling convention"); |
| 4403 | case CallingConv::Fast: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4404 | if (EnableFastCC) { |
| 4405 | return LowerFastCCArguments(Op, DAG); |
| 4406 | } |
| 4407 | // Falls through |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 4408 | case CallingConv::C: |
| 4409 | case CallingConv::CSRet: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4410 | return LowerCCCArguments(Op, DAG); |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 4411 | case CallingConv::X86_StdCall: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4412 | MF.getInfo<X86FunctionInfo>()->setDecorationStyle(StdCall); |
| 4413 | return LowerStdCallCCArguments(Op, DAG); |
Chris Lattner | f38f543 | 2006-09-27 18:29:38 +0000 | [diff] [blame] | 4414 | case CallingConv::X86_FastCall: |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4415 | MF.getInfo<X86FunctionInfo>()->setDecorationStyle(FastCall); |
| 4416 | return LowerFastCallCCArguments(Op, DAG); |
Anton Korobeynikov | f824868 | 2006-09-20 22:03:51 +0000 | [diff] [blame] | 4417 | } |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 4418 | } |
| 4419 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4420 | SDOperand X86TargetLowering::LowerMEMSET(SDOperand Op, SelectionDAG &DAG) { |
| 4421 | SDOperand InFlag(0, 0); |
| 4422 | SDOperand Chain = Op.getOperand(0); |
| 4423 | unsigned Align = |
| 4424 | (unsigned)cast<ConstantSDNode>(Op.getOperand(4))->getValue(); |
| 4425 | if (Align == 0) Align = 1; |
| 4426 | |
| 4427 | ConstantSDNode *I = dyn_cast<ConstantSDNode>(Op.getOperand(3)); |
| 4428 | // If not DWORD aligned, call memset if size is less than the threshold. |
| 4429 | // It knows how to align to the right boundary first. |
| 4430 | if ((Align & 3) != 0 || |
| 4431 | (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) { |
| 4432 | MVT::ValueType IntPtr = getPointerTy(); |
Owen Anderson | a69571c | 2006-05-03 01:29:57 +0000 | [diff] [blame] | 4433 | const Type *IntPtrTy = getTargetData()->getIntPtrType(); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4434 | std::vector<std::pair<SDOperand, const Type*> > Args; |
| 4435 | Args.push_back(std::make_pair(Op.getOperand(1), IntPtrTy)); |
| 4436 | // Extend the ubyte argument to be an int value for the call. |
| 4437 | SDOperand Val = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Op.getOperand(2)); |
| 4438 | Args.push_back(std::make_pair(Val, IntPtrTy)); |
| 4439 | Args.push_back(std::make_pair(Op.getOperand(3), IntPtrTy)); |
| 4440 | std::pair<SDOperand,SDOperand> CallResult = |
| 4441 | LowerCallTo(Chain, Type::VoidTy, false, CallingConv::C, false, |
| 4442 | DAG.getExternalSymbol("memset", IntPtr), Args, DAG); |
| 4443 | return CallResult.second; |
Evan Cheng | 48090aa | 2006-03-21 23:01:21 +0000 | [diff] [blame] | 4444 | } |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 4445 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4446 | MVT::ValueType AVT; |
| 4447 | SDOperand Count; |
| 4448 | ConstantSDNode *ValC = dyn_cast<ConstantSDNode>(Op.getOperand(2)); |
| 4449 | unsigned BytesLeft = 0; |
| 4450 | bool TwoRepStos = false; |
| 4451 | if (ValC) { |
| 4452 | unsigned ValReg; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4453 | uint64_t Val = ValC->getValue() & 255; |
Evan Cheng | 5ced1d8 | 2006-04-06 23:23:56 +0000 | [diff] [blame] | 4454 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4455 | // If the value is a constant, then we can potentially use larger sets. |
| 4456 | switch (Align & 3) { |
| 4457 | case 2: // WORD aligned |
| 4458 | AVT = MVT::i16; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4459 | ValReg = X86::AX; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4460 | Val = (Val << 8) | Val; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4461 | break; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4462 | case 0: // DWORD aligned |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4463 | AVT = MVT::i32; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4464 | ValReg = X86::EAX; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4465 | Val = (Val << 8) | Val; |
| 4466 | Val = (Val << 16) | Val; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4467 | if (Subtarget->is64Bit() && ((Align & 0xF) == 0)) { // QWORD aligned |
| 4468 | AVT = MVT::i64; |
| 4469 | ValReg = X86::RAX; |
| 4470 | Val = (Val << 32) | Val; |
| 4471 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4472 | break; |
| 4473 | default: // Byte aligned |
| 4474 | AVT = MVT::i8; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4475 | ValReg = X86::AL; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4476 | Count = Op.getOperand(3); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4477 | break; |
Evan Cheng | 80d428c | 2006-04-19 22:48:17 +0000 | [diff] [blame] | 4478 | } |
| 4479 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4480 | if (AVT > MVT::i8) { |
| 4481 | if (I) { |
| 4482 | unsigned UBytes = MVT::getSizeInBits(AVT) / 8; |
| 4483 | Count = DAG.getConstant(I->getValue() / UBytes, getPointerTy()); |
| 4484 | BytesLeft = I->getValue() % UBytes; |
| 4485 | } else { |
| 4486 | assert(AVT >= MVT::i32 && |
| 4487 | "Do not use rep;stos if not at least DWORD aligned"); |
| 4488 | Count = DAG.getNode(ISD::SRL, Op.getOperand(3).getValueType(), |
| 4489 | Op.getOperand(3), DAG.getConstant(2, MVT::i8)); |
| 4490 | TwoRepStos = true; |
| 4491 | } |
| 4492 | } |
| 4493 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4494 | Chain = DAG.getCopyToReg(Chain, ValReg, DAG.getConstant(Val, AVT), |
| 4495 | InFlag); |
| 4496 | InFlag = Chain.getValue(1); |
| 4497 | } else { |
| 4498 | AVT = MVT::i8; |
| 4499 | Count = Op.getOperand(3); |
| 4500 | Chain = DAG.getCopyToReg(Chain, X86::AL, Op.getOperand(2), InFlag); |
| 4501 | InFlag = Chain.getValue(1); |
Evan Cheng | b9df0ca | 2006-03-22 02:53:00 +0000 | [diff] [blame] | 4502 | } |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 4503 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4504 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RCX : X86::ECX, |
| 4505 | Count, InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4506 | InFlag = Chain.getValue(1); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4507 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RDI : X86::EDI, |
| 4508 | Op.getOperand(1), InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4509 | InFlag = Chain.getValue(1); |
Evan Cheng | a0b3afb | 2006-03-27 07:00:16 +0000 | [diff] [blame] | 4510 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4511 | std::vector<MVT::ValueType> Tys; |
| 4512 | Tys.push_back(MVT::Other); |
| 4513 | Tys.push_back(MVT::Flag); |
| 4514 | std::vector<SDOperand> Ops; |
| 4515 | Ops.push_back(Chain); |
| 4516 | Ops.push_back(DAG.getValueType(AVT)); |
| 4517 | Ops.push_back(InFlag); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4518 | Chain = DAG.getNode(X86ISD::REP_STOS, Tys, &Ops[0], Ops.size()); |
Evan Cheng | c78d3b4 | 2006-04-24 18:01:45 +0000 | [diff] [blame] | 4519 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4520 | if (TwoRepStos) { |
| 4521 | InFlag = Chain.getValue(1); |
| 4522 | Count = Op.getOperand(3); |
| 4523 | MVT::ValueType CVT = Count.getValueType(); |
| 4524 | SDOperand Left = DAG.getNode(ISD::AND, CVT, Count, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4525 | DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT)); |
| 4526 | Chain = DAG.getCopyToReg(Chain, (CVT == MVT::i64) ? X86::RCX : X86::ECX, |
| 4527 | Left, InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4528 | InFlag = Chain.getValue(1); |
| 4529 | Tys.clear(); |
| 4530 | Tys.push_back(MVT::Other); |
| 4531 | Tys.push_back(MVT::Flag); |
| 4532 | Ops.clear(); |
| 4533 | Ops.push_back(Chain); |
| 4534 | Ops.push_back(DAG.getValueType(MVT::i8)); |
| 4535 | Ops.push_back(InFlag); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4536 | Chain = DAG.getNode(X86ISD::REP_STOS, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4537 | } else if (BytesLeft) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4538 | // Issue stores for the last 1 - 7 bytes. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4539 | SDOperand Value; |
| 4540 | unsigned Val = ValC->getValue() & 255; |
| 4541 | unsigned Offset = I->getValue() - BytesLeft; |
| 4542 | SDOperand DstAddr = Op.getOperand(1); |
| 4543 | MVT::ValueType AddrVT = DstAddr.getValueType(); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4544 | if (BytesLeft >= 4) { |
| 4545 | Val = (Val << 8) | Val; |
| 4546 | Val = (Val << 16) | Val; |
| 4547 | Value = DAG.getConstant(Val, MVT::i32); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4548 | Chain = DAG.getStore(Chain, Value, |
| 4549 | DAG.getNode(ISD::ADD, AddrVT, DstAddr, |
| 4550 | DAG.getConstant(Offset, AddrVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4551 | NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4552 | BytesLeft -= 4; |
| 4553 | Offset += 4; |
| 4554 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4555 | if (BytesLeft >= 2) { |
| 4556 | Value = DAG.getConstant((Val << 8) | Val, MVT::i16); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4557 | Chain = DAG.getStore(Chain, Value, |
| 4558 | DAG.getNode(ISD::ADD, AddrVT, DstAddr, |
| 4559 | DAG.getConstant(Offset, AddrVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4560 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4561 | BytesLeft -= 2; |
| 4562 | Offset += 2; |
Evan Cheng | 386031a | 2006-03-24 07:29:27 +0000 | [diff] [blame] | 4563 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4564 | if (BytesLeft == 1) { |
| 4565 | Value = DAG.getConstant(Val, MVT::i8); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4566 | Chain = DAG.getStore(Chain, Value, |
| 4567 | DAG.getNode(ISD::ADD, AddrVT, DstAddr, |
| 4568 | DAG.getConstant(Offset, AddrVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4569 | NULL, 0); |
Evan Cheng | ba05f72 | 2006-04-21 23:03:30 +0000 | [diff] [blame] | 4570 | } |
Evan Cheng | 386031a | 2006-03-24 07:29:27 +0000 | [diff] [blame] | 4571 | } |
Evan Cheng | 11e15b3 | 2006-04-03 20:53:28 +0000 | [diff] [blame] | 4572 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4573 | return Chain; |
| 4574 | } |
Evan Cheng | 11e15b3 | 2006-04-03 20:53:28 +0000 | [diff] [blame] | 4575 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4576 | SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) { |
| 4577 | SDOperand Chain = Op.getOperand(0); |
| 4578 | unsigned Align = |
| 4579 | (unsigned)cast<ConstantSDNode>(Op.getOperand(4))->getValue(); |
| 4580 | if (Align == 0) Align = 1; |
Evan Cheng | 11e15b3 | 2006-04-03 20:53:28 +0000 | [diff] [blame] | 4581 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4582 | ConstantSDNode *I = dyn_cast<ConstantSDNode>(Op.getOperand(3)); |
| 4583 | // If not DWORD aligned, call memcpy if size is less than the threshold. |
| 4584 | // It knows how to align to the right boundary first. |
| 4585 | if ((Align & 3) != 0 || |
| 4586 | (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) { |
| 4587 | MVT::ValueType IntPtr = getPointerTy(); |
Owen Anderson | a69571c | 2006-05-03 01:29:57 +0000 | [diff] [blame] | 4588 | const Type *IntPtrTy = getTargetData()->getIntPtrType(); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4589 | std::vector<std::pair<SDOperand, const Type*> > Args; |
| 4590 | Args.push_back(std::make_pair(Op.getOperand(1), IntPtrTy)); |
| 4591 | Args.push_back(std::make_pair(Op.getOperand(2), IntPtrTy)); |
| 4592 | Args.push_back(std::make_pair(Op.getOperand(3), IntPtrTy)); |
| 4593 | std::pair<SDOperand,SDOperand> CallResult = |
| 4594 | LowerCallTo(Chain, Type::VoidTy, false, CallingConv::C, false, |
| 4595 | DAG.getExternalSymbol("memcpy", IntPtr), Args, DAG); |
| 4596 | return CallResult.second; |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 4597 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4598 | |
| 4599 | MVT::ValueType AVT; |
| 4600 | SDOperand Count; |
| 4601 | unsigned BytesLeft = 0; |
| 4602 | bool TwoRepMovs = false; |
| 4603 | switch (Align & 3) { |
| 4604 | case 2: // WORD aligned |
| 4605 | AVT = MVT::i16; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4606 | break; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4607 | case 0: // DWORD aligned |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4608 | AVT = MVT::i32; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4609 | if (Subtarget->is64Bit() && ((Align & 0xF) == 0)) // QWORD aligned |
| 4610 | AVT = MVT::i64; |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4611 | break; |
| 4612 | default: // Byte aligned |
| 4613 | AVT = MVT::i8; |
| 4614 | Count = Op.getOperand(3); |
| 4615 | break; |
| 4616 | } |
| 4617 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4618 | if (AVT > MVT::i8) { |
| 4619 | if (I) { |
| 4620 | unsigned UBytes = MVT::getSizeInBits(AVT) / 8; |
| 4621 | Count = DAG.getConstant(I->getValue() / UBytes, getPointerTy()); |
| 4622 | BytesLeft = I->getValue() % UBytes; |
| 4623 | } else { |
| 4624 | assert(AVT >= MVT::i32 && |
| 4625 | "Do not use rep;movs if not at least DWORD aligned"); |
| 4626 | Count = DAG.getNode(ISD::SRL, Op.getOperand(3).getValueType(), |
| 4627 | Op.getOperand(3), DAG.getConstant(2, MVT::i8)); |
| 4628 | TwoRepMovs = true; |
| 4629 | } |
| 4630 | } |
| 4631 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4632 | SDOperand InFlag(0, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4633 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RCX : X86::ECX, |
| 4634 | Count, InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4635 | InFlag = Chain.getValue(1); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4636 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RDI : X86::EDI, |
| 4637 | Op.getOperand(1), InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4638 | InFlag = Chain.getValue(1); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4639 | Chain = DAG.getCopyToReg(Chain, Subtarget->is64Bit() ? X86::RSI : X86::ESI, |
| 4640 | Op.getOperand(2), InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4641 | InFlag = Chain.getValue(1); |
| 4642 | |
| 4643 | std::vector<MVT::ValueType> Tys; |
| 4644 | Tys.push_back(MVT::Other); |
| 4645 | Tys.push_back(MVT::Flag); |
| 4646 | std::vector<SDOperand> Ops; |
| 4647 | Ops.push_back(Chain); |
| 4648 | Ops.push_back(DAG.getValueType(AVT)); |
| 4649 | Ops.push_back(InFlag); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4650 | Chain = DAG.getNode(X86ISD::REP_MOVS, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4651 | |
| 4652 | if (TwoRepMovs) { |
| 4653 | InFlag = Chain.getValue(1); |
| 4654 | Count = Op.getOperand(3); |
| 4655 | MVT::ValueType CVT = Count.getValueType(); |
| 4656 | SDOperand Left = DAG.getNode(ISD::AND, CVT, Count, |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4657 | DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT)); |
| 4658 | Chain = DAG.getCopyToReg(Chain, (CVT == MVT::i64) ? X86::RCX : X86::ECX, |
| 4659 | Left, InFlag); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4660 | InFlag = Chain.getValue(1); |
| 4661 | Tys.clear(); |
| 4662 | Tys.push_back(MVT::Other); |
| 4663 | Tys.push_back(MVT::Flag); |
| 4664 | Ops.clear(); |
| 4665 | Ops.push_back(Chain); |
| 4666 | Ops.push_back(DAG.getValueType(MVT::i8)); |
| 4667 | Ops.push_back(InFlag); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4668 | Chain = DAG.getNode(X86ISD::REP_MOVS, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4669 | } else if (BytesLeft) { |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4670 | // Issue loads and stores for the last 1 - 7 bytes. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4671 | unsigned Offset = I->getValue() - BytesLeft; |
| 4672 | SDOperand DstAddr = Op.getOperand(1); |
| 4673 | MVT::ValueType DstVT = DstAddr.getValueType(); |
| 4674 | SDOperand SrcAddr = Op.getOperand(2); |
| 4675 | MVT::ValueType SrcVT = SrcAddr.getValueType(); |
| 4676 | SDOperand Value; |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4677 | if (BytesLeft >= 4) { |
| 4678 | Value = DAG.getLoad(MVT::i32, Chain, |
| 4679 | DAG.getNode(ISD::ADD, SrcVT, SrcAddr, |
| 4680 | DAG.getConstant(Offset, SrcVT)), |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 4681 | NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4682 | Chain = Value.getValue(1); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4683 | Chain = DAG.getStore(Chain, Value, |
| 4684 | DAG.getNode(ISD::ADD, DstVT, DstAddr, |
| 4685 | DAG.getConstant(Offset, DstVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4686 | NULL, 0); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4687 | BytesLeft -= 4; |
| 4688 | Offset += 4; |
| 4689 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4690 | if (BytesLeft >= 2) { |
| 4691 | Value = DAG.getLoad(MVT::i16, Chain, |
| 4692 | DAG.getNode(ISD::ADD, SrcVT, SrcAddr, |
| 4693 | DAG.getConstant(Offset, SrcVT)), |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 4694 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4695 | Chain = Value.getValue(1); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4696 | Chain = DAG.getStore(Chain, Value, |
| 4697 | DAG.getNode(ISD::ADD, DstVT, DstAddr, |
| 4698 | DAG.getConstant(Offset, DstVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4699 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4700 | BytesLeft -= 2; |
| 4701 | Offset += 2; |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 4702 | } |
| 4703 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4704 | if (BytesLeft == 1) { |
| 4705 | Value = DAG.getLoad(MVT::i8, Chain, |
| 4706 | DAG.getNode(ISD::ADD, SrcVT, SrcAddr, |
| 4707 | DAG.getConstant(Offset, SrcVT)), |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 4708 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4709 | Chain = Value.getValue(1); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4710 | Chain = DAG.getStore(Chain, Value, |
| 4711 | DAG.getNode(ISD::ADD, DstVT, DstAddr, |
| 4712 | DAG.getConstant(Offset, DstVT)), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4713 | NULL, 0); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4714 | } |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 4715 | } |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4716 | |
| 4717 | return Chain; |
| 4718 | } |
| 4719 | |
| 4720 | SDOperand |
| 4721 | X86TargetLowering::LowerREADCYCLCECOUNTER(SDOperand Op, SelectionDAG &DAG) { |
| 4722 | std::vector<MVT::ValueType> Tys; |
| 4723 | Tys.push_back(MVT::Other); |
| 4724 | Tys.push_back(MVT::Flag); |
| 4725 | std::vector<SDOperand> Ops; |
| 4726 | Ops.push_back(Op.getOperand(0)); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4727 | SDOperand rd = DAG.getNode(X86ISD::RDTSC_DAG, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4728 | Ops.clear(); |
Evan Cheng | 3fa9dff | 2006-11-29 08:28:13 +0000 | [diff] [blame] | 4729 | if (Subtarget->is64Bit()) { |
| 4730 | SDOperand Copy1 = DAG.getCopyFromReg(rd, X86::RAX, MVT::i64, rd.getValue(1)); |
| 4731 | SDOperand Copy2 = DAG.getCopyFromReg(Copy1.getValue(1), X86::RDX, |
| 4732 | MVT::i64, Copy1.getValue(2)); |
| 4733 | SDOperand Tmp = DAG.getNode(ISD::SHL, MVT::i64, Copy2, |
| 4734 | DAG.getConstant(32, MVT::i8)); |
| 4735 | Ops.push_back(DAG.getNode(ISD::OR, MVT::i64, Copy1, Tmp)); |
| 4736 | Ops.push_back(Copy2.getValue(1)); |
| 4737 | Tys[0] = MVT::i64; |
| 4738 | Tys[1] = MVT::Other; |
| 4739 | } else { |
| 4740 | SDOperand Copy1 = DAG.getCopyFromReg(rd, X86::EAX, MVT::i32, rd.getValue(1)); |
| 4741 | SDOperand Copy2 = DAG.getCopyFromReg(Copy1.getValue(1), X86::EDX, |
| 4742 | MVT::i32, Copy1.getValue(2)); |
| 4743 | Ops.push_back(Copy1); |
| 4744 | Ops.push_back(Copy2); |
| 4745 | Ops.push_back(Copy2.getValue(1)); |
| 4746 | Tys[0] = Tys[1] = MVT::i32; |
| 4747 | Tys.push_back(MVT::Other); |
| 4748 | } |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 4749 | return DAG.getNode(ISD::MERGE_VALUES, Tys, &Ops[0], Ops.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4750 | } |
| 4751 | |
| 4752 | SDOperand X86TargetLowering::LowerVASTART(SDOperand Op, SelectionDAG &DAG) { |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4753 | SrcValueSDNode *SV = cast<SrcValueSDNode>(Op.getOperand(2)); |
| 4754 | |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4755 | if (!Subtarget->is64Bit()) { |
| 4756 | // vastart just stores the address of the VarArgsFrameIndex slot into the |
| 4757 | // memory location argument. |
| 4758 | SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy()); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4759 | return DAG.getStore(Op.getOperand(0), FR,Op.getOperand(1), SV->getValue(), |
| 4760 | SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4761 | } |
| 4762 | |
| 4763 | // __va_list_tag: |
| 4764 | // gp_offset (0 - 6 * 8) |
| 4765 | // fp_offset (48 - 48 + 8 * 16) |
| 4766 | // overflow_arg_area (point to parameters coming in memory). |
| 4767 | // reg_save_area |
| 4768 | std::vector<SDOperand> MemOps; |
| 4769 | SDOperand FIN = Op.getOperand(1); |
| 4770 | // Store gp_offset |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4771 | SDOperand Store = DAG.getStore(Op.getOperand(0), |
| 4772 | DAG.getConstant(VarArgsGPOffset, MVT::i32), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4773 | FIN, SV->getValue(), SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4774 | MemOps.push_back(Store); |
| 4775 | |
| 4776 | // Store fp_offset |
| 4777 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 4778 | DAG.getConstant(4, getPointerTy())); |
Evan Cheng | 786225a | 2006-10-05 23:01:46 +0000 | [diff] [blame] | 4779 | Store = DAG.getStore(Op.getOperand(0), |
| 4780 | DAG.getConstant(VarArgsFPOffset, MVT::i32), |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4781 | FIN, SV->getValue(), SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4782 | MemOps.push_back(Store); |
| 4783 | |
| 4784 | // Store ptr to overflow_arg_area |
| 4785 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 4786 | DAG.getConstant(4, getPointerTy())); |
| 4787 | SDOperand OVFIN = DAG.getFrameIndex(VarArgsFrameIndex, getPointerTy()); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4788 | Store = DAG.getStore(Op.getOperand(0), OVFIN, FIN, SV->getValue(), |
| 4789 | SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4790 | MemOps.push_back(Store); |
| 4791 | |
| 4792 | // Store ptr to reg_save_area. |
| 4793 | FIN = DAG.getNode(ISD::ADD, getPointerTy(), FIN, |
| 4794 | DAG.getConstant(8, getPointerTy())); |
| 4795 | SDOperand RSFIN = DAG.getFrameIndex(RegSaveFrameIndex, getPointerTy()); |
Evan Cheng | 8b2794a | 2006-10-13 21:14:26 +0000 | [diff] [blame] | 4796 | Store = DAG.getStore(Op.getOperand(0), RSFIN, FIN, SV->getValue(), |
| 4797 | SV->getOffset()); |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 4798 | MemOps.push_back(Store); |
| 4799 | return DAG.getNode(ISD::TokenFactor, MVT::Other, &MemOps[0], MemOps.size()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4800 | } |
| 4801 | |
| 4802 | SDOperand |
| 4803 | X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDOperand Op, SelectionDAG &DAG) { |
| 4804 | unsigned IntNo = cast<ConstantSDNode>(Op.getOperand(0))->getValue(); |
| 4805 | switch (IntNo) { |
| 4806 | default: return SDOperand(); // Don't custom lower most intrinsics. |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4807 | // Comparison intrinsics. |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4808 | case Intrinsic::x86_sse_comieq_ss: |
| 4809 | case Intrinsic::x86_sse_comilt_ss: |
| 4810 | case Intrinsic::x86_sse_comile_ss: |
| 4811 | case Intrinsic::x86_sse_comigt_ss: |
| 4812 | case Intrinsic::x86_sse_comige_ss: |
| 4813 | case Intrinsic::x86_sse_comineq_ss: |
| 4814 | case Intrinsic::x86_sse_ucomieq_ss: |
| 4815 | case Intrinsic::x86_sse_ucomilt_ss: |
| 4816 | case Intrinsic::x86_sse_ucomile_ss: |
| 4817 | case Intrinsic::x86_sse_ucomigt_ss: |
| 4818 | case Intrinsic::x86_sse_ucomige_ss: |
| 4819 | case Intrinsic::x86_sse_ucomineq_ss: |
| 4820 | case Intrinsic::x86_sse2_comieq_sd: |
| 4821 | case Intrinsic::x86_sse2_comilt_sd: |
| 4822 | case Intrinsic::x86_sse2_comile_sd: |
| 4823 | case Intrinsic::x86_sse2_comigt_sd: |
| 4824 | case Intrinsic::x86_sse2_comige_sd: |
| 4825 | case Intrinsic::x86_sse2_comineq_sd: |
| 4826 | case Intrinsic::x86_sse2_ucomieq_sd: |
| 4827 | case Intrinsic::x86_sse2_ucomilt_sd: |
| 4828 | case Intrinsic::x86_sse2_ucomile_sd: |
| 4829 | case Intrinsic::x86_sse2_ucomigt_sd: |
| 4830 | case Intrinsic::x86_sse2_ucomige_sd: |
| 4831 | case Intrinsic::x86_sse2_ucomineq_sd: { |
| 4832 | unsigned Opc = 0; |
| 4833 | ISD::CondCode CC = ISD::SETCC_INVALID; |
| 4834 | switch (IntNo) { |
| 4835 | default: break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 4836 | case Intrinsic::x86_sse_comieq_ss: |
| 4837 | case Intrinsic::x86_sse2_comieq_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4838 | Opc = X86ISD::COMI; |
| 4839 | CC = ISD::SETEQ; |
| 4840 | break; |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4841 | case Intrinsic::x86_sse_comilt_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4842 | case Intrinsic::x86_sse2_comilt_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4843 | Opc = X86ISD::COMI; |
| 4844 | CC = ISD::SETLT; |
| 4845 | break; |
| 4846 | case Intrinsic::x86_sse_comile_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4847 | case Intrinsic::x86_sse2_comile_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4848 | Opc = X86ISD::COMI; |
| 4849 | CC = ISD::SETLE; |
| 4850 | break; |
| 4851 | case Intrinsic::x86_sse_comigt_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4852 | case Intrinsic::x86_sse2_comigt_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4853 | Opc = X86ISD::COMI; |
| 4854 | CC = ISD::SETGT; |
| 4855 | break; |
| 4856 | case Intrinsic::x86_sse_comige_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4857 | case Intrinsic::x86_sse2_comige_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4858 | Opc = X86ISD::COMI; |
| 4859 | CC = ISD::SETGE; |
| 4860 | break; |
| 4861 | case Intrinsic::x86_sse_comineq_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4862 | case Intrinsic::x86_sse2_comineq_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4863 | Opc = X86ISD::COMI; |
| 4864 | CC = ISD::SETNE; |
| 4865 | break; |
| 4866 | case Intrinsic::x86_sse_ucomieq_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4867 | case Intrinsic::x86_sse2_ucomieq_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4868 | Opc = X86ISD::UCOMI; |
| 4869 | CC = ISD::SETEQ; |
| 4870 | break; |
| 4871 | case Intrinsic::x86_sse_ucomilt_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4872 | case Intrinsic::x86_sse2_ucomilt_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4873 | Opc = X86ISD::UCOMI; |
| 4874 | CC = ISD::SETLT; |
| 4875 | break; |
| 4876 | case Intrinsic::x86_sse_ucomile_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4877 | case Intrinsic::x86_sse2_ucomile_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4878 | Opc = X86ISD::UCOMI; |
| 4879 | CC = ISD::SETLE; |
| 4880 | break; |
| 4881 | case Intrinsic::x86_sse_ucomigt_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4882 | case Intrinsic::x86_sse2_ucomigt_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4883 | Opc = X86ISD::UCOMI; |
| 4884 | CC = ISD::SETGT; |
| 4885 | break; |
| 4886 | case Intrinsic::x86_sse_ucomige_ss: |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4887 | case Intrinsic::x86_sse2_ucomige_sd: |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4888 | Opc = X86ISD::UCOMI; |
| 4889 | CC = ISD::SETGE; |
| 4890 | break; |
| 4891 | case Intrinsic::x86_sse_ucomineq_ss: |
| 4892 | case Intrinsic::x86_sse2_ucomineq_sd: |
| 4893 | Opc = X86ISD::UCOMI; |
| 4894 | CC = ISD::SETNE; |
| 4895 | break; |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4896 | } |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4897 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4898 | unsigned X86CC; |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 4899 | SDOperand LHS = Op.getOperand(1); |
| 4900 | SDOperand RHS = Op.getOperand(2); |
| 4901 | translateX86CC(CC, true, X86CC, LHS, RHS, DAG); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4902 | |
| 4903 | const MVT::ValueType *VTs = DAG.getNodeValueTypes(MVT::Other, MVT::Flag); |
Chris Lattner | f957051 | 2006-09-13 03:22:10 +0000 | [diff] [blame] | 4904 | SDOperand Ops1[] = { DAG.getEntryNode(), LHS, RHS }; |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4905 | SDOperand Cond = DAG.getNode(Opc, VTs, 2, Ops1, 3); |
| 4906 | VTs = DAG.getNodeValueTypes(MVT::i8, MVT::Flag); |
| 4907 | SDOperand Ops2[] = { DAG.getConstant(X86CC, MVT::i8), Cond }; |
| 4908 | SDOperand SetCC = DAG.getNode(X86ISD::SETCC, VTs, 2, Ops2, 2); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4909 | return DAG.getNode(ISD::ANY_EXTEND, MVT::i32, SetCC); |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4910 | } |
Evan Cheng | 38bcbaf | 2005-12-23 07:31:11 +0000 | [diff] [blame] | 4911 | } |
Chris Lattner | dbdbf0c | 2005-11-15 00:40:23 +0000 | [diff] [blame] | 4912 | } |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4913 | |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4914 | /// LowerOperation - Provide custom lowering hooks for some operations. |
| 4915 | /// |
| 4916 | SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { |
| 4917 | switch (Op.getOpcode()) { |
| 4918 | default: assert(0 && "Should not custom lower this!"); |
| 4919 | case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG); |
| 4920 | case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); |
| 4921 | case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG); |
| 4922 | case ISD::INSERT_VECTOR_ELT: return LowerINSERT_VECTOR_ELT(Op, DAG); |
| 4923 | case ISD::SCALAR_TO_VECTOR: return LowerSCALAR_TO_VECTOR(Op, DAG); |
| 4924 | case ISD::ConstantPool: return LowerConstantPool(Op, DAG); |
| 4925 | case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); |
| 4926 | case ISD::ExternalSymbol: return LowerExternalSymbol(Op, DAG); |
| 4927 | case ISD::SHL_PARTS: |
| 4928 | case ISD::SRA_PARTS: |
| 4929 | case ISD::SRL_PARTS: return LowerShift(Op, DAG); |
| 4930 | case ISD::SINT_TO_FP: return LowerSINT_TO_FP(Op, DAG); |
| 4931 | case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG); |
| 4932 | case ISD::FABS: return LowerFABS(Op, DAG); |
| 4933 | case ISD::FNEG: return LowerFNEG(Op, DAG); |
Evan Cheng | 734503b | 2006-09-11 02:19:56 +0000 | [diff] [blame] | 4934 | case ISD::SETCC: return LowerSETCC(Op, DAG, DAG.getEntryNode()); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4935 | case ISD::SELECT: return LowerSELECT(Op, DAG); |
| 4936 | case ISD::BRCOND: return LowerBRCOND(Op, DAG); |
| 4937 | case ISD::JumpTable: return LowerJumpTable(Op, DAG); |
Evan Cheng | 32fe103 | 2006-05-25 00:59:30 +0000 | [diff] [blame] | 4938 | case ISD::CALL: return LowerCALL(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4939 | case ISD::RET: return LowerRET(Op, DAG); |
Evan Cheng | 1bc7804 | 2006-04-26 01:20:17 +0000 | [diff] [blame] | 4940 | case ISD::FORMAL_ARGUMENTS: return LowerFORMAL_ARGUMENTS(Op, DAG); |
Evan Cheng | 0db9fe6 | 2006-04-25 20:13:52 +0000 | [diff] [blame] | 4941 | case ISD::MEMSET: return LowerMEMSET(Op, DAG); |
| 4942 | case ISD::MEMCPY: return LowerMEMCPY(Op, DAG); |
| 4943 | case ISD::READCYCLECOUNTER: return LowerREADCYCLCECOUNTER(Op, DAG); |
| 4944 | case ISD::VASTART: return LowerVASTART(Op, DAG); |
| 4945 | case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); |
| 4946 | } |
| 4947 | } |
| 4948 | |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4949 | const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const { |
| 4950 | switch (Opcode) { |
| 4951 | default: return NULL; |
Evan Cheng | e341316 | 2006-01-09 18:33:28 +0000 | [diff] [blame] | 4952 | case X86ISD::SHLD: return "X86ISD::SHLD"; |
| 4953 | case X86ISD::SHRD: return "X86ISD::SHRD"; |
Evan Cheng | ef6ffb1 | 2006-01-31 03:14:29 +0000 | [diff] [blame] | 4954 | case X86ISD::FAND: return "X86ISD::FAND"; |
Evan Cheng | 223547a | 2006-01-31 22:28:30 +0000 | [diff] [blame] | 4955 | case X86ISD::FXOR: return "X86ISD::FXOR"; |
Evan Cheng | a3195e8 | 2006-01-12 22:54:21 +0000 | [diff] [blame] | 4956 | case X86ISD::FILD: return "X86ISD::FILD"; |
Evan Cheng | e3de85b | 2006-02-04 02:20:30 +0000 | [diff] [blame] | 4957 | case X86ISD::FILD_FLAG: return "X86ISD::FILD_FLAG"; |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4958 | case X86ISD::FP_TO_INT16_IN_MEM: return "X86ISD::FP_TO_INT16_IN_MEM"; |
| 4959 | case X86ISD::FP_TO_INT32_IN_MEM: return "X86ISD::FP_TO_INT32_IN_MEM"; |
| 4960 | case X86ISD::FP_TO_INT64_IN_MEM: return "X86ISD::FP_TO_INT64_IN_MEM"; |
Evan Cheng | b077b84 | 2005-12-21 02:39:21 +0000 | [diff] [blame] | 4961 | case X86ISD::FLD: return "X86ISD::FLD"; |
Evan Cheng | d90eb7f | 2006-01-05 00:27:02 +0000 | [diff] [blame] | 4962 | case X86ISD::FST: return "X86ISD::FST"; |
| 4963 | case X86ISD::FP_GET_RESULT: return "X86ISD::FP_GET_RESULT"; |
Evan Cheng | b077b84 | 2005-12-21 02:39:21 +0000 | [diff] [blame] | 4964 | case X86ISD::FP_SET_RESULT: return "X86ISD::FP_SET_RESULT"; |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4965 | case X86ISD::CALL: return "X86ISD::CALL"; |
| 4966 | case X86ISD::TAILCALL: return "X86ISD::TAILCALL"; |
| 4967 | case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG"; |
| 4968 | case X86ISD::CMP: return "X86ISD::CMP"; |
Evan Cheng | 6be2c58 | 2006-04-05 23:38:46 +0000 | [diff] [blame] | 4969 | case X86ISD::COMI: return "X86ISD::COMI"; |
| 4970 | case X86ISD::UCOMI: return "X86ISD::UCOMI"; |
Evan Cheng | d5781fc | 2005-12-21 20:21:51 +0000 | [diff] [blame] | 4971 | case X86ISD::SETCC: return "X86ISD::SETCC"; |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4972 | case X86ISD::CMOV: return "X86ISD::CMOV"; |
| 4973 | case X86ISD::BRCOND: return "X86ISD::BRCOND"; |
Evan Cheng | b077b84 | 2005-12-21 02:39:21 +0000 | [diff] [blame] | 4974 | case X86ISD::RET_FLAG: return "X86ISD::RET_FLAG"; |
Evan Cheng | 8df346b | 2006-03-04 01:12:00 +0000 | [diff] [blame] | 4975 | case X86ISD::REP_STOS: return "X86ISD::REP_STOS"; |
| 4976 | case X86ISD::REP_MOVS: return "X86ISD::REP_MOVS"; |
Evan Cheng | 223547a | 2006-01-31 22:28:30 +0000 | [diff] [blame] | 4977 | case X86ISD::LOAD_PACK: return "X86ISD::LOAD_PACK"; |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 4978 | case X86ISD::LOAD_UA: return "X86ISD::LOAD_UA"; |
Evan Cheng | 7ccced6 | 2006-02-18 00:15:05 +0000 | [diff] [blame] | 4979 | case X86ISD::GlobalBaseReg: return "X86ISD::GlobalBaseReg"; |
Evan Cheng | 020d2e8 | 2006-02-23 20:41:18 +0000 | [diff] [blame] | 4980 | case X86ISD::Wrapper: return "X86ISD::Wrapper"; |
Evan Cheng | bc4832b | 2006-03-24 23:15:12 +0000 | [diff] [blame] | 4981 | case X86ISD::S2VEC: return "X86ISD::S2VEC"; |
Evan Cheng | b067a1e | 2006-03-31 19:22:53 +0000 | [diff] [blame] | 4982 | case X86ISD::PEXTRW: return "X86ISD::PEXTRW"; |
Evan Cheng | 653159f | 2006-03-31 21:55:24 +0000 | [diff] [blame] | 4983 | case X86ISD::PINSRW: return "X86ISD::PINSRW"; |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 4984 | case X86ISD::FMAX: return "X86ISD::FMAX"; |
| 4985 | case X86ISD::FMIN: return "X86ISD::FMIN"; |
Evan Cheng | 7226158 | 2005-12-20 06:22:03 +0000 | [diff] [blame] | 4986 | } |
| 4987 | } |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 4988 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 4989 | /// isLegalAddressImmediate - Return true if the integer value or |
| 4990 | /// GlobalValue can be used as the offset of the target addressing mode. |
| 4991 | bool X86TargetLowering::isLegalAddressImmediate(int64_t V) const { |
| 4992 | // X86 allows a sign-extended 32-bit immediate field. |
| 4993 | return (V > -(1LL << 32) && V < (1LL << 32)-1); |
| 4994 | } |
| 4995 | |
| 4996 | bool X86TargetLowering::isLegalAddressImmediate(GlobalValue *GV) const { |
Evan Cheng | c8306bd | 2006-11-29 23:48:14 +0000 | [diff] [blame^] | 4997 | // In 64-bit mode, GV is 64-bit so it won't fit in the 32-bit displacement |
| 4998 | // field unless we are in small code model. |
| 4999 | if (Subtarget->is64Bit() && |
| 5000 | getTargetMachine().getCodeModel() != CodeModel::Small) |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5001 | return false; |
Evan Cheng | c8306bd | 2006-11-29 23:48:14 +0000 | [diff] [blame^] | 5002 | Reloc::Model RModel = getTargetMachine().getRelocationModel(); |
| 5003 | return (RModel == Reloc::Static) || |
| 5004 | !Subtarget->GVRequiresExtraLoad(GV, false); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5005 | } |
| 5006 | |
| 5007 | /// isShuffleMaskLegal - Targets can use this to indicate that they only |
| 5008 | /// support *some* VECTOR_SHUFFLE operations, those with specific masks. |
| 5009 | /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values |
| 5010 | /// are assumed to be legal. |
| 5011 | bool |
| 5012 | X86TargetLowering::isShuffleMaskLegal(SDOperand Mask, MVT::ValueType VT) const { |
| 5013 | // Only do shuffles on 128-bit vector types for now. |
| 5014 | if (MVT::getSizeInBits(VT) == 64) return false; |
| 5015 | return (Mask.Val->getNumOperands() <= 4 || |
| 5016 | isSplatMask(Mask.Val) || |
| 5017 | isPSHUFHW_PSHUFLWMask(Mask.Val) || |
| 5018 | X86::isUNPCKLMask(Mask.Val) || |
| 5019 | X86::isUNPCKL_v_undef_Mask(Mask.Val) || |
| 5020 | X86::isUNPCKHMask(Mask.Val)); |
| 5021 | } |
| 5022 | |
| 5023 | bool X86TargetLowering::isVectorClearMaskLegal(std::vector<SDOperand> &BVOps, |
| 5024 | MVT::ValueType EVT, |
| 5025 | SelectionDAG &DAG) const { |
| 5026 | unsigned NumElts = BVOps.size(); |
| 5027 | // Only do shuffles on 128-bit vector types for now. |
| 5028 | if (MVT::getSizeInBits(EVT) * NumElts == 64) return false; |
| 5029 | if (NumElts == 2) return true; |
| 5030 | if (NumElts == 4) { |
| 5031 | return (isMOVLMask(BVOps) || isCommutedMOVL(BVOps, true) || |
| 5032 | isSHUFPMask(BVOps) || isCommutedSHUFP(BVOps)); |
| 5033 | } |
| 5034 | return false; |
| 5035 | } |
| 5036 | |
| 5037 | //===----------------------------------------------------------------------===// |
| 5038 | // X86 Scheduler Hooks |
| 5039 | //===----------------------------------------------------------------------===// |
| 5040 | |
| 5041 | MachineBasicBlock * |
| 5042 | X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI, |
| 5043 | MachineBasicBlock *BB) { |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5044 | const TargetInstrInfo *TII = getTargetMachine().getInstrInfo(); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5045 | switch (MI->getOpcode()) { |
| 5046 | default: assert(false && "Unexpected instr type to insert"); |
| 5047 | case X86::CMOV_FR32: |
| 5048 | case X86::CMOV_FR64: |
| 5049 | case X86::CMOV_V4F32: |
| 5050 | case X86::CMOV_V2F64: |
| 5051 | case X86::CMOV_V2I64: { |
| 5052 | // To "insert" a SELECT_CC instruction, we actually have to insert the |
| 5053 | // diamond control-flow pattern. The incoming instruction knows the |
| 5054 | // destination vreg to set, the condition code register to branch on, the |
| 5055 | // true/false values to select between, and a branch opcode to use. |
| 5056 | const BasicBlock *LLVM_BB = BB->getBasicBlock(); |
| 5057 | ilist<MachineBasicBlock>::iterator It = BB; |
| 5058 | ++It; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5059 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5060 | // thisMBB: |
| 5061 | // ... |
| 5062 | // TrueVal = ... |
| 5063 | // cmpTY ccX, r1, r2 |
| 5064 | // bCC copy1MBB |
| 5065 | // fallthrough --> copy0MBB |
| 5066 | MachineBasicBlock *thisMBB = BB; |
| 5067 | MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB); |
| 5068 | MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5069 | unsigned Opc = |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 5070 | X86::GetCondBranchFromCond((X86::CondCode)MI->getOperand(3).getImm()); |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5071 | BuildMI(BB, TII->get(Opc)).addMBB(sinkMBB); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5072 | MachineFunction *F = BB->getParent(); |
| 5073 | F->getBasicBlockList().insert(It, copy0MBB); |
| 5074 | F->getBasicBlockList().insert(It, sinkMBB); |
| 5075 | // Update machine-CFG edges by first adding all successors of the current |
| 5076 | // block to the new block which will contain the Phi node for the select. |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5077 | for(MachineBasicBlock::succ_iterator i = BB->succ_begin(), |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5078 | e = BB->succ_end(); i != e; ++i) |
| 5079 | sinkMBB->addSuccessor(*i); |
| 5080 | // Next, remove all successors of the current block, and add the true |
| 5081 | // and fallthrough blocks as its successors. |
| 5082 | while(!BB->succ_empty()) |
| 5083 | BB->removeSuccessor(BB->succ_begin()); |
| 5084 | BB->addSuccessor(copy0MBB); |
| 5085 | BB->addSuccessor(sinkMBB); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5086 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5087 | // copy0MBB: |
| 5088 | // %FalseValue = ... |
| 5089 | // # fallthrough to sinkMBB |
| 5090 | BB = copy0MBB; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5091 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5092 | // Update machine-CFG edges |
| 5093 | BB->addSuccessor(sinkMBB); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5094 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5095 | // sinkMBB: |
| 5096 | // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ] |
| 5097 | // ... |
| 5098 | BB = sinkMBB; |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5099 | BuildMI(BB, TII->get(X86::PHI), MI->getOperand(0).getReg()) |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5100 | .addReg(MI->getOperand(1).getReg()).addMBB(copy0MBB) |
| 5101 | .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB); |
| 5102 | |
| 5103 | delete MI; // The pseudo instruction is gone now. |
| 5104 | return BB; |
| 5105 | } |
| 5106 | |
| 5107 | case X86::FP_TO_INT16_IN_MEM: |
| 5108 | case X86::FP_TO_INT32_IN_MEM: |
| 5109 | case X86::FP_TO_INT64_IN_MEM: { |
| 5110 | // Change the floating point control register to use "round towards zero" |
| 5111 | // mode when truncating to an integer value. |
| 5112 | MachineFunction *F = BB->getParent(); |
| 5113 | int CWFrameIdx = F->getFrameInfo()->CreateStackObject(2, 2); |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5114 | addFrameReference(BuildMI(BB, TII->get(X86::FNSTCW16m)), CWFrameIdx); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5115 | |
| 5116 | // Load the old value of the high byte of the control word... |
| 5117 | unsigned OldCW = |
| 5118 | F->getSSARegMap()->createVirtualRegister(X86::GR16RegisterClass); |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5119 | addFrameReference(BuildMI(BB, TII->get(X86::MOV16rm), OldCW), CWFrameIdx); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5120 | |
| 5121 | // Set the high part to be round to zero... |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5122 | addFrameReference(BuildMI(BB, TII->get(X86::MOV16mi)), CWFrameIdx) |
| 5123 | .addImm(0xC7F); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5124 | |
| 5125 | // Reload the modified control word now... |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5126 | addFrameReference(BuildMI(BB, TII->get(X86::FLDCW16m)), CWFrameIdx); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5127 | |
| 5128 | // Restore the memory image of control word to original value |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5129 | addFrameReference(BuildMI(BB, TII->get(X86::MOV16mr)), CWFrameIdx) |
| 5130 | .addReg(OldCW); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5131 | |
| 5132 | // Get the X86 opcode to use. |
| 5133 | unsigned Opc; |
| 5134 | switch (MI->getOpcode()) { |
| 5135 | default: assert(0 && "illegal opcode!"); |
| 5136 | case X86::FP_TO_INT16_IN_MEM: Opc = X86::FpIST16m; break; |
| 5137 | case X86::FP_TO_INT32_IN_MEM: Opc = X86::FpIST32m; break; |
| 5138 | case X86::FP_TO_INT64_IN_MEM: Opc = X86::FpIST64m; break; |
| 5139 | } |
| 5140 | |
| 5141 | X86AddressMode AM; |
| 5142 | MachineOperand &Op = MI->getOperand(0); |
| 5143 | if (Op.isRegister()) { |
| 5144 | AM.BaseType = X86AddressMode::RegBase; |
| 5145 | AM.Base.Reg = Op.getReg(); |
| 5146 | } else { |
| 5147 | AM.BaseType = X86AddressMode::FrameIndexBase; |
| 5148 | AM.Base.FrameIndex = Op.getFrameIndex(); |
| 5149 | } |
| 5150 | Op = MI->getOperand(1); |
| 5151 | if (Op.isImmediate()) |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 5152 | AM.Scale = Op.getImm(); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5153 | Op = MI->getOperand(2); |
| 5154 | if (Op.isImmediate()) |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 5155 | AM.IndexReg = Op.getImm(); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5156 | Op = MI->getOperand(3); |
| 5157 | if (Op.isGlobalAddress()) { |
| 5158 | AM.GV = Op.getGlobal(); |
| 5159 | } else { |
Chris Lattner | 7fbe972 | 2006-10-20 17:42:20 +0000 | [diff] [blame] | 5160 | AM.Disp = Op.getImm(); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5161 | } |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5162 | addFullAddress(BuildMI(BB, TII->get(Opc)), AM) |
| 5163 | .addReg(MI->getOperand(4).getReg()); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5164 | |
| 5165 | // Reload the original control word now. |
Evan Cheng | c0f64ff | 2006-11-27 23:37:22 +0000 | [diff] [blame] | 5166 | addFrameReference(BuildMI(BB, TII->get(X86::FLDCW16m)), CWFrameIdx); |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5167 | |
| 5168 | delete MI; // The pseudo instruction is gone now. |
| 5169 | return BB; |
| 5170 | } |
| 5171 | } |
| 5172 | } |
| 5173 | |
| 5174 | //===----------------------------------------------------------------------===// |
| 5175 | // X86 Optimization Hooks |
| 5176 | //===----------------------------------------------------------------------===// |
| 5177 | |
Nate Begeman | 368e18d | 2006-02-16 21:11:51 +0000 | [diff] [blame] | 5178 | void X86TargetLowering::computeMaskedBitsForTargetNode(const SDOperand Op, |
| 5179 | uint64_t Mask, |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5180 | uint64_t &KnownZero, |
Nate Begeman | 368e18d | 2006-02-16 21:11:51 +0000 | [diff] [blame] | 5181 | uint64_t &KnownOne, |
| 5182 | unsigned Depth) const { |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 5183 | unsigned Opc = Op.getOpcode(); |
Evan Cheng | 865f060 | 2006-04-05 06:11:20 +0000 | [diff] [blame] | 5184 | assert((Opc >= ISD::BUILTIN_OP_END || |
| 5185 | Opc == ISD::INTRINSIC_WO_CHAIN || |
| 5186 | Opc == ISD::INTRINSIC_W_CHAIN || |
| 5187 | Opc == ISD::INTRINSIC_VOID) && |
| 5188 | "Should use MaskedValueIsZero if you don't know whether Op" |
| 5189 | " is a target node!"); |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 5190 | |
Evan Cheng | 865f060 | 2006-04-05 06:11:20 +0000 | [diff] [blame] | 5191 | KnownZero = KnownOne = 0; // Don't know anything. |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 5192 | switch (Opc) { |
Evan Cheng | 865f060 | 2006-04-05 06:11:20 +0000 | [diff] [blame] | 5193 | default: break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5194 | case X86ISD::SETCC: |
Nate Begeman | 368e18d | 2006-02-16 21:11:51 +0000 | [diff] [blame] | 5195 | KnownZero |= (MVT::getIntVTBitMask(Op.getValueType()) ^ 1ULL); |
| 5196 | break; |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 5197 | } |
Evan Cheng | 3a03ebb | 2005-12-21 23:05:39 +0000 | [diff] [blame] | 5198 | } |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 5199 | |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5200 | /// getShuffleScalarElt - Returns the scalar element that will make up the ith |
| 5201 | /// element of the result of the vector shuffle. |
| 5202 | static SDOperand getShuffleScalarElt(SDNode *N, unsigned i, SelectionDAG &DAG) { |
| 5203 | MVT::ValueType VT = N->getValueType(0); |
| 5204 | SDOperand PermMask = N->getOperand(2); |
| 5205 | unsigned NumElems = PermMask.getNumOperands(); |
| 5206 | SDOperand V = (i < NumElems) ? N->getOperand(0) : N->getOperand(1); |
| 5207 | i %= NumElems; |
| 5208 | if (V.getOpcode() == ISD::SCALAR_TO_VECTOR) { |
| 5209 | return (i == 0) |
| 5210 | ? V.getOperand(0) : DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(VT)); |
| 5211 | } else if (V.getOpcode() == ISD::VECTOR_SHUFFLE) { |
| 5212 | SDOperand Idx = PermMask.getOperand(i); |
| 5213 | if (Idx.getOpcode() == ISD::UNDEF) |
| 5214 | return DAG.getNode(ISD::UNDEF, MVT::getVectorBaseType(VT)); |
| 5215 | return getShuffleScalarElt(V.Val,cast<ConstantSDNode>(Idx)->getValue(),DAG); |
| 5216 | } |
| 5217 | return SDOperand(); |
| 5218 | } |
| 5219 | |
| 5220 | /// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the |
| 5221 | /// node is a GlobalAddress + an offset. |
| 5222 | static bool isGAPlusOffset(SDNode *N, GlobalValue* &GA, int64_t &Offset) { |
| 5223 | if (N->getOpcode() == X86ISD::Wrapper) { |
| 5224 | if (dyn_cast<GlobalAddressSDNode>(N->getOperand(0))) { |
| 5225 | GA = cast<GlobalAddressSDNode>(N->getOperand(0))->getGlobal(); |
| 5226 | return true; |
| 5227 | } |
| 5228 | } else if (N->getOpcode() == ISD::ADD) { |
| 5229 | SDOperand N1 = N->getOperand(0); |
| 5230 | SDOperand N2 = N->getOperand(1); |
| 5231 | if (isGAPlusOffset(N1.Val, GA, Offset)) { |
| 5232 | ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2); |
| 5233 | if (V) { |
| 5234 | Offset += V->getSignExtended(); |
| 5235 | return true; |
| 5236 | } |
| 5237 | } else if (isGAPlusOffset(N2.Val, GA, Offset)) { |
| 5238 | ConstantSDNode *V = dyn_cast<ConstantSDNode>(N1); |
| 5239 | if (V) { |
| 5240 | Offset += V->getSignExtended(); |
| 5241 | return true; |
| 5242 | } |
| 5243 | } |
| 5244 | } |
| 5245 | return false; |
| 5246 | } |
| 5247 | |
| 5248 | /// isConsecutiveLoad - Returns true if N is loading from an address of Base |
| 5249 | /// + Dist * Size. |
| 5250 | static bool isConsecutiveLoad(SDNode *N, SDNode *Base, int Dist, int Size, |
| 5251 | MachineFrameInfo *MFI) { |
| 5252 | if (N->getOperand(0).Val != Base->getOperand(0).Val) |
| 5253 | return false; |
| 5254 | |
| 5255 | SDOperand Loc = N->getOperand(1); |
| 5256 | SDOperand BaseLoc = Base->getOperand(1); |
| 5257 | if (Loc.getOpcode() == ISD::FrameIndex) { |
| 5258 | if (BaseLoc.getOpcode() != ISD::FrameIndex) |
| 5259 | return false; |
| 5260 | int FI = dyn_cast<FrameIndexSDNode>(Loc)->getIndex(); |
| 5261 | int BFI = dyn_cast<FrameIndexSDNode>(BaseLoc)->getIndex(); |
| 5262 | int FS = MFI->getObjectSize(FI); |
| 5263 | int BFS = MFI->getObjectSize(BFI); |
| 5264 | if (FS != BFS || FS != Size) return false; |
| 5265 | return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Size); |
| 5266 | } else { |
| 5267 | GlobalValue *GV1 = NULL; |
| 5268 | GlobalValue *GV2 = NULL; |
| 5269 | int64_t Offset1 = 0; |
| 5270 | int64_t Offset2 = 0; |
| 5271 | bool isGA1 = isGAPlusOffset(Loc.Val, GV1, Offset1); |
| 5272 | bool isGA2 = isGAPlusOffset(BaseLoc.Val, GV2, Offset2); |
| 5273 | if (isGA1 && isGA2 && GV1 == GV2) |
| 5274 | return Offset1 == (Offset2 + Dist*Size); |
| 5275 | } |
| 5276 | |
| 5277 | return false; |
| 5278 | } |
| 5279 | |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 5280 | static bool isBaseAlignment16(SDNode *Base, MachineFrameInfo *MFI, |
| 5281 | const X86Subtarget *Subtarget) { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5282 | GlobalValue *GV; |
| 5283 | int64_t Offset; |
| 5284 | if (isGAPlusOffset(Base, GV, Offset)) |
| 5285 | return (GV->getAlignment() >= 16 && (Offset % 16) == 0); |
| 5286 | else { |
| 5287 | assert(Base->getOpcode() == ISD::FrameIndex && "Unexpected base node!"); |
| 5288 | int BFI = dyn_cast<FrameIndexSDNode>(Base)->getIndex(); |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 5289 | if (BFI < 0) |
| 5290 | // Fixed objects do not specify alignment, however the offsets are known. |
| 5291 | return ((Subtarget->getStackAlignment() % 16) == 0 && |
| 5292 | (MFI->getObjectOffset(BFI) % 16) == 0); |
| 5293 | else |
| 5294 | return MFI->getObjectAlignment(BFI) >= 16; |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5295 | } |
| 5296 | return false; |
| 5297 | } |
| 5298 | |
| 5299 | |
| 5300 | /// PerformShuffleCombine - Combine a vector_shuffle that is equal to |
| 5301 | /// build_vector load1, load2, load3, load4, <0, 1, 2, 3> into a 128-bit load |
| 5302 | /// if the load addresses are consecutive, non-overlapping, and in the right |
| 5303 | /// order. |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 5304 | static SDOperand PerformShuffleCombine(SDNode *N, SelectionDAG &DAG, |
| 5305 | const X86Subtarget *Subtarget) { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5306 | MachineFunction &MF = DAG.getMachineFunction(); |
| 5307 | MachineFrameInfo *MFI = MF.getFrameInfo(); |
| 5308 | MVT::ValueType VT = N->getValueType(0); |
| 5309 | MVT::ValueType EVT = MVT::getVectorBaseType(VT); |
| 5310 | SDOperand PermMask = N->getOperand(2); |
| 5311 | int NumElems = (int)PermMask.getNumOperands(); |
| 5312 | SDNode *Base = NULL; |
| 5313 | for (int i = 0; i < NumElems; ++i) { |
| 5314 | SDOperand Idx = PermMask.getOperand(i); |
| 5315 | if (Idx.getOpcode() == ISD::UNDEF) { |
| 5316 | if (!Base) return SDOperand(); |
| 5317 | } else { |
| 5318 | SDOperand Arg = |
| 5319 | getShuffleScalarElt(N, cast<ConstantSDNode>(Idx)->getValue(), DAG); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 5320 | if (!Arg.Val || !ISD::isNON_EXTLoad(Arg.Val)) |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5321 | return SDOperand(); |
| 5322 | if (!Base) |
| 5323 | Base = Arg.Val; |
| 5324 | else if (!isConsecutiveLoad(Arg.Val, Base, |
| 5325 | i, MVT::getSizeInBits(EVT)/8,MFI)) |
| 5326 | return SDOperand(); |
| 5327 | } |
| 5328 | } |
| 5329 | |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 5330 | bool isAlign16 = isBaseAlignment16(Base->getOperand(1).Val, MFI, Subtarget); |
Evan Cheng | 466685d | 2006-10-09 20:57:25 +0000 | [diff] [blame] | 5331 | if (isAlign16) { |
| 5332 | LoadSDNode *LD = cast<LoadSDNode>(Base); |
| 5333 | return DAG.getLoad(VT, LD->getChain(), LD->getBasePtr(), LD->getSrcValue(), |
| 5334 | LD->getSrcValueOffset()); |
| 5335 | } else { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5336 | // Just use movups, it's shorter. |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 5337 | std::vector<MVT::ValueType> Tys; |
| 5338 | Tys.push_back(MVT::v4f32); |
| 5339 | Tys.push_back(MVT::Other); |
| 5340 | SmallVector<SDOperand, 3> Ops; |
| 5341 | Ops.push_back(Base->getOperand(0)); |
| 5342 | Ops.push_back(Base->getOperand(1)); |
| 5343 | Ops.push_back(Base->getOperand(2)); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5344 | return DAG.getNode(ISD::BIT_CONVERT, VT, |
Evan Cheng | 64a752f | 2006-08-11 09:08:15 +0000 | [diff] [blame] | 5345 | DAG.getNode(X86ISD::LOAD_UA, Tys, &Ops[0], Ops.size())); |
Evan Cheng | 311ace0 | 2006-08-11 07:35:45 +0000 | [diff] [blame] | 5346 | } |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5347 | } |
| 5348 | |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 5349 | /// PerformSELECTCombine - Do target-specific dag combines on SELECT nodes. |
| 5350 | static SDOperand PerformSELECTCombine(SDNode *N, SelectionDAG &DAG, |
| 5351 | const X86Subtarget *Subtarget) { |
| 5352 | SDOperand Cond = N->getOperand(0); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5353 | |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 5354 | // If we have SSE[12] support, try to form min/max nodes. |
| 5355 | if (Subtarget->hasSSE2() && |
| 5356 | (N->getValueType(0) == MVT::f32 || N->getValueType(0) == MVT::f64)) { |
| 5357 | if (Cond.getOpcode() == ISD::SETCC) { |
| 5358 | // Get the LHS/RHS of the select. |
| 5359 | SDOperand LHS = N->getOperand(1); |
| 5360 | SDOperand RHS = N->getOperand(2); |
| 5361 | ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get(); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5362 | |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 5363 | unsigned Opcode = 0; |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 5364 | if (LHS == Cond.getOperand(0) && RHS == Cond.getOperand(1)) { |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 5365 | switch (CC) { |
| 5366 | default: break; |
| 5367 | case ISD::SETOLE: // (X <= Y) ? X : Y -> min |
| 5368 | case ISD::SETULE: |
| 5369 | case ISD::SETLE: |
| 5370 | if (!UnsafeFPMath) break; |
| 5371 | // FALL THROUGH. |
| 5372 | case ISD::SETOLT: // (X olt/lt Y) ? X : Y -> min |
| 5373 | case ISD::SETLT: |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 5374 | Opcode = X86ISD::FMIN; |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 5375 | break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5376 | |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 5377 | case ISD::SETOGT: // (X > Y) ? X : Y -> max |
| 5378 | case ISD::SETUGT: |
| 5379 | case ISD::SETGT: |
| 5380 | if (!UnsafeFPMath) break; |
| 5381 | // FALL THROUGH. |
| 5382 | case ISD::SETUGE: // (X uge/ge Y) ? X : Y -> max |
| 5383 | case ISD::SETGE: |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 5384 | Opcode = X86ISD::FMAX; |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 5385 | break; |
| 5386 | } |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 5387 | } else if (LHS == Cond.getOperand(1) && RHS == Cond.getOperand(0)) { |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 5388 | switch (CC) { |
| 5389 | default: break; |
| 5390 | case ISD::SETOGT: // (X > Y) ? Y : X -> min |
| 5391 | case ISD::SETUGT: |
| 5392 | case ISD::SETGT: |
| 5393 | if (!UnsafeFPMath) break; |
| 5394 | // FALL THROUGH. |
| 5395 | case ISD::SETUGE: // (X uge/ge Y) ? Y : X -> min |
| 5396 | case ISD::SETGE: |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 5397 | Opcode = X86ISD::FMIN; |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 5398 | break; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5399 | |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 5400 | case ISD::SETOLE: // (X <= Y) ? Y : X -> max |
| 5401 | case ISD::SETULE: |
| 5402 | case ISD::SETLE: |
| 5403 | if (!UnsafeFPMath) break; |
| 5404 | // FALL THROUGH. |
| 5405 | case ISD::SETOLT: // (X olt/lt Y) ? Y : X -> max |
| 5406 | case ISD::SETLT: |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 5407 | Opcode = X86ISD::FMAX; |
Chris Lattner | 1907a7b | 2006-10-05 04:11:26 +0000 | [diff] [blame] | 5408 | break; |
| 5409 | } |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 5410 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5411 | |
Evan Cheng | 8ca2932 | 2006-11-10 21:43:37 +0000 | [diff] [blame] | 5412 | if (Opcode) |
| 5413 | return DAG.getNode(Opcode, N->getValueType(0), LHS, RHS); |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 5414 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5415 | |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 5416 | } |
| 5417 | |
| 5418 | return SDOperand(); |
| 5419 | } |
| 5420 | |
| 5421 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5422 | SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N, |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5423 | DAGCombinerInfo &DCI) const { |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5424 | SelectionDAG &DAG = DCI.DAG; |
| 5425 | switch (N->getOpcode()) { |
| 5426 | default: break; |
| 5427 | case ISD::VECTOR_SHUFFLE: |
Evan Cheng | 1e60c09 | 2006-07-10 21:37:44 +0000 | [diff] [blame] | 5428 | return PerformShuffleCombine(N, DAG, Subtarget); |
Chris Lattner | 83e6c99 | 2006-10-04 06:57:07 +0000 | [diff] [blame] | 5429 | case ISD::SELECT: |
| 5430 | return PerformSELECTCombine(N, DAG, Subtarget); |
Evan Cheng | 206ee9d | 2006-07-07 08:33:52 +0000 | [diff] [blame] | 5431 | } |
| 5432 | |
| 5433 | return SDOperand(); |
| 5434 | } |
| 5435 | |
Evan Cheng | 60c07e1 | 2006-07-05 22:17:51 +0000 | [diff] [blame] | 5436 | //===----------------------------------------------------------------------===// |
| 5437 | // X86 Inline Assembly Support |
| 5438 | //===----------------------------------------------------------------------===// |
| 5439 | |
Chris Lattner | f4dff84 | 2006-07-11 02:54:03 +0000 | [diff] [blame] | 5440 | /// getConstraintType - Given a constraint letter, return the type of |
| 5441 | /// constraint it is for this target. |
| 5442 | X86TargetLowering::ConstraintType |
| 5443 | X86TargetLowering::getConstraintType(char ConstraintLetter) const { |
| 5444 | switch (ConstraintLetter) { |
Chris Lattner | 6d34657 | 2006-07-12 16:59:49 +0000 | [diff] [blame] | 5445 | case 'A': |
| 5446 | case 'r': |
| 5447 | case 'R': |
| 5448 | case 'l': |
| 5449 | case 'q': |
| 5450 | case 'Q': |
| 5451 | case 'x': |
| 5452 | case 'Y': |
| 5453 | return C_RegisterClass; |
Chris Lattner | f4dff84 | 2006-07-11 02:54:03 +0000 | [diff] [blame] | 5454 | default: return TargetLowering::getConstraintType(ConstraintLetter); |
| 5455 | } |
| 5456 | } |
| 5457 | |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 5458 | /// isOperandValidForConstraint - Return the specified operand (possibly |
| 5459 | /// modified) if the specified SDOperand is valid for the specified target |
| 5460 | /// constraint letter, otherwise return null. |
| 5461 | SDOperand X86TargetLowering:: |
| 5462 | isOperandValidForConstraint(SDOperand Op, char Constraint, SelectionDAG &DAG) { |
| 5463 | switch (Constraint) { |
| 5464 | default: break; |
| 5465 | case 'i': |
| 5466 | // Literal immediates are always ok. |
| 5467 | if (isa<ConstantSDNode>(Op)) return Op; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5468 | |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 5469 | // If we are in non-pic codegen mode, we allow the address of a global to |
| 5470 | // be used with 'i'. |
| 5471 | if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op)) { |
| 5472 | if (getTargetMachine().getRelocationModel() == Reloc::PIC_) |
| 5473 | return SDOperand(0, 0); |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5474 | |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 5475 | if (GA->getOpcode() != ISD::TargetGlobalAddress) |
| 5476 | Op = DAG.getTargetGlobalAddress(GA->getGlobal(), GA->getValueType(0), |
| 5477 | GA->getOffset()); |
| 5478 | return Op; |
| 5479 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5480 | |
Chris Lattner | 22aaf1d | 2006-10-31 20:13:11 +0000 | [diff] [blame] | 5481 | // Otherwise, not valid for this mode. |
| 5482 | return SDOperand(0, 0); |
| 5483 | } |
| 5484 | return TargetLowering::isOperandValidForConstraint(Op, Constraint, DAG); |
| 5485 | } |
| 5486 | |
| 5487 | |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 5488 | std::vector<unsigned> X86TargetLowering:: |
Chris Lattner | 1efa40f | 2006-02-22 00:56:39 +0000 | [diff] [blame] | 5489 | getRegClassForInlineAsmConstraint(const std::string &Constraint, |
| 5490 | MVT::ValueType VT) const { |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 5491 | if (Constraint.size() == 1) { |
| 5492 | // FIXME: not handling fp-stack yet! |
| 5493 | // FIXME: not handling MMX registers yet ('y' constraint). |
| 5494 | switch (Constraint[0]) { // GCC X86 Constraint Letters |
Chris Lattner | f4dff84 | 2006-07-11 02:54:03 +0000 | [diff] [blame] | 5495 | default: break; // Unknown constraint letter |
| 5496 | case 'A': // EAX/EDX |
| 5497 | if (VT == MVT::i32 || VT == MVT::i64) |
| 5498 | return make_vector<unsigned>(X86::EAX, X86::EDX, 0); |
| 5499 | break; |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 5500 | case 'r': // GENERAL_REGS |
| 5501 | case 'R': // LEGACY_REGS |
Chris Lattner | 80a7ecc | 2006-05-06 00:29:37 +0000 | [diff] [blame] | 5502 | if (VT == MVT::i32) |
| 5503 | return make_vector<unsigned>(X86::EAX, X86::EDX, X86::ECX, X86::EBX, |
| 5504 | X86::ESI, X86::EDI, X86::EBP, X86::ESP, 0); |
| 5505 | else if (VT == MVT::i16) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5506 | return make_vector<unsigned>(X86::AX, X86::DX, X86::CX, X86::BX, |
Chris Lattner | 80a7ecc | 2006-05-06 00:29:37 +0000 | [diff] [blame] | 5507 | X86::SI, X86::DI, X86::BP, X86::SP, 0); |
| 5508 | else if (VT == MVT::i8) |
| 5509 | return make_vector<unsigned>(X86::AL, X86::DL, X86::CL, X86::DL, 0); |
| 5510 | break; |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 5511 | case 'l': // INDEX_REGS |
Chris Lattner | 80a7ecc | 2006-05-06 00:29:37 +0000 | [diff] [blame] | 5512 | if (VT == MVT::i32) |
| 5513 | return make_vector<unsigned>(X86::EAX, X86::EDX, X86::ECX, X86::EBX, |
| 5514 | X86::ESI, X86::EDI, X86::EBP, 0); |
| 5515 | else if (VT == MVT::i16) |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5516 | return make_vector<unsigned>(X86::AX, X86::DX, X86::CX, X86::BX, |
Chris Lattner | 80a7ecc | 2006-05-06 00:29:37 +0000 | [diff] [blame] | 5517 | X86::SI, X86::DI, X86::BP, 0); |
| 5518 | else if (VT == MVT::i8) |
| 5519 | return make_vector<unsigned>(X86::AL, X86::DL, X86::CL, X86::DL, 0); |
| 5520 | break; |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 5521 | case 'q': // Q_REGS (GENERAL_REGS in 64-bit mode) |
| 5522 | case 'Q': // Q_REGS |
Chris Lattner | 80a7ecc | 2006-05-06 00:29:37 +0000 | [diff] [blame] | 5523 | if (VT == MVT::i32) |
| 5524 | return make_vector<unsigned>(X86::EAX, X86::EDX, X86::ECX, X86::EBX, 0); |
| 5525 | else if (VT == MVT::i16) |
| 5526 | return make_vector<unsigned>(X86::AX, X86::DX, X86::CX, X86::BX, 0); |
| 5527 | else if (VT == MVT::i8) |
| 5528 | return make_vector<unsigned>(X86::AL, X86::DL, X86::CL, X86::DL, 0); |
| 5529 | break; |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 5530 | case 'x': // SSE_REGS if SSE1 allowed |
| 5531 | if (Subtarget->hasSSE1()) |
| 5532 | return make_vector<unsigned>(X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, |
| 5533 | X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, |
| 5534 | 0); |
| 5535 | return std::vector<unsigned>(); |
| 5536 | case 'Y': // SSE_REGS if SSE2 allowed |
| 5537 | if (Subtarget->hasSSE2()) |
| 5538 | return make_vector<unsigned>(X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, |
| 5539 | X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, |
| 5540 | 0); |
| 5541 | return std::vector<unsigned>(); |
| 5542 | } |
| 5543 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5544 | |
Chris Lattner | 1efa40f | 2006-02-22 00:56:39 +0000 | [diff] [blame] | 5545 | return std::vector<unsigned>(); |
Chris Lattner | 259e97c | 2006-01-31 19:43:35 +0000 | [diff] [blame] | 5546 | } |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5547 | |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5548 | std::pair<unsigned, const TargetRegisterClass*> |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5549 | X86TargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, |
| 5550 | MVT::ValueType VT) const { |
| 5551 | // Use the default implementation in TargetLowering to convert the register |
| 5552 | // constraint into a member of a register class. |
| 5553 | std::pair<unsigned, const TargetRegisterClass*> Res; |
| 5554 | Res = TargetLowering::getRegForInlineAsmConstraint(Constraint, VT); |
Chris Lattner | 1a60aa7 | 2006-10-31 19:42:44 +0000 | [diff] [blame] | 5555 | |
| 5556 | // Not found as a standard register? |
| 5557 | if (Res.second == 0) { |
| 5558 | // GCC calls "st(0)" just plain "st". |
| 5559 | if (StringsEqualNoCase("{st}", Constraint)) { |
| 5560 | Res.first = X86::ST0; |
| 5561 | Res.second = X86::RSTRegisterClass; |
| 5562 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5563 | |
Chris Lattner | 1a60aa7 | 2006-10-31 19:42:44 +0000 | [diff] [blame] | 5564 | return Res; |
| 5565 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5566 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5567 | // Otherwise, check to see if this is a register class of the wrong value |
| 5568 | // type. For example, we want to map "{ax},i32" -> {eax}, we don't want it to |
| 5569 | // turn into {ax},{dx}. |
| 5570 | if (Res.second->hasType(VT)) |
| 5571 | return Res; // Correct type already, nothing to do. |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5572 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5573 | // All of the single-register GCC register classes map their values onto |
| 5574 | // 16-bit register pieces "ax","dx","cx","bx","si","di","bp","sp". If we |
| 5575 | // really want an 8-bit or 32-bit register, map to the appropriate register |
| 5576 | // class and return the appropriate register. |
| 5577 | if (Res.second != X86::GR16RegisterClass) |
| 5578 | return Res; |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5579 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5580 | if (VT == MVT::i8) { |
| 5581 | unsigned DestReg = 0; |
| 5582 | switch (Res.first) { |
| 5583 | default: break; |
| 5584 | case X86::AX: DestReg = X86::AL; break; |
| 5585 | case X86::DX: DestReg = X86::DL; break; |
| 5586 | case X86::CX: DestReg = X86::CL; break; |
| 5587 | case X86::BX: DestReg = X86::BL; break; |
| 5588 | } |
| 5589 | if (DestReg) { |
| 5590 | Res.first = DestReg; |
| 5591 | Res.second = Res.second = X86::GR8RegisterClass; |
| 5592 | } |
| 5593 | } else if (VT == MVT::i32) { |
| 5594 | unsigned DestReg = 0; |
| 5595 | switch (Res.first) { |
| 5596 | default: break; |
| 5597 | case X86::AX: DestReg = X86::EAX; break; |
| 5598 | case X86::DX: DestReg = X86::EDX; break; |
| 5599 | case X86::CX: DestReg = X86::ECX; break; |
| 5600 | case X86::BX: DestReg = X86::EBX; break; |
| 5601 | case X86::SI: DestReg = X86::ESI; break; |
| 5602 | case X86::DI: DestReg = X86::EDI; break; |
| 5603 | case X86::BP: DestReg = X86::EBP; break; |
| 5604 | case X86::SP: DestReg = X86::ESP; break; |
| 5605 | } |
| 5606 | if (DestReg) { |
| 5607 | Res.first = DestReg; |
| 5608 | Res.second = Res.second = X86::GR32RegisterClass; |
| 5609 | } |
Evan Cheng | 25ab690 | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 5610 | } else if (VT == MVT::i64) { |
| 5611 | unsigned DestReg = 0; |
| 5612 | switch (Res.first) { |
| 5613 | default: break; |
| 5614 | case X86::AX: DestReg = X86::RAX; break; |
| 5615 | case X86::DX: DestReg = X86::RDX; break; |
| 5616 | case X86::CX: DestReg = X86::RCX; break; |
| 5617 | case X86::BX: DestReg = X86::RBX; break; |
| 5618 | case X86::SI: DestReg = X86::RSI; break; |
| 5619 | case X86::DI: DestReg = X86::RDI; break; |
| 5620 | case X86::BP: DestReg = X86::RBP; break; |
| 5621 | case X86::SP: DestReg = X86::RSP; break; |
| 5622 | } |
| 5623 | if (DestReg) { |
| 5624 | Res.first = DestReg; |
| 5625 | Res.second = Res.second = X86::GR64RegisterClass; |
| 5626 | } |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5627 | } |
Anton Korobeynikov | 12c49af | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 5628 | |
Chris Lattner | f76d180 | 2006-07-31 23:26:50 +0000 | [diff] [blame] | 5629 | return Res; |
| 5630 | } |