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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
2//
3// This register allocator allocates registers to a basic block at a time,
4// attempting to keep values in registers and reusing registers as appropriate.
5//
6//===----------------------------------------------------------------------===//
7
Chris Lattner4cc662b2003-08-03 21:47:31 +00008#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +00009#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000010#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000011#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000012#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000013#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000014#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000015#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000016#include "llvm/Target/TargetMachine.h"
Chris Lattner82bee0f2002-12-18 08:14:26 +000017#include "Support/CommandLine.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000018#include "Support/Debug.h"
19#include "Support/Statistic.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000020#include <iostream>
21
Chris Lattnerb74e83c2002-12-16 16:15:28 +000022namespace {
23 Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
24 Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Chris Lattner82bee0f2002-12-18 08:14:26 +000025 cl::opt<bool> DisableKill("no-kill", cl::Hidden,
26 cl::desc("Disable register kill in local-ra"));
Chris Lattnerb74e83c2002-12-16 16:15:28 +000027
Chris Lattner580f9be2002-12-28 20:40:43 +000028 class RA : public MachineFunctionPass {
29 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000030 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000031 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000032 LiveVariables *LV;
Chris Lattnerff863ba2002-12-25 05:05:46 +000033
Chris Lattnerb8822ad2003-08-04 23:36:39 +000034 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
35 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000036 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000037
38 // Virt2PhysRegMap - This map contains entries for each virtual register
39 // that is currently available in a physical register.
40 //
41 std::map<unsigned, unsigned> Virt2PhysRegMap;
42
43 // PhysRegsUsed - This map contains entries for each physical register that
44 // currently has a value (ie, it is in Virt2PhysRegMap). The value mapped
45 // to is the virtual register corresponding to the physical register (the
46 // inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this
47 // register is pinned because it is used by a future instruction.
48 //
49 std::map<unsigned, unsigned> PhysRegsUsed;
50
51 // PhysRegsUseOrder - This contains a list of the physical registers that
52 // currently have a virtual register value in them. This list provides an
53 // ordering of registers, imposing a reallocation order. This list is only
54 // used if all registers are allocated and we have to spill one, in which
55 // case we spill the least recently used register. Entries at the front of
56 // the list are the least recently used registers, entries at the back are
57 // the most recently used.
58 //
59 std::vector<unsigned> PhysRegsUseOrder;
60
Chris Lattner91a452b2003-01-13 00:25:40 +000061 // VirtRegModified - This bitset contains information about which virtual
62 // registers need to be spilled back to memory when their registers are
63 // scavenged. If a virtual register has simply been rematerialized, there
64 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000065 //
Chris Lattner91a452b2003-01-13 00:25:40 +000066 std::vector<bool> VirtRegModified;
67
68 void markVirtRegModified(unsigned Reg, bool Val = true) {
69 assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
70 Reg -= MRegisterInfo::FirstVirtualRegister;
71 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
72 VirtRegModified[Reg] = Val;
73 }
74
75 bool isVirtRegModified(unsigned Reg) const {
76 assert(Reg >= MRegisterInfo::FirstVirtualRegister && "Illegal VirtReg!");
77 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
78 && "Illegal virtual register!");
79 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
80 }
Chris Lattner82bee0f2002-12-18 08:14:26 +000081
Chris Lattnerb74e83c2002-12-16 16:15:28 +000082 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattner82bee0f2002-12-18 08:14:26 +000083 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner0eb172c2002-12-24 00:04:55 +000084 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
85
86 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
87 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
88 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
89 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
90 // Add it to the end of the list
91 PhysRegsUseOrder.push_back(RegMatch);
92 if (RegMatch == Reg)
93 return; // Found an exact match, exit early
94 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +000095 }
96
97 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +000098 virtual const char *getPassName() const {
99 return "Local Register Allocator";
100 }
101
Chris Lattner91a452b2003-01-13 00:25:40 +0000102 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
103 if (!DisableKill)
104 AU.addRequired<LiveVariables>();
105 AU.addRequiredID(PHIEliminationID);
106 MachineFunctionPass::getAnalysisUsage(AU);
107 }
108
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000109 private:
110 /// runOnMachineFunction - Register allocate the whole function
111 bool runOnMachineFunction(MachineFunction &Fn);
112
113 /// AllocateBasicBlock - Register allocate the specified basic block.
114 void AllocateBasicBlock(MachineBasicBlock &MBB);
115
Chris Lattner82bee0f2002-12-18 08:14:26 +0000116
Chris Lattner82bee0f2002-12-18 08:14:26 +0000117 /// areRegsEqual - This method returns true if the specified registers are
118 /// related to each other. To do this, it checks to see if they are equal
119 /// or if the first register is in the alias set of the second register.
120 ///
121 bool areRegsEqual(unsigned R1, unsigned R2) const {
122 if (R1 == R2) return true;
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000123 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
124 *AliasSet; ++AliasSet) {
125 if (*AliasSet == R1) return true;
126 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000127 return false;
128 }
129
Chris Lattner580f9be2002-12-28 20:40:43 +0000130 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000131 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000132 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000133
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000134 /// removePhysReg - This method marks the specified physical register as no
135 /// longer being in use.
136 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000137 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000138
139 /// spillVirtReg - This method spills the value specified by PhysReg into
140 /// the virtual register slot specified by VirtReg. It then updates the RA
141 /// data structures to indicate the fact that PhysReg is now available.
142 ///
143 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
144 unsigned VirtReg, unsigned PhysReg);
145
Chris Lattnerc21be922002-12-16 17:44:42 +0000146 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner128c2aa2003-08-17 18:01:15 +0000147 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
148 /// true, then the request is ignored if the physical register does not
149 /// contain a virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000150 ///
Chris Lattnerc21be922002-12-16 17:44:42 +0000151 void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000152 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattnerc21be922002-12-16 17:44:42 +0000153
Chris Lattner91a452b2003-01-13 00:25:40 +0000154 /// assignVirtToPhysReg - This method updates local state so that we know
155 /// that PhysReg is the proper container for VirtReg now. The physical
156 /// register must not be used for anything else when this is called.
157 ///
158 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
159
160 /// liberatePhysReg - Make sure the specified physical register is available
161 /// for use. If there is currently a value in it, it is either moved out of
162 /// the way or spilled to memory.
163 ///
164 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
165 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000166
Chris Lattnerae640432002-12-17 02:50:10 +0000167 /// isPhysRegAvailable - Return true if the specified physical register is
168 /// free and available for use. This also includes checking to see if
169 /// aliased registers are all free...
170 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000171 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000172
173 /// getFreeReg - Look to see if there is a free register available in the
174 /// specified register class. If not, return 0.
175 ///
176 unsigned getFreeReg(const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000177
Chris Lattner91a452b2003-01-13 00:25:40 +0000178 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000179 /// register. If all compatible physical registers are used, this method
180 /// spills the last used virtual register to the stack, and uses that
181 /// register.
182 ///
Chris Lattner91a452b2003-01-13 00:25:40 +0000183 unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
184 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000185
186 /// reloadVirtReg - This method loads the specified virtual register into a
187 /// physical register, returning the physical register chosen. This updates
188 /// the regalloc data structures to reflect the fact that the virtual reg is
189 /// now alive in a physical register, and the previous one isn't.
190 ///
191 unsigned reloadVirtReg(MachineBasicBlock &MBB,
192 MachineBasicBlock::iterator &I, unsigned VirtReg);
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000193
194 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
195 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000196 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000197}
198
Chris Lattnerae640432002-12-17 02:50:10 +0000199
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000200/// getStackSpaceFor - This allocates space for the specified virtual register
201/// to be held on the stack.
202int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
203 // Find the location Reg would belong...
204 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000205
Chris Lattner580f9be2002-12-28 20:40:43 +0000206 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000207 return I->second; // Already has space allocated?
208
Chris Lattner580f9be2002-12-28 20:40:43 +0000209 // Allocate a new stack object for this spill location...
Chris Lattner91a452b2003-01-13 00:25:40 +0000210 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000211
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000212 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000213 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
214 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000215}
216
Chris Lattnerae640432002-12-17 02:50:10 +0000217
Chris Lattner82bee0f2002-12-18 08:14:26 +0000218/// removePhysReg - This method marks the specified physical register as no
219/// longer being in use.
220///
221void RA::removePhysReg(unsigned PhysReg) {
222 PhysRegsUsed.erase(PhysReg); // PhyReg no longer used
223
224 std::vector<unsigned>::iterator It =
225 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
226 assert(It != PhysRegsUseOrder.end() &&
227 "Spilled a physical register, but it was not in use list!");
228 PhysRegsUseOrder.erase(It);
229}
230
Chris Lattner91a452b2003-01-13 00:25:40 +0000231
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000232/// spillVirtReg - This method spills the value specified by PhysReg into the
233/// virtual register slot specified by VirtReg. It then updates the RA data
234/// structures to indicate the fact that PhysReg is now available.
235///
236void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
237 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000238 if (!VirtReg && DisableKill) return;
239 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000240 " Must not have appropriate kill for the register or use exists beyond"
241 " the intended one.");
242 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
243 std::cerr << " containing %reg" << VirtReg;
244 if (!isVirtRegModified(VirtReg))
245 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000246
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000247 // Otherwise, there is a virtual register corresponding to this physical
248 // register. We only need to spill it into its stack slot if it has been
249 // modified.
250 if (isVirtRegModified(VirtReg)) {
251 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
252 int FrameIndex = getStackSpaceFor(VirtReg, RC);
253 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
254 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
255 ++NumSpilled; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000256 }
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000257 Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000258
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000259 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000260 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000261}
262
Chris Lattnerae640432002-12-17 02:50:10 +0000263
Chris Lattner91a452b2003-01-13 00:25:40 +0000264/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner128c2aa2003-08-17 18:01:15 +0000265/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
266/// then the request is ignored if the physical register does not contain a
267/// virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000268///
269void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000270 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000271 std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg);
272 if (PI != PhysRegsUsed.end()) { // Only spill it if it's used!
Chris Lattner128c2aa2003-08-17 18:01:15 +0000273 if (PI->second || !OnlyVirtRegs)
274 spillVirtReg(MBB, I, PI->second, PhysReg);
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000275 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000276 // If the selected register aliases any other registers, we must make
277 // sure that one of the aliases isn't alive...
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000278 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
279 *AliasSet; ++AliasSet) {
280 PI = PhysRegsUsed.find(*AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000281 if (PI != PhysRegsUsed.end()) // Spill aliased register...
Chris Lattner128c2aa2003-08-17 18:01:15 +0000282 if (PI->second || !OnlyVirtRegs)
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000283 spillVirtReg(MBB, I, PI->second, *AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000284 }
285 }
286}
287
288
289/// assignVirtToPhysReg - This method updates local state so that we know
290/// that PhysReg is the proper container for VirtReg now. The physical
291/// register must not be used for anything else when this is called.
292///
293void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
294 assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() &&
295 "Phys reg already assigned!");
296 // Update information to note the fact that this register was just used, and
297 // it holds VirtReg.
298 PhysRegsUsed[PhysReg] = VirtReg;
299 Virt2PhysRegMap[VirtReg] = PhysReg;
300 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
301}
302
303
Chris Lattnerae640432002-12-17 02:50:10 +0000304/// isPhysRegAvailable - Return true if the specified physical register is free
305/// and available for use. This also includes checking to see if aliased
306/// registers are all free...
307///
308bool RA::isPhysRegAvailable(unsigned PhysReg) const {
309 if (PhysRegsUsed.count(PhysReg)) return false;
310
311 // If the selected register aliases any other allocated registers, it is
312 // not free!
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000313 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
314 *AliasSet; ++AliasSet)
315 if (PhysRegsUsed.count(*AliasSet)) // Aliased register in use?
316 return false; // Can't use this reg then.
Chris Lattnerae640432002-12-17 02:50:10 +0000317 return true;
318}
319
320
Chris Lattner91a452b2003-01-13 00:25:40 +0000321/// getFreeReg - Look to see if there is a free register available in the
322/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000323///
Chris Lattner91a452b2003-01-13 00:25:40 +0000324unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000325 // Get iterators defining the range of registers that are valid to allocate in
326 // this class, which also specifies the preferred allocation order.
327 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
328 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000329
Chris Lattner91a452b2003-01-13 00:25:40 +0000330 for (; RI != RE; ++RI)
331 if (isPhysRegAvailable(*RI)) { // Is reg unused?
332 assert(*RI != 0 && "Cannot use register!");
333 return *RI; // Found an unused register!
334 }
335 return 0;
336}
337
338
339/// liberatePhysReg - Make sure the specified physical register is available for
340/// use. If there is currently a value in it, it is either moved out of the way
341/// or spilled to memory.
342///
343void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
344 unsigned PhysReg) {
345 // FIXME: This code checks to see if a register is available, but it really
346 // wants to know if a reg is available BEFORE the instruction executes. If
347 // called after killed operands are freed, it runs the risk of reallocating a
348 // used operand...
349#if 0
350 if (isPhysRegAvailable(PhysReg)) return; // Already available...
351
352 // Check to see if the register is directly used, not indirectly used through
353 // aliases. If aliased registers are the ones actually used, we cannot be
354 // sure that we will be able to save the whole thing if we do a reg-reg copy.
355 std::map<unsigned, unsigned>::iterator PRUI = PhysRegsUsed.find(PhysReg);
356 if (PRUI != PhysRegsUsed.end()) {
357 unsigned VirtReg = PRUI->second; // The virtual register held...
358
359 // Check to see if there is a compatible register available. If so, we can
360 // move the value into the new register...
361 //
362 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
363 if (unsigned NewReg = getFreeReg(RC)) {
364 // Emit the code to copy the value...
365 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
366
367 // Update our internal state to indicate that PhysReg is available and Reg
368 // isn't.
369 Virt2PhysRegMap.erase(VirtReg);
370 removePhysReg(PhysReg); // Free the physreg
371
372 // Move reference over to new register...
373 assignVirtToPhysReg(VirtReg, NewReg);
374 return;
Chris Lattnerae640432002-12-17 02:50:10 +0000375 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000376 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000377#endif
378 spillPhysReg(MBB, I, PhysReg);
379}
380
381
382/// getReg - Find a physical register to hold the specified virtual
383/// register. If all compatible physical registers are used, this method spills
384/// the last used virtual register to the stack, and uses that register.
385///
386unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
387 unsigned VirtReg) {
388 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
389
390 // First check to see if we have a free register of the requested type...
391 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000392
Chris Lattnerae640432002-12-17 02:50:10 +0000393 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000394 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000395 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000396
397 // Loop over all of the preallocated registers from the least recently used
398 // to the most recently used. When we find one that is capable of holding
399 // our register, use it.
400 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000401 assert(i != PhysRegsUseOrder.size() &&
402 "Couldn't find a register of the appropriate class!");
Chris Lattnerae640432002-12-17 02:50:10 +0000403
404 unsigned R = PhysRegsUseOrder[i];
Chris Lattner41822c72003-08-23 23:49:42 +0000405
406 // We can only use this register if it holds a virtual register (ie, it
407 // can be spilled). Do not use it if it is an explicitly allocated
408 // physical register!
409 assert(PhysRegsUsed.count(R) &&
410 "PhysReg in PhysRegsUseOrder, but is not allocated?");
411 if (PhysRegsUsed[R]) {
412 // If the current register is compatible, use it.
413 if (RegInfo->getRegClass(R) == RC) {
414 PhysReg = R;
415 break;
416 } else {
417 // If one of the registers aliased to the current register is
418 // compatible, use it.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000419 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
420 *AliasSet; ++AliasSet) {
421 if (RegInfo->getRegClass(*AliasSet) == RC) {
422 PhysReg = *AliasSet; // Take an aliased register
423 break;
424 }
425 }
Chris Lattner41822c72003-08-23 23:49:42 +0000426 }
Chris Lattnerae640432002-12-17 02:50:10 +0000427 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000428 }
429
Chris Lattnerae640432002-12-17 02:50:10 +0000430 assert(PhysReg && "Physical register not assigned!?!?");
431
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000432 // At this point PhysRegsUseOrder[i] is the least recently used register of
433 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000434 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000435 }
436
437 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000438 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000439 return PhysReg;
440}
441
Chris Lattnerae640432002-12-17 02:50:10 +0000442
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000443/// reloadVirtReg - This method loads the specified virtual register into a
444/// physical register, returning the physical register chosen. This updates the
445/// regalloc data structures to reflect the fact that the virtual reg is now
446/// alive in a physical register, and the previous one isn't.
447///
448unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
449 MachineBasicBlock::iterator &I,
450 unsigned VirtReg) {
451 std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
452 if (It != Virt2PhysRegMap.end()) {
453 MarkPhysRegRecentlyUsed(It->second);
454 return It->second; // Already have this value available!
455 }
456
Chris Lattner91a452b2003-01-13 00:25:40 +0000457 unsigned PhysReg = getReg(MBB, I, VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000458
Chris Lattnerff863ba2002-12-25 05:05:46 +0000459 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner580f9be2002-12-28 20:40:43 +0000460 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000461
Chris Lattner91a452b2003-01-13 00:25:40 +0000462 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
463
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000464 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
465 << RegInfo->getName(PhysReg) << "\n");
466
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000467 // Add move instruction(s)
Chris Lattner580f9be2002-12-28 20:40:43 +0000468 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000469 ++NumReloaded; // Update statistics
470 return PhysReg;
471}
472
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000473
474
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000475void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
476 // loop over each instruction
477 MachineBasicBlock::iterator I = MBB.begin();
478 for (; I != MBB.end(); ++I) {
479 MachineInstr *MI = *I;
Chris Lattner3501fea2003-01-14 22:00:31 +0000480 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000481 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
482 std::cerr << " Regs have values: ";
483 for (std::map<unsigned, unsigned>::const_iterator
484 I = PhysRegsUsed.begin(), E = PhysRegsUsed.end(); I != E; ++I)
485 std::cerr << "[" << RegInfo->getName(I->first)
486 << ",%reg" << I->second << "] ";
487 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000488
Chris Lattnerae640432002-12-17 02:50:10 +0000489 // Loop over the implicit uses, making sure that they are at the head of the
490 // use order list, so they don't get reallocated.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000491 for (const unsigned *ImplicitUses = TID.ImplicitUses;
492 *ImplicitUses; ++ImplicitUses)
493 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000494
Brian Gaeke53b99a02003-08-15 21:19:25 +0000495 // Get the used operands into registers. This has the potential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000496 // incoming values if we are out of registers. Note that we completely
497 // ignore physical register uses here. We assume that if an explicit
498 // physical register is referenced by the instruction, that it is guaranteed
499 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000500 //
501 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000502 if (MI->getOperand(i).opIsUse() && MI->getOperand(i).isVirtualRegister()){
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000503 unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
504 unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
505 MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
506 }
507
Chris Lattner91a452b2003-01-13 00:25:40 +0000508 if (!DisableKill) {
509 // If this instruction is the last user of anything in registers, kill the
510 // value, freeing the register being used, so it doesn't need to be
511 // spilled to memory.
512 //
513 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
Chris Lattnerd5725632003-05-12 03:54:14 +0000514 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000515 unsigned VirtReg = KI->second;
Chris Lattnerd5725632003-05-12 03:54:14 +0000516 unsigned PhysReg = VirtReg;
517 if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
518 std::map<unsigned, unsigned>::iterator I =
519 Virt2PhysRegMap.find(VirtReg);
520 assert(I != Virt2PhysRegMap.end());
521 PhysReg = I->second;
522 Virt2PhysRegMap.erase(I);
523 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000524
Chris Lattnerd5725632003-05-12 03:54:14 +0000525 if (PhysReg) {
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000526 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
527 << "[%reg" << VirtReg <<"], removing it from live set\n");
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000528 removePhysReg(PhysReg);
Chris Lattnerd5725632003-05-12 03:54:14 +0000529 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000530 }
531 }
532
533 // Loop over all of the operands of the instruction, spilling registers that
534 // are defined, and marking explicit destinations in the PhysRegsUsed map.
535 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattnerd3fd79f2003-08-03 13:49:03 +0000536 if ((MI->getOperand(i).opIsDefOnly() ||
537 MI->getOperand(i).opIsDefAndUse()) &&
Chris Lattner91a452b2003-01-13 00:25:40 +0000538 MI->getOperand(i).isPhysicalRegister()) {
539 unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
Chris Lattner128c2aa2003-08-17 18:01:15 +0000540 spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg
Chris Lattner91a452b2003-01-13 00:25:40 +0000541 PhysRegsUsed[Reg] = 0; // It is free and reserved now
542 PhysRegsUseOrder.push_back(Reg);
543 }
544
545 // Loop over the implicit defs, spilling them as well.
Chris Lattner3501fea2003-01-14 22:00:31 +0000546 if (const unsigned *ImplicitDefs = TID.ImplicitDefs)
Chris Lattner91a452b2003-01-13 00:25:40 +0000547 for (unsigned i = 0; ImplicitDefs[i]; ++i) {
548 unsigned Reg = ImplicitDefs[i];
Chris Lattnerd5725632003-05-12 03:54:14 +0000549 spillPhysReg(MBB, I, Reg);
550 PhysRegsUseOrder.push_back(Reg);
551 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Chris Lattner91a452b2003-01-13 00:25:40 +0000552 }
553
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000554 // Okay, we have allocated all of the source operands and spilled any values
555 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner91a452b2003-01-13 00:25:40 +0000556 // implicit defs and assign them to a register, spilling incoming values if
557 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000558 //
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000559 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Vikram S. Adve5f2180c2003-05-27 00:05:23 +0000560 if ((MI->getOperand(i).opIsDefOnly() || MI->getOperand(i).opIsDefAndUse())
561 && MI->getOperand(i).isVirtualRegister()) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000562 unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
563 unsigned DestPhysReg;
564
Chris Lattnerd5725632003-05-12 03:54:14 +0000565 // If DestVirtReg already has a value, forget about it. Why doesn't
566 // getReg do this right?
567 std::map<unsigned, unsigned>::iterator DestI =
568 Virt2PhysRegMap.find(DestVirtReg);
569 if (DestI != Virt2PhysRegMap.end()) {
570 unsigned PhysReg = DestI->second;
571 Virt2PhysRegMap.erase(DestI);
572 removePhysReg(PhysReg);
573 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000574
Chris Lattner580f9be2002-12-28 20:40:43 +0000575 if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000576 // must be same register number as the first operand
577 // This maps a = b + c into b += c, and saves b into a's spot
578 assert(MI->getOperand(1).isRegister() &&
579 MI->getOperand(1).getAllocatedRegNum() &&
580 MI->getOperand(1).opIsUse() &&
581 "Two address instruction invalid!");
582 DestPhysReg = MI->getOperand(1).getAllocatedRegNum();
583
Chris Lattnerd5725632003-05-12 03:54:14 +0000584 liberatePhysReg(MBB, I, DestPhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000585 assignVirtToPhysReg(DestVirtReg, DestPhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000586 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000587 DestPhysReg = getReg(MBB, I, DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000588 }
Chris Lattnerd5725632003-05-12 03:54:14 +0000589 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000590 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
591 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000592
593 if (!DisableKill) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000594 // If this instruction defines any registers that are immediately dead,
595 // kill them now.
596 //
597 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
Chris Lattnerd5725632003-05-12 03:54:14 +0000598 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000599 unsigned VirtReg = KI->second;
Chris Lattnerd5725632003-05-12 03:54:14 +0000600 unsigned PhysReg = VirtReg;
601 if (VirtReg >= MRegisterInfo::FirstVirtualRegister) {
602 std::map<unsigned, unsigned>::iterator I =
603 Virt2PhysRegMap.find(VirtReg);
604 assert(I != Virt2PhysRegMap.end());
605 PhysReg = I->second;
606 Virt2PhysRegMap.erase(I);
607 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000608
Chris Lattnerd5725632003-05-12 03:54:14 +0000609 if (PhysReg) {
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000610 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
611 << " [%reg" << VirtReg
612 << "] is never used, removing it frame live list\n");
Chris Lattnerd5725632003-05-12 03:54:14 +0000613 removePhysReg(PhysReg);
614 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000615 }
616 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000617 }
618
619 // Rewind the iterator to point to the first flow control instruction...
Chris Lattner3501fea2003-01-14 22:00:31 +0000620 const TargetInstrInfo &TII = TM->getInstrInfo();
Chris Lattner0416d2a2003-01-16 18:06:43 +0000621 I = MBB.end();
Chris Lattner3501fea2003-01-14 22:00:31 +0000622 while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000623 --I;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000624
625 // Spill all physical registers holding virtual registers now.
626 while (!PhysRegsUsed.empty())
Chris Lattner8c819452003-08-05 04:13:58 +0000627 if (unsigned VirtReg = PhysRegsUsed.begin()->second)
628 spillVirtReg(MBB, I, VirtReg, PhysRegsUsed.begin()->first);
629 else
630 removePhysReg(PhysRegsUsed.begin()->first);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000631
Chris Lattner91a452b2003-01-13 00:25:40 +0000632 for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
Chris Lattnerd5725632003-05-12 03:54:14 +0000633 E = Virt2PhysRegMap.end(); I != E; ++I)
Chris Lattner91a452b2003-01-13 00:25:40 +0000634 std::cerr << "Register still mapped: " << I->first << " -> "
Chris Lattnerd5725632003-05-12 03:54:14 +0000635 << I->second << "\n";
Chris Lattner91a452b2003-01-13 00:25:40 +0000636
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000637 assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
Chris Lattner128c2aa2003-08-17 18:01:15 +0000638
639 // Clear any physical register which appear live at the end of the basic
640 // block, but which do not hold any virtual registers. e.g., the stack
641 // pointer.
642 PhysRegsUseOrder.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000643}
644
Chris Lattner86c69a62002-12-17 03:16:10 +0000645
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000646/// runOnMachineFunction - Register allocate the whole function
647///
648bool RA::runOnMachineFunction(MachineFunction &Fn) {
649 DEBUG(std::cerr << "Machine Function " << "\n");
650 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000651 TM = &Fn.getTarget();
652 RegInfo = TM->getRegisterInfo();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000653
Chris Lattner82bee0f2002-12-18 08:14:26 +0000654 if (!DisableKill)
Chris Lattner91a452b2003-01-13 00:25:40 +0000655 LV = &getAnalysis<LiveVariables>();
Chris Lattner82bee0f2002-12-18 08:14:26 +0000656
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000657 // Loop over all of the basic blocks, eliminating virtual register references
658 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
659 MBB != MBBe; ++MBB)
660 AllocateBasicBlock(*MBB);
661
Chris Lattner580f9be2002-12-28 20:40:43 +0000662 StackSlotForVirtReg.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000663 VirtRegModified.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000664 return true;
665}
666
Brian Gaeke19df3872003-08-13 18:18:15 +0000667FunctionPass *createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000668 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000669}