| Brian Gaeke | e785e53 | 2004-02-25 19:28:19 +0000 | [diff] [blame] | 1 | //===- SparcV8.td - Describe the SparcV8 Target Machine ---------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by the LLVM research group and is distributed under |
| 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | // Get the target-independent interfaces which we are implementing... |
| 14 | // |
| 15 | include "../Target.td" |
| 16 | |
| 17 | //===----------------------------------------------------------------------===// |
| 18 | // Register File Description |
| 19 | //===----------------------------------------------------------------------===// |
| 20 | |
| 21 | include "SparcV8Reg.td" |
| 22 | include "SparcV8Instrs.td" |
| 23 | |
| 24 | def SparcV8InstrInfo : InstrInfo { |
| 25 | let PHIInst = PHI; |
| 26 | } |
| 27 | |
| 28 | def SparcV8 : Target { |
| 29 | // Pointers are 32-bits in size. |
| 30 | let PointerType = i32; |
| 31 | |
| 32 | // According to the Mach-O Runtime ABI, these regs are nonvolatile across |
| 33 | // calls: |
| 34 | let CalleeSavedRegisters = [R1, R13, R14, R15, R16, R17, R18, R19, |
| 35 | R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, F14, F15, |
| 36 | F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, |
| 37 | F30, F31, CR2, CR3, CR4]; |
| 38 | |
| 39 | // Pull in Instruction Info: |
| 40 | let InstructionSet = SparcV8InstrInfo; |
| 41 | } |