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Jia Liu31d157a2012-02-18 12:03:15 +00001//===-- ARMSubtarget.h - Define Subtarget for the ARM ----------*- C++ -*--===//
Evan Chenga8e29892007-01-19 07:51:42 +00002//
3// The LLVM Compiler Infrastructure
4//
Chris Lattner4ee451d2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Evan Chenga8e29892007-01-19 07:51:42 +00007//
8//===----------------------------------------------------------------------===//
9//
Evan Cheng5b1b44892011-07-01 21:01:15 +000010// This file declares the ARM specific subclass of TargetSubtargetInfo.
Evan Chenga8e29892007-01-19 07:51:42 +000011//
12//===----------------------------------------------------------------------===//
13
14#ifndef ARMSUBTARGET_H
15#define ARMSUBTARGET_H
16
Evan Cheng94ca42f2011-07-07 00:08:19 +000017#include "MCTargetDesc/ARMMCTargetDesc.h"
Evan Chengb72d2a92011-01-11 21:46:47 +000018#include "llvm/ADT/Triple.h"
Chandler Carrutha1514e22012-12-04 07:12:27 +000019#include "llvm/MC/MCInstrItineraries.h"
20#include "llvm/Target/TargetSubtargetInfo.h"
Evan Chenga8e29892007-01-19 07:51:42 +000021#include <string>
22
Evan Cheng94214702011-07-01 20:45:01 +000023#define GET_SUBTARGETINFO_HEADER
Evan Cheng385e9302011-07-01 22:36:09 +000024#include "ARMGenSubtargetInfo.inc"
Evan Cheng94214702011-07-01 20:45:01 +000025
Evan Chenga8e29892007-01-19 07:51:42 +000026namespace llvm {
Evan Chenge4e4ed32009-08-28 23:18:09 +000027class GlobalValue;
Evan Cheng0ddff1b2011-07-07 07:07:08 +000028class StringRef;
Evan Chenga8e29892007-01-19 07:51:42 +000029
Evan Cheng94214702011-07-01 20:45:01 +000030class ARMSubtarget : public ARMGenSubtargetInfo {
Evan Chenga8e29892007-01-19 07:51:42 +000031protected:
Evan Cheng3ef1c872010-09-10 01:29:16 +000032 enum ARMProcFamilyEnum {
Quentin Colombete0f1d712012-12-21 04:35:05 +000033 Others, CortexA5, CortexA8, CortexA9, CortexA15, CortexR5, Swift
Evan Cheng3ef1c872010-09-10 01:29:16 +000034 };
35
Evan Cheng3ef1c872010-09-10 01:29:16 +000036 /// ARMProcFamily - ARM processor family: Cortex-A8, Cortex-A9, and others.
37 ARMProcFamilyEnum ARMProcFamily;
38
Evan Cheng39dfb0f2011-07-07 03:55:05 +000039 /// HasV4TOps, HasV5TOps, HasV5TEOps, HasV6Ops, HasV6T2Ops, HasV7Ops -
40 /// Specify whether target support specific ARM ISA variants.
41 bool HasV4TOps;
42 bool HasV5TOps;
43 bool HasV5TEOps;
44 bool HasV6Ops;
45 bool HasV6T2Ops;
46 bool HasV7Ops;
47
Evan Chengbee78fe2012-04-11 05:33:07 +000048 /// HasVFPv2, HasVFPv3, HasVFPv4, HasNEON - Specify what
Anton Korobeynikov4b4e6222012-01-22 12:07:33 +000049 /// floating point ISAs are supported.
Evan Cheng39dfb0f2011-07-07 03:55:05 +000050 bool HasVFPv2;
51 bool HasVFPv3;
Anton Korobeynikov4b4e6222012-01-22 12:07:33 +000052 bool HasVFPv4;
Evan Cheng39dfb0f2011-07-07 03:55:05 +000053 bool HasNEON;
Evan Chenga8e29892007-01-19 07:51:42 +000054
David Goodwin1f0e4042009-08-05 16:01:19 +000055 /// UseNEONForSinglePrecisionFP - if the NEONFP attribute has been
56 /// specified. Use the method useNEONForSinglePrecisionFP() to
57 /// determine if NEON should actually be used.
David Goodwin42a83f22009-08-04 17:53:06 +000058 bool UseNEONForSinglePrecisionFP;
59
Bob Wilsoneb1641d2012-09-29 21:43:49 +000060 /// UseMulOps - True if non-microcoded fused integer multiply-add and
61 /// multiply-subtract instructions should be used.
62 bool UseMulOps;
63
Evan Cheng48575f62010-12-05 22:04:16 +000064 /// SlowFPVMLx - If the VFP2 / NEON instructions are available, indicates
65 /// whether the FP VML[AS] instructions are slow (if so, don't use them).
66 bool SlowFPVMLx;
Jim Grosbach26767372010-03-24 22:31:46 +000067
Evan Cheng463d3582011-03-31 19:38:48 +000068 /// HasVMLxForwarding - If true, NEON has special multiplier accumulator
69 /// forwarding to allow mul + mla being issued back to back.
70 bool HasVMLxForwarding;
71
Evan Cheng7a415992010-07-13 19:21:50 +000072 /// SlowFPBrcc - True if floating point compare + branch is slow.
73 bool SlowFPBrcc;
74
Evan Cheng4761a8d2011-07-07 19:09:06 +000075 /// InThumbMode - True if compiling for Thumb, false for ARM.
Evan Cheng963b03c2011-07-07 19:05:12 +000076 bool InThumbMode;
Anton Korobeynikov70459be2009-06-01 20:00:48 +000077
Evan Cheng94ca42f2011-07-07 00:08:19 +000078 /// HasThumb2 - True if Thumb2 instructions are supported.
79 bool HasThumb2;
Evan Chenga8e29892007-01-19 07:51:42 +000080
Andrew Trickd598bd32012-08-08 02:44:08 +000081 /// IsMClass - True if the subtarget belongs to the 'M' profile of CPUs -
James Molloyacad68d2011-09-28 14:21:38 +000082 /// v6m, v7m for example.
83 bool IsMClass;
84
Evan Cheng7b4d3112010-08-11 07:17:46 +000085 /// NoARM - True if subtarget does not support ARM mode execution.
86 bool NoARM;
87
David Goodwin0dad89f2009-09-30 00:10:16 +000088 /// PostRAScheduler - True if using post-register-allocation scheduler.
89 bool PostRAScheduler;
90
Evan Chenga8e29892007-01-19 07:51:42 +000091 /// IsR9Reserved - True if R9 is a not available as general purpose register.
92 bool IsR9Reserved;
Lauro Ramos Venancio3630e782007-02-13 19:52:28 +000093
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +000094 /// UseMovt - True if MOVT / MOVW pairs are used for materialization of 32-bit
95 /// imms (including global addresses).
96 bool UseMovt;
97
Bob Wilson6d2f9ce2011-10-07 17:17:49 +000098 /// SupportsTailCall - True if the OS supports tail call. The dynamic linker
99 /// must be able to synthesize call stubs for interworking between ARM and
100 /// Thumb.
101 bool SupportsTailCall;
102
Anton Korobeynikov631379e2010-03-14 18:42:38 +0000103 /// HasFP16 - True if subtarget supports half-precision FP (We support VFP+HF
104 /// only so far)
105 bool HasFP16;
106
Bob Wilson77f42b52010-10-12 16:22:47 +0000107 /// HasD16 - True if subtarget is limited to 16 double precision
108 /// FP registers for VFPv3.
109 bool HasD16;
110
Jim Grosbach29402132010-05-05 23:44:43 +0000111 /// HasHardwareDivide - True if subtarget supports [su]div
112 bool HasHardwareDivide;
113
Bob Wilsoneb1641d2012-09-29 21:43:49 +0000114 /// HasHardwareDivideInARM - True if subtarget supports [su]div in ARM mode
115 bool HasHardwareDivideInARM;
116
Jim Grosbach29402132010-05-05 23:44:43 +0000117 /// HasT2ExtractPack - True if subtarget supports thumb2 extract/pack
118 /// instructions.
119 bool HasT2ExtractPack;
120
Evan Cheng11db0682010-08-11 06:22:01 +0000121 /// HasDataBarrier - True if the subtarget supports DMB / DSB data barrier
122 /// instructions.
123 bool HasDataBarrier;
124
Evan Chenge44be632010-08-09 18:35:19 +0000125 /// Pref32BitThumb - If true, codegen would prefer 32-bit Thumb instructions
126 /// over 16-bit ones.
127 bool Pref32BitThumb;
128
Bob Wilson5dde8932011-04-19 18:11:49 +0000129 /// AvoidCPSRPartialUpdate - If true, codegen would avoid using instructions
130 /// that partially update CPSR and add false dependency on the previous
131 /// CPSR setting instruction.
132 bool AvoidCPSRPartialUpdate;
133
Evan Cheng139e4072012-12-20 19:59:30 +0000134 /// AvoidMOVsShifterOperand - If true, codegen should avoid using flag setting
135 /// movs with shifter operand (i.e. asr, lsl, lsr).
136 bool AvoidMOVsShifterOperand;
137
Evan Cheng4bfcd4a2012-02-28 18:51:51 +0000138 /// HasRAS - Some processors perform return stack prediction. CodeGen should
139 /// avoid issue "normal" call instructions to callees which do not return.
140 bool HasRAS;
141
Evan Chengdfed19f2010-11-03 06:34:55 +0000142 /// HasMPExtension - True if the subtarget supports Multiprocessing
143 /// extension (ARMv7 only).
144 bool HasMPExtension;
145
Jim Grosbachfcba5e62010-08-11 15:44:15 +0000146 /// FPOnlySP - If true, the floating point unit only supports single
147 /// precision.
148 bool FPOnlySP;
149
Bob Wilson02aba732010-09-28 04:09:35 +0000150 /// AllowsUnalignedMem - If true, the subtarget allows unaligned memory
151 /// accesses for some types. For details, see
152 /// ARMTargetLowering::allowsUnalignedMemoryAccesses().
153 bool AllowsUnalignedMem;
154
Jim Grosbacha7603982011-07-01 21:12:19 +0000155 /// Thumb2DSP - If true, the subtarget supports the v7 DSP (saturating arith
156 /// and such) instructions in Thumb2 code.
157 bool Thumb2DSP;
158
Evan Chenga8e29892007-01-19 07:51:42 +0000159 /// stackAlignment - The minimum alignment known to hold of the stack frame on
160 /// entry to the function and which must be maintained by every function.
161 unsigned stackAlignment;
162
Anton Korobeynikov41a02432009-05-23 19:50:50 +0000163 /// CPUString - String name of used CPU.
164 std::string CPUString;
165
Evan Chengb72d2a92011-01-11 21:46:47 +0000166 /// TargetTriple - What processor and OS we're targeting.
167 Triple TargetTriple;
168
Andrew Trickd43b5c92012-08-08 02:44:16 +0000169 /// SchedModel - Processor specific instruction costs.
170 const MCSchedModel *SchedModel;
171
Evan Cheng8557c2b2009-06-19 01:51:50 +0000172 /// Selected instruction itineraries (one entry per itinerary class.)
173 InstrItineraryData InstrItins;
Jim Grosbach764ab522009-08-11 15:33:49 +0000174
Evan Chenga8e29892007-01-19 07:51:42 +0000175 public:
Evan Cheng1a3771e2007-01-19 19:22:40 +0000176 enum {
177 isELF, isDarwin
178 } TargetType;
179
Lauro Ramos Venancio3630e782007-02-13 19:52:28 +0000180 enum {
181 ARM_ABI_APCS,
182 ARM_ABI_AAPCS // ARM EABI
183 } TargetABI;
184
Evan Chenga8e29892007-01-19 07:51:42 +0000185 /// This constructor initializes the data members to match that
Daniel Dunbar3be03402009-08-02 22:11:08 +0000186 /// of the specified triple.
Evan Chenga8e29892007-01-19 07:51:42 +0000187 ///
Evan Cheng276365d2011-06-30 01:53:36 +0000188 ARMSubtarget(const std::string &TT, const std::string &CPU,
Evan Cheng94ca42f2011-07-07 00:08:19 +0000189 const std::string &FS);
Evan Chenga8e29892007-01-19 07:51:42 +0000190
Dan Gohman707e0182008-04-12 04:36:06 +0000191 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
192 /// that still makes it profitable to inline the call.
Rafael Espindolae0703c82007-10-31 14:39:58 +0000193 unsigned getMaxInlineSizeThreshold() const {
Bob Wilson4d6113e2010-03-11 00:20:49 +0000194 // FIXME: For now, we don't lower memcpy's to loads / stores for Thumb1.
195 // Change this once Thumb1 ldmia / stmia support is added.
196 return isThumb1Only() ? 0 : 64;
Rafael Espindolae0703c82007-10-31 14:39:58 +0000197 }
Anton Korobeynikov6d7d2aa2009-05-23 19:51:43 +0000198 /// ParseSubtargetFeatures - Parses features string setting specified
Evan Chenga8e29892007-01-19 07:51:42 +0000199 /// subtarget options. Definition of function is auto generated by tblgen.
Evan Cheng0ddff1b2011-07-07 07:07:08 +0000200 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
Evan Chenga8e29892007-01-19 07:51:42 +0000201
Andrew Trick2da8bc82010-12-24 05:03:26 +0000202 void computeIssueWidth();
203
Evan Cheng39dfb0f2011-07-07 03:55:05 +0000204 bool hasV4TOps() const { return HasV4TOps; }
205 bool hasV5TOps() const { return HasV5TOps; }
206 bool hasV5TEOps() const { return HasV5TEOps; }
207 bool hasV6Ops() const { return HasV6Ops; }
208 bool hasV6T2Ops() const { return HasV6T2Ops; }
209 bool hasV7Ops() const { return HasV7Ops; }
Evan Chenga8e29892007-01-19 07:51:42 +0000210
Quentin Colombet8facb9e2012-11-29 19:48:01 +0000211 bool isCortexA5() const { return ARMProcFamily == CortexA5; }
Evan Cheng3ef1c872010-09-10 01:29:16 +0000212 bool isCortexA8() const { return ARMProcFamily == CortexA8; }
213 bool isCortexA9() const { return ARMProcFamily == CortexA9; }
Silviu Baranga616471d2012-09-13 15:05:10 +0000214 bool isCortexA15() const { return ARMProcFamily == CortexA15; }
Bob Wilsoneb1641d2012-09-29 21:43:49 +0000215 bool isSwift() const { return ARMProcFamily == Swift; }
Evan Cheng44ee4712011-11-09 01:57:03 +0000216 bool isCortexM3() const { return CPUString == "cortex-m3"; }
Silviu Baranga616471d2012-09-13 15:05:10 +0000217 bool isLikeA9() const { return isCortexA9() || isCortexA15(); }
Quentin Colombete0f1d712012-12-21 04:35:05 +0000218 bool isCortexR5() const { return ARMProcFamily == CortexR5; }
Evan Cheng3ef1c872010-09-10 01:29:16 +0000219
Evan Cheng7b4d3112010-08-11 07:17:46 +0000220 bool hasARMOps() const { return !NoARM; }
221
Evan Cheng39dfb0f2011-07-07 03:55:05 +0000222 bool hasVFP2() const { return HasVFPv2; }
223 bool hasVFP3() const { return HasVFPv3; }
Anton Korobeynikov4b4e6222012-01-22 12:07:33 +0000224 bool hasVFP4() const { return HasVFPv4; }
Evan Cheng39dfb0f2011-07-07 03:55:05 +0000225 bool hasNEON() const { return HasNEON; }
Jim Grosbach764ab522009-08-11 15:33:49 +0000226 bool useNEONForSinglePrecisionFP() const {
David Goodwin42a83f22009-08-04 17:53:06 +0000227 return hasNEON() && UseNEONForSinglePrecisionFP; }
Evan Cheng39dfb0f2011-07-07 03:55:05 +0000228
Shantonu Seneae216c2010-05-06 14:57:47 +0000229 bool hasDivide() const { return HasHardwareDivide; }
Bob Wilsoneb1641d2012-09-29 21:43:49 +0000230 bool hasDivideInARMMode() const { return HasHardwareDivideInARM; }
Shantonu Seneae216c2010-05-06 14:57:47 +0000231 bool hasT2ExtractPack() const { return HasT2ExtractPack; }
Evan Cheng11db0682010-08-11 06:22:01 +0000232 bool hasDataBarrier() const { return HasDataBarrier; }
Bob Wilsoneb1641d2012-09-29 21:43:49 +0000233 bool useMulOps() const { return UseMulOps; }
Evan Cheng48575f62010-12-05 22:04:16 +0000234 bool useFPVMLx() const { return !SlowFPVMLx; }
Evan Cheng463d3582011-03-31 19:38:48 +0000235 bool hasVMLxForwarding() const { return HasVMLxForwarding; }
Evan Cheng7a415992010-07-13 19:21:50 +0000236 bool isFPBrccSlow() const { return SlowFPBrcc; }
Jim Grosbachfcba5e62010-08-11 15:44:15 +0000237 bool isFPOnlySP() const { return FPOnlySP; }
Evan Chenge44be632010-08-09 18:35:19 +0000238 bool prefers32BitThumb() const { return Pref32BitThumb; }
Bob Wilson5dde8932011-04-19 18:11:49 +0000239 bool avoidCPSRPartialUpdate() const { return AvoidCPSRPartialUpdate; }
Evan Cheng139e4072012-12-20 19:59:30 +0000240 bool avoidMOVsShifterOperand() const { return AvoidMOVsShifterOperand; }
Evan Cheng4bfcd4a2012-02-28 18:51:51 +0000241 bool hasRAS() const { return HasRAS; }
Evan Chengdfed19f2010-11-03 06:34:55 +0000242 bool hasMPExtension() const { return HasMPExtension; }
Jim Grosbacha7603982011-07-01 21:12:19 +0000243 bool hasThumb2DSP() const { return Thumb2DSP; }
Jim Grosbach764ab522009-08-11 15:33:49 +0000244
Anton Korobeynikov631379e2010-03-14 18:42:38 +0000245 bool hasFP16() const { return HasFP16; }
Bob Wilson77f42b52010-10-12 16:22:47 +0000246 bool hasD16() const { return HasD16; }
Anton Korobeynikov631379e2010-03-14 18:42:38 +0000247
Evan Chengc8578942011-04-20 22:20:12 +0000248 const Triple &getTargetTriple() const { return TargetTriple; }
249
Evan Chengafff9412011-12-20 18:26:50 +0000250 bool isTargetIOS() const { return TargetTriple.getOS() == Triple::IOS; }
Daniel Dunbar912225e2011-04-19 21:14:45 +0000251 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
Nick Lewycky1fac6b52011-09-05 21:51:43 +0000252 bool isTargetNaCl() const {
Eli Benderskyf659c0d2012-12-04 18:37:26 +0000253 return TargetTriple.getOS() == Triple::NaCl;
Nick Lewycky1fac6b52011-09-05 21:51:43 +0000254 }
Evan Chengb72d2a92011-01-11 21:46:47 +0000255 bool isTargetELF() const { return !isTargetDarwin(); }
Evan Cheng1a3771e2007-01-19 19:22:40 +0000256
Lauro Ramos Venancio3630e782007-02-13 19:52:28 +0000257 bool isAPCS_ABI() const { return TargetABI == ARM_ABI_APCS; }
258 bool isAAPCS_ABI() const { return TargetABI == ARM_ABI_AAPCS; }
259
Evan Cheng963b03c2011-07-07 19:05:12 +0000260 bool isThumb() const { return InThumbMode; }
261 bool isThumb1Only() const { return InThumbMode && !HasThumb2; }
262 bool isThumb2() const { return InThumbMode && HasThumb2; }
Evan Cheng94ca42f2011-07-07 00:08:19 +0000263 bool hasThumb2() const { return HasThumb2; }
James Molloyacad68d2011-09-28 14:21:38 +0000264 bool isMClass() const { return IsMClass; }
265 bool isARClass() const { return !IsMClass; }
Evan Chenga8e29892007-01-19 07:51:42 +0000266
Evan Chenga8e29892007-01-19 07:51:42 +0000267 bool isR9Reserved() const { return IsR9Reserved; }
268
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000269 bool useMovt() const { return UseMovt && hasV6T2Ops(); }
Bob Wilson6d2f9ce2011-10-07 17:17:49 +0000270 bool supportsTailCall() const { return SupportsTailCall; }
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000271
Bob Wilson02aba732010-09-28 04:09:35 +0000272 bool allowsUnalignedMem() const { return AllowsUnalignedMem; }
273
Anton Korobeynikov41a02432009-05-23 19:50:50 +0000274 const std::string & getCPUString() const { return CPUString; }
Anton Korobeynikov5cdc3a92009-11-24 00:44:37 +0000275
Owen Anderson654d5442010-09-28 21:57:50 +0000276 unsigned getMispredictionPenalty() const;
Andrew Trick6e8f4c42010-12-24 04:28:06 +0000277
David Goodwinc2e8a7e2009-11-10 00:48:55 +0000278 /// enablePostRAScheduler - True at 'More' optimization.
David Goodwin4c3715c2009-10-22 23:19:17 +0000279 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
Evan Cheng5b1b44892011-07-01 21:01:15 +0000280 TargetSubtargetInfo::AntiDepBreakMode& Mode,
David Goodwin87d21b92009-11-13 19:52:48 +0000281 RegClassVector& CriticalPathRCs) const;
Anton Korobeynikov41a02432009-05-23 19:50:50 +0000282
Jim Grosbach764ab522009-08-11 15:33:49 +0000283 /// getInstrItins - Return the instruction itineraies based on subtarget
Evan Cheng8557c2b2009-06-19 01:51:50 +0000284 /// selection.
285 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
286
Evan Chenga8e29892007-01-19 07:51:42 +0000287 /// getStackAlignment - Returns the minimum alignment known to hold of the
288 /// stack frame on entry to the function and which must be maintained by every
289 /// function for this subtarget.
290 unsigned getStackAlignment() const { return stackAlignment; }
Evan Chenge4e4ed32009-08-28 23:18:09 +0000291
292 /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect
293 /// symbol.
Dan Gohman46510a72010-04-15 01:51:59 +0000294 bool GVIsIndirectSymbol(const GlobalValue *GV, Reloc::Model RelocM) const;
Evan Chenga8e29892007-01-19 07:51:42 +0000295};
296} // End llvm namespace
297
298#endif // ARMSUBTARGET_H