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Daniel Dunbar092a9dd2009-07-17 20:42:00 +00001//===-- X86AsmParser.cpp - Parse X86 assembly to MCInst instructions ------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
Chris Lattner98986712010-01-14 22:21:20 +000010#include "llvm/Target/TargetAsmParser.h"
Daniel Dunbar4cb1e132009-07-18 23:03:22 +000011#include "X86.h"
Daniel Dunbardbd692a2009-07-20 20:01:54 +000012#include "llvm/ADT/SmallVector.h"
Daniel Dunbar1b6c0602010-02-10 21:19:28 +000013#include "llvm/ADT/StringSwitch.h"
Daniel Dunbar16cdcb32009-07-28 22:40:46 +000014#include "llvm/ADT/Twine.h"
Kevin Enderby9c656452009-09-10 20:51:44 +000015#include "llvm/MC/MCStreamer.h"
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +000016#include "llvm/MC/MCExpr.h"
Daniel Dunbara027d222009-07-31 02:32:59 +000017#include "llvm/MC/MCInst.h"
Chris Lattnerc6ef2772010-01-22 01:44:57 +000018#include "llvm/MC/MCParser/MCAsmLexer.h"
19#include "llvm/MC/MCParser/MCAsmParser.h"
20#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
Daniel Dunbar16cdcb32009-07-28 22:40:46 +000021#include "llvm/Support/SourceMgr.h"
Daniel Dunbar092a9dd2009-07-17 20:42:00 +000022#include "llvm/Target/TargetRegistry.h"
23#include "llvm/Target/TargetAsmParser.h"
24using namespace llvm;
25
26namespace {
Benjamin Kramerc6b79ac2009-07-31 11:35:26 +000027struct X86Operand;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +000028
29class X86ATTAsmParser : public TargetAsmParser {
30 MCAsmParser &Parser;
31
Daniel Dunbarf98bc632010-03-18 20:06:02 +000032protected:
33 unsigned Is64Bit : 1;
34
Daniel Dunbar16cdcb32009-07-28 22:40:46 +000035private:
Daniel Dunbar16cdcb32009-07-28 22:40:46 +000036 MCAsmParser &getParser() const { return Parser; }
37
38 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
39
40 void Warning(SMLoc L, const Twine &Msg) { Parser.Warning(L, Msg); }
41
42 bool Error(SMLoc L, const Twine &Msg) { return Parser.Error(L, Msg); }
43
Chris Lattner29ef9a22010-01-15 18:51:29 +000044 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
Daniel Dunbar16cdcb32009-07-28 22:40:46 +000045
Chris Lattner309264d2010-01-15 18:44:13 +000046 X86Operand *ParseOperand();
Chris Lattnereef6d782010-04-17 18:56:34 +000047 X86Operand *ParseMemOperand(unsigned SegReg, SMLoc StartLoc);
Kevin Enderby9c656452009-09-10 20:51:44 +000048
49 bool ParseDirectiveWord(unsigned Size, SMLoc L);
50
Daniel Dunbarf98bc632010-03-18 20:06:02 +000051 void InstructionCleanup(MCInst &Inst);
52
Daniel Dunbar0e2771f2009-07-29 00:02:19 +000053 /// @name Auto-generated Match Functions
Daniel Dunbarc918d602010-05-04 16:12:42 +000054 /// {
Daniel Dunbar0e2771f2009-07-29 00:02:19 +000055
Chris Lattner98986712010-01-14 22:21:20 +000056 bool MatchInstruction(const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
Daniel Dunbar20927f22009-08-07 08:26:05 +000057 MCInst &Inst);
58
Daniel Dunbarc918d602010-05-04 16:12:42 +000059 bool MatchInstructionImpl(
60 const SmallVectorImpl<MCParsedAsmOperand*> &Operands, MCInst &Inst);
61
Daniel Dunbar0e2771f2009-07-29 00:02:19 +000062 /// }
Daniel Dunbar16cdcb32009-07-28 22:40:46 +000063
64public:
65 X86ATTAsmParser(const Target &T, MCAsmParser &_Parser)
66 : TargetAsmParser(T), Parser(_Parser) {}
67
Chris Lattnerf007e852010-01-14 21:32:45 +000068 virtual bool ParseInstruction(const StringRef &Name, SMLoc NameLoc,
Chris Lattner98986712010-01-14 22:21:20 +000069 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
Kevin Enderby9c656452009-09-10 20:51:44 +000070
71 virtual bool ParseDirective(AsmToken DirectiveID);
Daniel Dunbar16cdcb32009-07-28 22:40:46 +000072};
Daniel Dunbarf98bc632010-03-18 20:06:02 +000073
74class X86_32ATTAsmParser : public X86ATTAsmParser {
75public:
76 X86_32ATTAsmParser(const Target &T, MCAsmParser &_Parser)
77 : X86ATTAsmParser(T, _Parser) {
78 Is64Bit = false;
79 }
80};
81
82class X86_64ATTAsmParser : public X86ATTAsmParser {
83public:
84 X86_64ATTAsmParser(const Target &T, MCAsmParser &_Parser)
85 : X86ATTAsmParser(T, _Parser) {
86 Is64Bit = true;
87 }
88};
89
Chris Lattner37dfdec2009-07-29 06:33:53 +000090} // end anonymous namespace
91
Sean Callanane9b466d2010-01-23 00:40:33 +000092/// @name Auto-generated Match Functions
93/// {
94
Chris Lattnerb8d6e982010-02-09 00:34:28 +000095static unsigned MatchRegisterName(StringRef Name);
Sean Callanane9b466d2010-01-23 00:40:33 +000096
97/// }
Chris Lattner37dfdec2009-07-29 06:33:53 +000098
99namespace {
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000100
101/// X86Operand - Instances of this class represent a parsed X86 machine
102/// instruction.
Chris Lattner45220a82010-01-14 21:20:55 +0000103struct X86Operand : public MCParsedAsmOperand {
Chris Lattner1f19f0f2010-01-15 19:06:59 +0000104 enum KindTy {
Daniel Dunbar20927f22009-08-07 08:26:05 +0000105 Token,
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000106 Register,
107 Immediate,
108 Memory
109 } Kind;
110
Chris Lattner29ef9a22010-01-15 18:51:29 +0000111 SMLoc StartLoc, EndLoc;
112
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000113 union {
114 struct {
Daniel Dunbar20927f22009-08-07 08:26:05 +0000115 const char *Data;
116 unsigned Length;
117 } Tok;
118
119 struct {
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000120 unsigned RegNo;
121 } Reg;
122
123 struct {
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +0000124 const MCExpr *Val;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000125 } Imm;
126
127 struct {
128 unsigned SegReg;
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +0000129 const MCExpr *Disp;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000130 unsigned BaseReg;
131 unsigned IndexReg;
132 unsigned Scale;
133 } Mem;
Daniel Dunbardbd692a2009-07-20 20:01:54 +0000134 };
Daniel Dunbar092a9dd2009-07-17 20:42:00 +0000135
Chris Lattner0a3c5a52010-01-15 19:33:43 +0000136 X86Operand(KindTy K, SMLoc Start, SMLoc End)
Chris Lattner1f19f0f2010-01-15 19:06:59 +0000137 : Kind(K), StartLoc(Start), EndLoc(End) {}
Daniel Dunbarc918d602010-05-04 16:12:42 +0000138
Chris Lattner1f19f0f2010-01-15 19:06:59 +0000139 /// getStartLoc - Get the location of the first token of this operand.
140 SMLoc getStartLoc() const { return StartLoc; }
141 /// getEndLoc - Get the location of the last token of this operand.
142 SMLoc getEndLoc() const { return EndLoc; }
143
Daniel Dunbar20927f22009-08-07 08:26:05 +0000144 StringRef getToken() const {
145 assert(Kind == Token && "Invalid access!");
146 return StringRef(Tok.Data, Tok.Length);
147 }
Daniel Dunbarc918d602010-05-04 16:12:42 +0000148 void setTokenValue(StringRef Value) {
149 assert(Kind == Token && "Invalid access!");
150 Tok.Data = Value.data();
151 Tok.Length = Value.size();
152 }
Daniel Dunbar20927f22009-08-07 08:26:05 +0000153
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000154 unsigned getReg() const {
155 assert(Kind == Register && "Invalid access!");
156 return Reg.RegNo;
157 }
Daniel Dunbara2edbab2009-07-28 20:47:52 +0000158
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +0000159 const MCExpr *getImm() const {
Daniel Dunbar022e2a82009-07-31 20:53:16 +0000160 assert(Kind == Immediate && "Invalid access!");
161 return Imm.Val;
162 }
163
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +0000164 const MCExpr *getMemDisp() const {
Daniel Dunbar022e2a82009-07-31 20:53:16 +0000165 assert(Kind == Memory && "Invalid access!");
166 return Mem.Disp;
167 }
168 unsigned getMemSegReg() const {
169 assert(Kind == Memory && "Invalid access!");
170 return Mem.SegReg;
171 }
172 unsigned getMemBaseReg() const {
173 assert(Kind == Memory && "Invalid access!");
174 return Mem.BaseReg;
175 }
176 unsigned getMemIndexReg() const {
177 assert(Kind == Memory && "Invalid access!");
178 return Mem.IndexReg;
179 }
180 unsigned getMemScale() const {
181 assert(Kind == Memory && "Invalid access!");
182 return Mem.Scale;
183 }
184
Daniel Dunbara3741fa2009-08-08 07:50:56 +0000185 bool isToken() const {return Kind == Token; }
Daniel Dunbar20927f22009-08-07 08:26:05 +0000186
187 bool isImm() const { return Kind == Immediate; }
188
Daniel Dunbar5fe63382009-08-09 07:20:21 +0000189 bool isImmSExt8() const {
190 // Accept immediates which fit in 8 bits when sign extended, and
191 // non-absolute immediates.
192 if (!isImm())
193 return false;
194
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +0000195 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm())) {
196 int64_t Value = CE->getValue();
197 return Value == (int64_t) (int8_t) Value;
198 }
Daniel Dunbar5fe63382009-08-09 07:20:21 +0000199
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +0000200 return true;
Daniel Dunbar5fe63382009-08-09 07:20:21 +0000201 }
202
Daniel Dunbar20927f22009-08-07 08:26:05 +0000203 bool isMem() const { return Kind == Memory; }
204
Daniel Dunbarb834f5d2010-01-30 01:02:48 +0000205 bool isAbsMem() const {
206 return Kind == Memory && !getMemSegReg() && !getMemBaseReg() &&
Daniel Dunbar7b9147a2010-02-02 21:44:16 +0000207 !getMemIndexReg() && getMemScale() == 1;
Daniel Dunbarb834f5d2010-01-30 01:02:48 +0000208 }
209
Daniel Dunbarec2b1f12010-01-30 00:24:00 +0000210 bool isNoSegMem() const {
211 return Kind == Memory && !getMemSegReg();
212 }
213
Daniel Dunbar20927f22009-08-07 08:26:05 +0000214 bool isReg() const { return Kind == Register; }
215
Daniel Dunbar9c60f532010-02-13 00:17:21 +0000216 void addExpr(MCInst &Inst, const MCExpr *Expr) const {
217 // Add as immediates when possible.
218 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
219 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
220 else
221 Inst.addOperand(MCOperand::CreateExpr(Expr));
222 }
223
Daniel Dunbar5c468e32009-08-10 21:00:45 +0000224 void addRegOperands(MCInst &Inst, unsigned N) const {
Daniel Dunbar20927f22009-08-07 08:26:05 +0000225 assert(N == 1 && "Invalid number of operands!");
226 Inst.addOperand(MCOperand::CreateReg(getReg()));
227 }
228
Daniel Dunbar5c468e32009-08-10 21:00:45 +0000229 void addImmOperands(MCInst &Inst, unsigned N) const {
Daniel Dunbar20927f22009-08-07 08:26:05 +0000230 assert(N == 1 && "Invalid number of operands!");
Daniel Dunbar9c60f532010-02-13 00:17:21 +0000231 addExpr(Inst, getImm());
Daniel Dunbar20927f22009-08-07 08:26:05 +0000232 }
233
Daniel Dunbar5c468e32009-08-10 21:00:45 +0000234 void addImmSExt8Operands(MCInst &Inst, unsigned N) const {
Daniel Dunbar5fe63382009-08-09 07:20:21 +0000235 // FIXME: Support user customization of the render method.
236 assert(N == 1 && "Invalid number of operands!");
Daniel Dunbar9c60f532010-02-13 00:17:21 +0000237 addExpr(Inst, getImm());
Daniel Dunbar5fe63382009-08-09 07:20:21 +0000238 }
239
Daniel Dunbar5c468e32009-08-10 21:00:45 +0000240 void addMemOperands(MCInst &Inst, unsigned N) const {
Daniel Dunbarec2b1f12010-01-30 00:24:00 +0000241 assert((N == 5) && "Invalid number of operands!");
Daniel Dunbar20927f22009-08-07 08:26:05 +0000242 Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
243 Inst.addOperand(MCOperand::CreateImm(getMemScale()));
244 Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
Daniel Dunbar9c60f532010-02-13 00:17:21 +0000245 addExpr(Inst, getMemDisp());
Daniel Dunbarec2b1f12010-01-30 00:24:00 +0000246 Inst.addOperand(MCOperand::CreateReg(getMemSegReg()));
247 }
Daniel Dunbar20927f22009-08-07 08:26:05 +0000248
Daniel Dunbarb834f5d2010-01-30 01:02:48 +0000249 void addAbsMemOperands(MCInst &Inst, unsigned N) const {
250 assert((N == 1) && "Invalid number of operands!");
251 Inst.addOperand(MCOperand::CreateExpr(getMemDisp()));
252 }
253
Daniel Dunbarec2b1f12010-01-30 00:24:00 +0000254 void addNoSegMemOperands(MCInst &Inst, unsigned N) const {
255 assert((N == 4) && "Invalid number of operands!");
Daniel Dunbarec2b1f12010-01-30 00:24:00 +0000256 Inst.addOperand(MCOperand::CreateReg(getMemBaseReg()));
257 Inst.addOperand(MCOperand::CreateImm(getMemScale()));
258 Inst.addOperand(MCOperand::CreateReg(getMemIndexReg()));
Daniel Dunbar9c60f532010-02-13 00:17:21 +0000259 addExpr(Inst, getMemDisp());
Daniel Dunbar20927f22009-08-07 08:26:05 +0000260 }
261
Chris Lattnerb4307b32010-01-15 19:28:38 +0000262 static X86Operand *CreateToken(StringRef Str, SMLoc Loc) {
263 X86Operand *Res = new X86Operand(Token, Loc, Loc);
Chris Lattner29ef9a22010-01-15 18:51:29 +0000264 Res->Tok.Data = Str.data();
265 Res->Tok.Length = Str.size();
Daniel Dunbar20927f22009-08-07 08:26:05 +0000266 return Res;
267 }
268
Chris Lattner29ef9a22010-01-15 18:51:29 +0000269 static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc) {
Chris Lattner1f19f0f2010-01-15 19:06:59 +0000270 X86Operand *Res = new X86Operand(Register, StartLoc, EndLoc);
Chris Lattner29ef9a22010-01-15 18:51:29 +0000271 Res->Reg.RegNo = RegNo;
Chris Lattner29ef9a22010-01-15 18:51:29 +0000272 return Res;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000273 }
Daniel Dunbar20927f22009-08-07 08:26:05 +0000274
Chris Lattnerb4307b32010-01-15 19:28:38 +0000275 static X86Operand *CreateImm(const MCExpr *Val, SMLoc StartLoc, SMLoc EndLoc){
276 X86Operand *Res = new X86Operand(Immediate, StartLoc, EndLoc);
Chris Lattner29ef9a22010-01-15 18:51:29 +0000277 Res->Imm.Val = Val;
278 return Res;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000279 }
Daniel Dunbar20927f22009-08-07 08:26:05 +0000280
Daniel Dunbarb834f5d2010-01-30 01:02:48 +0000281 /// Create an absolute memory operand.
282 static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc,
283 SMLoc EndLoc) {
284 X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc);
285 Res->Mem.SegReg = 0;
286 Res->Mem.Disp = Disp;
287 Res->Mem.BaseReg = 0;
288 Res->Mem.IndexReg = 0;
Daniel Dunbar7b9147a2010-02-02 21:44:16 +0000289 Res->Mem.Scale = 1;
Daniel Dunbarb834f5d2010-01-30 01:02:48 +0000290 return Res;
291 }
292
293 /// Create a generalized memory operand.
Chris Lattner309264d2010-01-15 18:44:13 +0000294 static X86Operand *CreateMem(unsigned SegReg, const MCExpr *Disp,
295 unsigned BaseReg, unsigned IndexReg,
Chris Lattner0a3c5a52010-01-15 19:33:43 +0000296 unsigned Scale, SMLoc StartLoc, SMLoc EndLoc) {
Daniel Dunbarb834f5d2010-01-30 01:02:48 +0000297 // We should never just have a displacement, that should be parsed as an
298 // absolute memory operand.
Daniel Dunbarc09e4112009-07-31 22:22:54 +0000299 assert((SegReg || BaseReg || IndexReg) && "Invalid memory operand!");
300
Daniel Dunbar022e2a82009-07-31 20:53:16 +0000301 // The scale should always be one of {1,2,4,8}.
302 assert(((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) &&
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000303 "Invalid scale!");
Chris Lattner0a3c5a52010-01-15 19:33:43 +0000304 X86Operand *Res = new X86Operand(Memory, StartLoc, EndLoc);
Chris Lattner29ef9a22010-01-15 18:51:29 +0000305 Res->Mem.SegReg = SegReg;
306 Res->Mem.Disp = Disp;
307 Res->Mem.BaseReg = BaseReg;
308 Res->Mem.IndexReg = IndexReg;
309 Res->Mem.Scale = Scale;
310 return Res;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000311 }
312};
Daniel Dunbara3af3702009-07-20 18:55:04 +0000313
Chris Lattner37dfdec2009-07-29 06:33:53 +0000314} // end anonymous namespace.
Daniel Dunbara2edbab2009-07-28 20:47:52 +0000315
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000316
Chris Lattner29ef9a22010-01-15 18:51:29 +0000317bool X86ATTAsmParser::ParseRegister(unsigned &RegNo,
318 SMLoc &StartLoc, SMLoc &EndLoc) {
Chris Lattner23075742010-01-15 18:27:19 +0000319 RegNo = 0;
Sean Callanan18b83232010-01-19 21:44:56 +0000320 const AsmToken &TokPercent = Parser.getTok();
Kevin Enderby7b4608d2009-09-03 17:15:07 +0000321 assert(TokPercent.is(AsmToken::Percent) && "Invalid token kind!");
Chris Lattner29ef9a22010-01-15 18:51:29 +0000322 StartLoc = TokPercent.getLoc();
Sean Callananb9a25b72010-01-19 20:27:46 +0000323 Parser.Lex(); // Eat percent token.
Kevin Enderby7b4608d2009-09-03 17:15:07 +0000324
Sean Callanan18b83232010-01-19 21:44:56 +0000325 const AsmToken &Tok = Parser.getTok();
Kevin Enderby0d6cd002009-09-16 17:18:29 +0000326 if (Tok.isNot(AsmToken::Identifier))
327 return Error(Tok.getLoc(), "invalid register name");
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000328
Daniel Dunbar0e2771f2009-07-29 00:02:19 +0000329 // FIXME: Validate register for the current architecture; we have to do
330 // validation later, so maybe there is no need for this here.
Kevin Enderby7b4608d2009-09-03 17:15:07 +0000331 RegNo = MatchRegisterName(Tok.getString());
Chris Lattnerb8d6e982010-02-09 00:34:28 +0000332
Chris Lattnere16b0fc2010-02-09 00:49:22 +0000333 // Parse %st(1) and "%st" as "%st(0)"
334 if (RegNo == 0 && Tok.getString() == "st") {
335 RegNo = X86::ST0;
336 EndLoc = Tok.getLoc();
337 Parser.Lex(); // Eat 'st'
338
339 // Check to see if we have '(4)' after %st.
340 if (getLexer().isNot(AsmToken::LParen))
341 return false;
342 // Lex the paren.
343 getParser().Lex();
344
345 const AsmToken &IntTok = Parser.getTok();
346 if (IntTok.isNot(AsmToken::Integer))
347 return Error(IntTok.getLoc(), "expected stack index");
348 switch (IntTok.getIntVal()) {
349 case 0: RegNo = X86::ST0; break;
350 case 1: RegNo = X86::ST1; break;
351 case 2: RegNo = X86::ST2; break;
352 case 3: RegNo = X86::ST3; break;
353 case 4: RegNo = X86::ST4; break;
354 case 5: RegNo = X86::ST5; break;
355 case 6: RegNo = X86::ST6; break;
356 case 7: RegNo = X86::ST7; break;
357 default: return Error(IntTok.getLoc(), "invalid stack index");
358 }
359
360 if (getParser().Lex().isNot(AsmToken::RParen))
361 return Error(Parser.getTok().getLoc(), "expected ')'");
362
363 EndLoc = Tok.getLoc();
364 Parser.Lex(); // Eat ')'
365 return false;
366 }
367
Daniel Dunbar245f0582009-08-08 21:22:41 +0000368 if (RegNo == 0)
Daniel Dunbar0e2771f2009-07-29 00:02:19 +0000369 return Error(Tok.getLoc(), "invalid register name");
370
Chris Lattner29ef9a22010-01-15 18:51:29 +0000371 EndLoc = Tok.getLoc();
Sean Callananb9a25b72010-01-19 20:27:46 +0000372 Parser.Lex(); // Eat identifier token.
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000373 return false;
Daniel Dunbar092a9dd2009-07-17 20:42:00 +0000374}
375
Chris Lattner309264d2010-01-15 18:44:13 +0000376X86Operand *X86ATTAsmParser::ParseOperand() {
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000377 switch (getLexer().getKind()) {
378 default:
Chris Lattnereef6d782010-04-17 18:56:34 +0000379 // Parse a memory operand with no segment register.
380 return ParseMemOperand(0, Parser.getTok().getLoc());
Chris Lattner23075742010-01-15 18:27:19 +0000381 case AsmToken::Percent: {
Chris Lattnereef6d782010-04-17 18:56:34 +0000382 // Read the register.
Chris Lattner23075742010-01-15 18:27:19 +0000383 unsigned RegNo;
Chris Lattner29ef9a22010-01-15 18:51:29 +0000384 SMLoc Start, End;
385 if (ParseRegister(RegNo, Start, End)) return 0;
Chris Lattnereef6d782010-04-17 18:56:34 +0000386
387 // If this is a segment register followed by a ':', then this is the start
388 // of a memory reference, otherwise this is a normal register reference.
389 if (getLexer().isNot(AsmToken::Colon))
390 return X86Operand::CreateReg(RegNo, Start, End);
391
392
393 getParser().Lex(); // Eat the colon.
394 return ParseMemOperand(RegNo, Start);
Chris Lattner23075742010-01-15 18:27:19 +0000395 }
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000396 case AsmToken::Dollar: {
397 // $42 -> immediate.
Sean Callanan18b83232010-01-19 21:44:56 +0000398 SMLoc Start = Parser.getTok().getLoc(), End;
Sean Callananb9a25b72010-01-19 20:27:46 +0000399 Parser.Lex();
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +0000400 const MCExpr *Val;
Chris Lattner54482b42010-01-15 19:39:23 +0000401 if (getParser().ParseExpression(Val, End))
Chris Lattner309264d2010-01-15 18:44:13 +0000402 return 0;
Chris Lattnerb4307b32010-01-15 19:28:38 +0000403 return X86Operand::CreateImm(Val, Start, End);
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000404 }
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000405 }
Daniel Dunbardbd692a2009-07-20 20:01:54 +0000406}
407
Chris Lattnereef6d782010-04-17 18:56:34 +0000408/// ParseMemOperand: segment: disp(basereg, indexreg, scale). The '%ds:' prefix
409/// has already been parsed if present.
410X86Operand *X86ATTAsmParser::ParseMemOperand(unsigned SegReg, SMLoc MemStart) {
411
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000412 // We have to disambiguate a parenthesized expression "(4+5)" from the start
413 // of a memory operand with a missing displacement "(%ebx)" or "(,%eax)". The
Chris Lattner75f265f2010-01-24 01:07:33 +0000414 // only way to do this without lookahead is to eat the '(' and see what is
415 // after it.
Daniel Dunbar8c2eebe2009-08-31 08:08:38 +0000416 const MCExpr *Disp = MCConstantExpr::Create(0, getParser().getContext());
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000417 if (getLexer().isNot(AsmToken::LParen)) {
Chris Lattner54482b42010-01-15 19:39:23 +0000418 SMLoc ExprEnd;
419 if (getParser().ParseExpression(Disp, ExprEnd)) return 0;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000420
421 // After parsing the base expression we could either have a parenthesized
422 // memory address or not. If not, return now. If so, eat the (.
423 if (getLexer().isNot(AsmToken::LParen)) {
Daniel Dunbarc09e4112009-07-31 22:22:54 +0000424 // Unless we have a segment register, treat this as an immediate.
Chris Lattner309264d2010-01-15 18:44:13 +0000425 if (SegReg == 0)
Daniel Dunbarb834f5d2010-01-30 01:02:48 +0000426 return X86Operand::CreateMem(Disp, MemStart, ExprEnd);
Chris Lattner0a3c5a52010-01-15 19:33:43 +0000427 return X86Operand::CreateMem(SegReg, Disp, 0, 0, 1, MemStart, ExprEnd);
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000428 }
429
430 // Eat the '('.
Sean Callananb9a25b72010-01-19 20:27:46 +0000431 Parser.Lex();
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000432 } else {
433 // Okay, we have a '('. We don't know if this is an expression or not, but
434 // so we have to eat the ( to see beyond it.
Sean Callanan18b83232010-01-19 21:44:56 +0000435 SMLoc LParenLoc = Parser.getTok().getLoc();
Sean Callananb9a25b72010-01-19 20:27:46 +0000436 Parser.Lex(); // Eat the '('.
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000437
Kevin Enderby7b4608d2009-09-03 17:15:07 +0000438 if (getLexer().is(AsmToken::Percent) || getLexer().is(AsmToken::Comma)) {
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000439 // Nothing to do here, fall into the code below with the '(' part of the
440 // memory operand consumed.
441 } else {
Chris Lattnerb4307b32010-01-15 19:28:38 +0000442 SMLoc ExprEnd;
443
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000444 // It must be an parenthesized expression, parse it now.
Chris Lattnerb4307b32010-01-15 19:28:38 +0000445 if (getParser().ParseParenExpression(Disp, ExprEnd))
Chris Lattner309264d2010-01-15 18:44:13 +0000446 return 0;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000447
448 // After parsing the base expression we could either have a parenthesized
449 // memory address or not. If not, return now. If so, eat the (.
450 if (getLexer().isNot(AsmToken::LParen)) {
Daniel Dunbarc09e4112009-07-31 22:22:54 +0000451 // Unless we have a segment register, treat this as an immediate.
Chris Lattner309264d2010-01-15 18:44:13 +0000452 if (SegReg == 0)
Daniel Dunbarb834f5d2010-01-30 01:02:48 +0000453 return X86Operand::CreateMem(Disp, LParenLoc, ExprEnd);
Chris Lattner0a3c5a52010-01-15 19:33:43 +0000454 return X86Operand::CreateMem(SegReg, Disp, 0, 0, 1, MemStart, ExprEnd);
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000455 }
456
457 // Eat the '('.
Sean Callananb9a25b72010-01-19 20:27:46 +0000458 Parser.Lex();
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000459 }
460 }
461
462 // If we reached here, then we just ate the ( of the memory operand. Process
463 // the rest of the memory operand.
Daniel Dunbar022e2a82009-07-31 20:53:16 +0000464 unsigned BaseReg = 0, IndexReg = 0, Scale = 1;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000465
Chris Lattner29ef9a22010-01-15 18:51:29 +0000466 if (getLexer().is(AsmToken::Percent)) {
467 SMLoc L;
468 if (ParseRegister(BaseReg, L, L)) return 0;
469 }
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000470
471 if (getLexer().is(AsmToken::Comma)) {
Sean Callananb9a25b72010-01-19 20:27:46 +0000472 Parser.Lex(); // Eat the comma.
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000473
474 // Following the comma we should have either an index register, or a scale
475 // value. We don't support the later form, but we want to parse it
476 // correctly.
477 //
478 // Not that even though it would be completely consistent to support syntax
479 // like "1(%eax,,1)", the assembler doesn't.
Kevin Enderby7b4608d2009-09-03 17:15:07 +0000480 if (getLexer().is(AsmToken::Percent)) {
Chris Lattner29ef9a22010-01-15 18:51:29 +0000481 SMLoc L;
482 if (ParseRegister(IndexReg, L, L)) return 0;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000483
484 if (getLexer().isNot(AsmToken::RParen)) {
485 // Parse the scale amount:
486 // ::= ',' [scale-expression]
Chris Lattner309264d2010-01-15 18:44:13 +0000487 if (getLexer().isNot(AsmToken::Comma)) {
Sean Callanan18b83232010-01-19 21:44:56 +0000488 Error(Parser.getTok().getLoc(),
Chris Lattner309264d2010-01-15 18:44:13 +0000489 "expected comma in scale expression");
490 return 0;
491 }
Sean Callananb9a25b72010-01-19 20:27:46 +0000492 Parser.Lex(); // Eat the comma.
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000493
494 if (getLexer().isNot(AsmToken::RParen)) {
Sean Callanan18b83232010-01-19 21:44:56 +0000495 SMLoc Loc = Parser.getTok().getLoc();
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000496
497 int64_t ScaleVal;
498 if (getParser().ParseAbsoluteExpression(ScaleVal))
Chris Lattner309264d2010-01-15 18:44:13 +0000499 return 0;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000500
501 // Validate the scale amount.
Chris Lattner309264d2010-01-15 18:44:13 +0000502 if (ScaleVal != 1 && ScaleVal != 2 && ScaleVal != 4 && ScaleVal != 8){
503 Error(Loc, "scale factor in address must be 1, 2, 4 or 8");
504 return 0;
505 }
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000506 Scale = (unsigned)ScaleVal;
507 }
508 }
509 } else if (getLexer().isNot(AsmToken::RParen)) {
510 // Otherwise we have the unsupported form of a scale amount without an
511 // index.
Sean Callanan18b83232010-01-19 21:44:56 +0000512 SMLoc Loc = Parser.getTok().getLoc();
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000513
514 int64_t Value;
515 if (getParser().ParseAbsoluteExpression(Value))
Chris Lattner309264d2010-01-15 18:44:13 +0000516 return 0;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000517
Chris Lattner309264d2010-01-15 18:44:13 +0000518 Error(Loc, "cannot have scale factor without index register");
519 return 0;
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000520 }
521 }
522
523 // Ok, we've eaten the memory operand, verify we have a ')' and eat it too.
Chris Lattner309264d2010-01-15 18:44:13 +0000524 if (getLexer().isNot(AsmToken::RParen)) {
Sean Callanan18b83232010-01-19 21:44:56 +0000525 Error(Parser.getTok().getLoc(), "unexpected token in memory operand");
Chris Lattner309264d2010-01-15 18:44:13 +0000526 return 0;
527 }
Sean Callanan18b83232010-01-19 21:44:56 +0000528 SMLoc MemEnd = Parser.getTok().getLoc();
Sean Callananb9a25b72010-01-19 20:27:46 +0000529 Parser.Lex(); // Eat the ')'.
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000530
Chris Lattner0a3c5a52010-01-15 19:33:43 +0000531 return X86Operand::CreateMem(SegReg, Disp, BaseReg, IndexReg, Scale,
532 MemStart, MemEnd);
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000533}
534
Chris Lattner98986712010-01-14 22:21:20 +0000535bool X86ATTAsmParser::
536ParseInstruction(const StringRef &Name, SMLoc NameLoc,
537 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
Dan Gohmane5e4ff92010-05-20 16:16:00 +0000538 // The various flavors of pushf and popf use Requires<In32BitMode> and
539 // Requires<In64BitMode>, but the assembler doesn't yet implement that.
540 // For now, just do a manual check to prevent silent misencoding.
541 if (Is64Bit) {
542 if (Name == "popfl")
543 return Error(NameLoc, "popfl cannot be encoded in 64-bit mode");
544 else if (Name == "pushfl")
545 return Error(NameLoc, "pushfl cannot be encoded in 64-bit mode");
546 } else {
547 if (Name == "popfq")
548 return Error(NameLoc, "popfq cannot be encoded in 32-bit mode");
549 else if (Name == "pushfq")
550 return Error(NameLoc, "pushfq cannot be encoded in 32-bit mode");
551 }
552
Daniel Dunbar1b6c0602010-02-10 21:19:28 +0000553 // FIXME: Hack to recognize "sal..." and "rep..." for now. We need a way to
554 // represent alternative syntaxes in the .td file, without requiring
555 // instruction duplication.
556 StringRef PatchedName = StringSwitch<StringRef>(Name)
557 .Case("sal", "shl")
558 .Case("salb", "shlb")
559 .Case("sall", "shll")
560 .Case("salq", "shlq")
561 .Case("salw", "shlw")
562 .Case("repe", "rep")
563 .Case("repz", "rep")
564 .Case("repnz", "repne")
Dan Gohmane5e4ff92010-05-20 16:16:00 +0000565 .Case("pushf", Is64Bit ? "pushfq" : "pushfl")
566 .Case("popf", Is64Bit ? "popfq" : "popfl")
Daniel Dunbar1b6c0602010-02-10 21:19:28 +0000567 .Default(Name);
568 Operands.push_back(X86Operand::CreateToken(PatchedName, NameLoc));
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000569
570 if (getLexer().isNot(AsmToken::EndOfStatement)) {
Daniel Dunbar0db68f42009-08-11 05:00:25 +0000571
572 // Parse '*' modifier.
573 if (getLexer().is(AsmToken::Star)) {
Sean Callanan18b83232010-01-19 21:44:56 +0000574 SMLoc Loc = Parser.getTok().getLoc();
Chris Lattnerb4307b32010-01-15 19:28:38 +0000575 Operands.push_back(X86Operand::CreateToken("*", Loc));
Sean Callananb9a25b72010-01-19 20:27:46 +0000576 Parser.Lex(); // Eat the star.
Daniel Dunbar0db68f42009-08-11 05:00:25 +0000577 }
578
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000579 // Read the first operand.
Chris Lattner309264d2010-01-15 18:44:13 +0000580 if (X86Operand *Op = ParseOperand())
581 Operands.push_back(Op);
582 else
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000583 return true;
Chris Lattner309264d2010-01-15 18:44:13 +0000584
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000585 while (getLexer().is(AsmToken::Comma)) {
Sean Callananb9a25b72010-01-19 20:27:46 +0000586 Parser.Lex(); // Eat the comma.
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000587
588 // Parse and remember the operand.
Chris Lattner309264d2010-01-15 18:44:13 +0000589 if (X86Operand *Op = ParseOperand())
590 Operands.push_back(Op);
591 else
Daniel Dunbar16cdcb32009-07-28 22:40:46 +0000592 return true;
593 }
594 }
595
Daniel Dunbard5e77052010-03-13 00:47:29 +0000596 // FIXME: Hack to handle recognizing s{hr,ar,hl}? $1.
597 if ((Name.startswith("shr") || Name.startswith("sar") ||
598 Name.startswith("shl")) &&
599 Operands.size() == 3 &&
600 static_cast<X86Operand*>(Operands[1])->isImm() &&
601 isa<MCConstantExpr>(static_cast<X86Operand*>(Operands[1])->getImm()) &&
Daniel Dunbarf2de13f2010-03-20 22:36:38 +0000602 cast<MCConstantExpr>(static_cast<X86Operand*>(Operands[1])->getImm())->getValue() == 1) {
603 delete Operands[1];
Daniel Dunbard5e77052010-03-13 00:47:29 +0000604 Operands.erase(Operands.begin() + 1);
Daniel Dunbarf2de13f2010-03-20 22:36:38 +0000605 }
Daniel Dunbard5e77052010-03-13 00:47:29 +0000606
Chris Lattner98986712010-01-14 22:21:20 +0000607 return false;
Daniel Dunbara3af3702009-07-20 18:55:04 +0000608}
609
Kevin Enderby9c656452009-09-10 20:51:44 +0000610bool X86ATTAsmParser::ParseDirective(AsmToken DirectiveID) {
611 StringRef IDVal = DirectiveID.getIdentifier();
612 if (IDVal == ".word")
613 return ParseDirectiveWord(2, DirectiveID.getLoc());
614 return true;
615}
616
617/// ParseDirectiveWord
618/// ::= .word [ expression (, expression)* ]
619bool X86ATTAsmParser::ParseDirectiveWord(unsigned Size, SMLoc L) {
620 if (getLexer().isNot(AsmToken::EndOfStatement)) {
621 for (;;) {
622 const MCExpr *Value;
623 if (getParser().ParseExpression(Value))
624 return true;
625
Chris Lattneraaec2052010-01-19 19:46:13 +0000626 getParser().getStreamer().EmitValue(Value, Size, 0 /*addrspace*/);
Kevin Enderby9c656452009-09-10 20:51:44 +0000627
628 if (getLexer().is(AsmToken::EndOfStatement))
629 break;
630
631 // FIXME: Improve diagnostic.
632 if (getLexer().isNot(AsmToken::Comma))
633 return Error(L, "unexpected token in directive");
Sean Callananb9a25b72010-01-19 20:27:46 +0000634 Parser.Lex();
Kevin Enderby9c656452009-09-10 20:51:44 +0000635 }
636 }
637
Sean Callananb9a25b72010-01-19 20:27:46 +0000638 Parser.Lex();
Kevin Enderby9c656452009-09-10 20:51:44 +0000639 return false;
640}
641
Chris Lattnerb5505d02010-05-13 00:02:47 +0000642/// LowerMOffset - Lower an 'moffset' form of an instruction, which just has a
643/// imm operand, to having "rm" or "mr" operands with the offset in the disp
644/// field.
645static void LowerMOffset(MCInst &Inst, unsigned Opc, unsigned RegNo,
646 bool isMR) {
647 MCOperand Disp = Inst.getOperand(0);
648
649 // Start over with an empty instruction.
650 Inst = MCInst();
651 Inst.setOpcode(Opc);
652
653 if (!isMR)
654 Inst.addOperand(MCOperand::CreateReg(RegNo));
655
656 // Add the mem operand.
657 Inst.addOperand(MCOperand::CreateReg(0)); // Segment
658 Inst.addOperand(MCOperand::CreateImm(1)); // Scale
659 Inst.addOperand(MCOperand::CreateReg(0)); // IndexReg
660 Inst.addOperand(Disp); // Displacement
661 Inst.addOperand(MCOperand::CreateReg(0)); // BaseReg
662
663 if (isMR)
664 Inst.addOperand(MCOperand::CreateReg(RegNo));
665}
666
Daniel Dunbarf98bc632010-03-18 20:06:02 +0000667// FIXME: Custom X86 cleanup function to implement a temporary hack to handle
668// matching INCL/DECL correctly for x86_64. This needs to be replaced by a
669// proper mechanism for supporting (ambiguous) feature dependent instructions.
670void X86ATTAsmParser::InstructionCleanup(MCInst &Inst) {
671 if (!Is64Bit) return;
672
673 switch (Inst.getOpcode()) {
674 case X86::DEC16r: Inst.setOpcode(X86::DEC64_16r); break;
675 case X86::DEC16m: Inst.setOpcode(X86::DEC64_16m); break;
676 case X86::DEC32r: Inst.setOpcode(X86::DEC64_32r); break;
677 case X86::DEC32m: Inst.setOpcode(X86::DEC64_32m); break;
678 case X86::INC16r: Inst.setOpcode(X86::INC64_16r); break;
679 case X86::INC16m: Inst.setOpcode(X86::INC64_16m); break;
680 case X86::INC32r: Inst.setOpcode(X86::INC64_32r); break;
681 case X86::INC32m: Inst.setOpcode(X86::INC64_32m); break;
Chris Lattnerb5505d02010-05-13 00:02:47 +0000682
683 // moffset instructions are x86-32 only.
684 case X86::MOV8o8a: LowerMOffset(Inst, X86::MOV8rm , X86::AL , false); break;
685 case X86::MOV16o16a: LowerMOffset(Inst, X86::MOV16rm, X86::AX , false); break;
686 case X86::MOV32o32a: LowerMOffset(Inst, X86::MOV32rm, X86::EAX, false); break;
687 case X86::MOV8ao8: LowerMOffset(Inst, X86::MOV8mr , X86::AL , true); break;
688 case X86::MOV16ao16: LowerMOffset(Inst, X86::MOV16mr, X86::AX , true); break;
689 case X86::MOV32ao32: LowerMOffset(Inst, X86::MOV32mr, X86::EAX, true); break;
Daniel Dunbarf98bc632010-03-18 20:06:02 +0000690 }
691}
692
Daniel Dunbarc918d602010-05-04 16:12:42 +0000693bool
694X86ATTAsmParser::MatchInstruction(const SmallVectorImpl<MCParsedAsmOperand*>
695 &Operands,
696 MCInst &Inst) {
697 // First, try a direct match.
698 if (!MatchInstructionImpl(Operands, Inst))
699 return false;
700
701 // Ignore anything which is obviously not a suffix match.
702 if (Operands.size() == 0)
703 return true;
704 X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
705 if (!Op->isToken() || Op->getToken().size() > 15)
706 return true;
707
708 // FIXME: Ideally, we would only attempt suffix matches for things which are
709 // valid prefixes, and we could just infer the right unambiguous
710 // type. However, that requires substantially more matcher support than the
711 // following hack.
712
713 // Change the operand to point to a temporary token.
714 char Tmp[16];
715 StringRef Base = Op->getToken();
716 memcpy(Tmp, Base.data(), Base.size());
717 Op->setTokenValue(StringRef(Tmp, Base.size() + 1));
718
719 // Check for the various suffix matches.
720 Tmp[Base.size()] = 'b';
721 bool MatchB = MatchInstructionImpl(Operands, Inst);
722 Tmp[Base.size()] = 'w';
723 bool MatchW = MatchInstructionImpl(Operands, Inst);
724 Tmp[Base.size()] = 'l';
725 bool MatchL = MatchInstructionImpl(Operands, Inst);
Daniel Dunbar04814492010-05-12 00:54:20 +0000726 Tmp[Base.size()] = 'q';
727 bool MatchQ = MatchInstructionImpl(Operands, Inst);
Daniel Dunbarc918d602010-05-04 16:12:42 +0000728
729 // Restore the old token.
730 Op->setTokenValue(Base);
731
732 // If exactly one matched, then we treat that as a successful match (and the
733 // instruction will already have been filled in correctly, since the failing
734 // matches won't have modified it).
Daniel Dunbar04814492010-05-12 00:54:20 +0000735 if (MatchB + MatchW + MatchL + MatchQ == 3)
Daniel Dunbarc918d602010-05-04 16:12:42 +0000736 return false;
737
Daniel Dunbarc918d602010-05-04 16:12:42 +0000738 // Otherwise, the match failed.
739 return true;
740}
741
742
Sean Callanane88f5522010-01-23 02:43:15 +0000743extern "C" void LLVMInitializeX86AsmLexer();
744
Daniel Dunbar092a9dd2009-07-17 20:42:00 +0000745// Force static initialization.
746extern "C" void LLVMInitializeX86AsmParser() {
Daniel Dunbarf98bc632010-03-18 20:06:02 +0000747 RegisterAsmParser<X86_32ATTAsmParser> X(TheX86_32Target);
748 RegisterAsmParser<X86_64ATTAsmParser> Y(TheX86_64Target);
Sean Callanane88f5522010-01-23 02:43:15 +0000749 LLVMInitializeX86AsmLexer();
Daniel Dunbar092a9dd2009-07-17 20:42:00 +0000750}
Daniel Dunbar0e2771f2009-07-29 00:02:19 +0000751
752#include "X86GenAsmMatcher.inc"