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Lang Hames233a60e2009-11-03 23:52:08 +00001//===---------------------- ProcessImplicitDefs.cpp -----------------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10#define DEBUG_TYPE "processimplicitdefs"
11
12#include "llvm/CodeGen/ProcessImplicitDefs.h"
13
14#include "llvm/ADT/DepthFirstIterator.h"
15#include "llvm/ADT/SmallSet.h"
16#include "llvm/Analysis/AliasAnalysis.h"
17#include "llvm/CodeGen/LiveVariables.h"
18#include "llvm/CodeGen/MachineInstr.h"
19#include "llvm/CodeGen/MachineRegisterInfo.h"
20#include "llvm/CodeGen/Passes.h"
21#include "llvm/Support/Debug.h"
22#include "llvm/Target/TargetInstrInfo.h"
23#include "llvm/Target/TargetRegisterInfo.h"
24
25
26using namespace llvm;
27
28char ProcessImplicitDefs::ID = 0;
Owen Anderson2ab36d32010-10-12 19:48:12 +000029INITIALIZE_PASS_BEGIN(ProcessImplicitDefs, "processimpdefs",
Cameron Zwarichdd061b32010-12-29 11:49:10 +000030 "Process Implicit Definitions", false, false)
Owen Anderson2ab36d32010-10-12 19:48:12 +000031INITIALIZE_PASS_DEPENDENCY(LiveVariables)
32INITIALIZE_PASS_END(ProcessImplicitDefs, "processimpdefs",
Cameron Zwarichdd061b32010-12-29 11:49:10 +000033 "Process Implicit Definitions", false, false)
Lang Hames233a60e2009-11-03 23:52:08 +000034
35void ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const {
36 AU.setPreservesCFG();
37 AU.addPreserved<AliasAnalysis>();
38 AU.addPreserved<LiveVariables>();
39 AU.addRequired<LiveVariables>();
40 AU.addPreservedID(MachineLoopInfoID);
41 AU.addPreservedID(MachineDominatorsID);
42 AU.addPreservedID(TwoAddressInstructionPassID);
43 AU.addPreservedID(PHIEliminationID);
44 MachineFunctionPass::getAnalysisUsage(AU);
45}
46
Evan Chengdb898092010-07-14 01:22:19 +000047bool
48ProcessImplicitDefs::CanTurnIntoImplicitDef(MachineInstr *MI,
49 unsigned Reg, unsigned OpIdx,
Evan Chengdb898092010-07-14 01:22:19 +000050 SmallSet<unsigned, 8> &ImpDefRegs) {
Jakob Stoklund Olesen273f7e42010-07-03 00:04:37 +000051 switch(OpIdx) {
Evan Chengdb898092010-07-14 01:22:19 +000052 case 1:
Jakob Stoklund Olesene8838d52012-01-25 23:36:27 +000053 return MI->isCopy() && (!MI->getOperand(0).readsReg() ||
Evan Chengdb898092010-07-14 01:22:19 +000054 ImpDefRegs.count(MI->getOperand(0).getReg()));
55 case 2:
Jakob Stoklund Olesene8838d52012-01-25 23:36:27 +000056 return MI->isSubregToReg() && (!MI->getOperand(0).readsReg() ||
Evan Chengdb898092010-07-14 01:22:19 +000057 ImpDefRegs.count(MI->getOperand(0).getReg()));
58 default: return false;
Jakob Stoklund Olesen273f7e42010-07-03 00:04:37 +000059 }
Lang Hames233a60e2009-11-03 23:52:08 +000060}
61
Evan Chengdb898092010-07-14 01:22:19 +000062static bool isUndefCopy(MachineInstr *MI, unsigned Reg,
Evan Chengdb898092010-07-14 01:22:19 +000063 SmallSet<unsigned, 8> &ImpDefRegs) {
64 if (MI->isCopy()) {
65 MachineOperand &MO0 = MI->getOperand(0);
66 MachineOperand &MO1 = MI->getOperand(1);
67 if (MO1.getReg() != Reg)
68 return false;
Jakob Stoklund Olesene8838d52012-01-25 23:36:27 +000069 if (!MO0.readsReg() || ImpDefRegs.count(MO0.getReg()))
Evan Chengdb898092010-07-14 01:22:19 +000070 return true;
71 return false;
72 }
Evan Chengdb898092010-07-14 01:22:19 +000073 return false;
74}
75
Lang Hames233a60e2009-11-03 23:52:08 +000076/// processImplicitDefs - Process IMPLICIT_DEF instructions and make sure
77/// there is one implicit_def for each use. Add isUndef marker to
78/// implicit_def defs and their uses.
79bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &fn) {
80
David Greene7530efb2010-01-05 01:24:28 +000081 DEBUG(dbgs() << "********** PROCESS IMPLICIT DEFS **********\n"
Lang Hames233a60e2009-11-03 23:52:08 +000082 << "********** Function: "
83 << ((Value*)fn.getFunction())->getName() << '\n');
84
85 bool Changed = false;
86
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +000087 TII = fn.getTarget().getInstrInfo();
88 TRI = fn.getTarget().getRegisterInfo();
89 MRI = &fn.getRegInfo();
90 LV = &getAnalysis<LiveVariables>();
Lang Hames233a60e2009-11-03 23:52:08 +000091
92 SmallSet<unsigned, 8> ImpDefRegs;
93 SmallVector<MachineInstr*, 8> ImpDefMIs;
Evan Chenge7c91952009-11-25 21:13:39 +000094 SmallVector<MachineInstr*, 4> RUses;
Lang Hames233a60e2009-11-03 23:52:08 +000095 SmallPtrSet<MachineBasicBlock*,16> Visited;
Evan Cheng285a7d52009-11-16 05:52:06 +000096 SmallPtrSet<MachineInstr*, 8> ModInsts;
Lang Hames233a60e2009-11-03 23:52:08 +000097
Evan Chenge7c91952009-11-25 21:13:39 +000098 MachineBasicBlock *Entry = fn.begin();
Lang Hames233a60e2009-11-03 23:52:08 +000099 for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*,16> >
100 DFI = df_ext_begin(Entry, Visited), E = df_ext_end(Entry, Visited);
101 DFI != E; ++DFI) {
102 MachineBasicBlock *MBB = *DFI;
103 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
104 I != E; ) {
105 MachineInstr *MI = &*I;
106 ++I;
Chris Lattner518bb532010-02-09 19:54:29 +0000107 if (MI->isImplicitDef()) {
Jakob Stoklund Olesene8838d52012-01-25 23:36:27 +0000108 ImpDefMIs.push_back(MI);
109 // Is this a sub-register read-modify-write?
110 if (MI->getOperand(0).readsReg())
Evan Cheng9cc9bfa2010-05-10 21:25:30 +0000111 continue;
Lang Hames233a60e2009-11-03 23:52:08 +0000112 unsigned Reg = MI->getOperand(0).getReg();
113 ImpDefRegs.insert(Reg);
114 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000115 for (const unsigned *SS = TRI->getSubRegisters(Reg); *SS; ++SS)
Lang Hames233a60e2009-11-03 23:52:08 +0000116 ImpDefRegs.insert(*SS);
117 }
Lang Hames233a60e2009-11-03 23:52:08 +0000118 continue;
119 }
120
Jakob Stoklund Olesened2185e2010-07-06 23:26:25 +0000121 // Eliminate %reg1032:sub<def> = COPY undef.
Jakob Stoklund Olesene8838d52012-01-25 23:36:27 +0000122 if (MI->isCopy() && MI->getOperand(0).readsReg()) {
Jakob Stoklund Olesened2185e2010-07-06 23:26:25 +0000123 MachineOperand &MO = MI->getOperand(1);
Evan Chengdb898092010-07-14 01:22:19 +0000124 if (MO.isUndef() || ImpDefRegs.count(MO.getReg())) {
Jakob Stoklund Olesened2185e2010-07-06 23:26:25 +0000125 if (MO.isKill()) {
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000126 LiveVariables::VarInfo& vi = LV->getVarInfo(MO.getReg());
Jakob Stoklund Olesened2185e2010-07-06 23:26:25 +0000127 vi.removeKill(MI);
128 }
Jakob Stoklund Olesenf6c69002011-07-28 21:38:51 +0000129 unsigned Reg = MI->getOperand(0).getReg();
Jakob Stoklund Olesened2185e2010-07-06 23:26:25 +0000130 MI->eraseFromParent();
131 Changed = true;
Jakob Stoklund Olesenf6c69002011-07-28 21:38:51 +0000132
133 // A REG_SEQUENCE may have been expanded into partial definitions.
134 // If this was the last one, mark Reg as implicitly defined.
135 if (TargetRegisterInfo::isVirtualRegister(Reg) && MRI->def_empty(Reg))
136 ImpDefRegs.insert(Reg);
Jakob Stoklund Olesened2185e2010-07-06 23:26:25 +0000137 continue;
138 }
139 }
140
Lang Hames233a60e2009-11-03 23:52:08 +0000141 bool ChangedToImpDef = false;
142 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
143 MachineOperand& MO = MI->getOperand(i);
Jakob Stoklund Olesene8838d52012-01-25 23:36:27 +0000144 if (!MO.isReg() || !MO.readsReg())
Lang Hames233a60e2009-11-03 23:52:08 +0000145 continue;
146 unsigned Reg = MO.getReg();
147 if (!Reg)
148 continue;
149 if (!ImpDefRegs.count(Reg))
150 continue;
151 // Use is a copy, just turn it into an implicit_def.
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000152 if (CanTurnIntoImplicitDef(MI, Reg, i, ImpDefRegs)) {
Lang Hames233a60e2009-11-03 23:52:08 +0000153 bool isKill = MO.isKill();
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000154 MI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));
Lang Hames233a60e2009-11-03 23:52:08 +0000155 for (int j = MI->getNumOperands() - 1, ee = 0; j > ee; --j)
156 MI->RemoveOperand(j);
157 if (isKill) {
158 ImpDefRegs.erase(Reg);
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000159 LiveVariables::VarInfo& vi = LV->getVarInfo(Reg);
Lang Hames233a60e2009-11-03 23:52:08 +0000160 vi.removeKill(MI);
161 }
162 ChangedToImpDef = true;
163 Changed = true;
164 break;
165 }
166
167 Changed = true;
168 MO.setIsUndef();
Jakob Stoklund Olesened2185e2010-07-06 23:26:25 +0000169 // This is a partial register redef of an implicit def.
170 // Make sure the whole register is defined by the instruction.
171 if (MO.isDef()) {
172 MI->addRegisterDefined(Reg);
173 continue;
174 }
Lang Hames233a60e2009-11-03 23:52:08 +0000175 if (MO.isKill() || MI->isRegTiedToDefOperand(i)) {
Jakob Stoklund Olesene8838d52012-01-25 23:36:27 +0000176 // Make sure other reads of Reg are also marked <undef>.
Lang Hames233a60e2009-11-03 23:52:08 +0000177 for (unsigned j = i+1; j != e; ++j) {
178 MachineOperand &MOJ = MI->getOperand(j);
Jakob Stoklund Olesene8838d52012-01-25 23:36:27 +0000179 if (MOJ.isReg() && MOJ.getReg() == Reg && MOJ.readsReg())
Lang Hames233a60e2009-11-03 23:52:08 +0000180 MOJ.setIsUndef();
181 }
182 ImpDefRegs.erase(Reg);
183 }
184 }
185
186 if (ChangedToImpDef) {
187 // Backtrack to process this new implicit_def.
188 --I;
189 } else {
190 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
191 MachineOperand& MO = MI->getOperand(i);
192 if (!MO.isReg() || !MO.isDef())
193 continue;
194 ImpDefRegs.erase(MO.getReg());
195 }
196 }
197 }
198
199 // Any outstanding liveout implicit_def's?
200 for (unsigned i = 0, e = ImpDefMIs.size(); i != e; ++i) {
201 MachineInstr *MI = ImpDefMIs[i];
202 unsigned Reg = MI->getOperand(0).getReg();
203 if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
204 !ImpDefRegs.count(Reg)) {
205 // Delete all "local" implicit_def's. That include those which define
206 // physical registers since they cannot be liveout.
207 MI->eraseFromParent();
208 Changed = true;
209 continue;
210 }
211
212 // If there are multiple defs of the same register and at least one
213 // is not an implicit_def, do not insert implicit_def's before the
214 // uses.
215 bool Skip = false;
Evan Cheng40ea0e22009-11-26 00:32:36 +0000216 SmallVector<MachineInstr*, 4> DeadImpDefs;
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000217 for (MachineRegisterInfo::def_iterator DI = MRI->def_begin(Reg),
218 DE = MRI->def_end(); DI != DE; ++DI) {
Evan Cheng40ea0e22009-11-26 00:32:36 +0000219 MachineInstr *DeadImpDef = &*DI;
Chris Lattner518bb532010-02-09 19:54:29 +0000220 if (!DeadImpDef->isImplicitDef()) {
Lang Hames233a60e2009-11-03 23:52:08 +0000221 Skip = true;
222 break;
223 }
Evan Cheng40ea0e22009-11-26 00:32:36 +0000224 DeadImpDefs.push_back(DeadImpDef);
Lang Hames233a60e2009-11-03 23:52:08 +0000225 }
226 if (Skip)
227 continue;
228
229 // The only implicit_def which we want to keep are those that are live
230 // out of its block.
Evan Cheng40ea0e22009-11-26 00:32:36 +0000231 for (unsigned j = 0, ee = DeadImpDefs.size(); j != ee; ++j)
232 DeadImpDefs[j]->eraseFromParent();
Lang Hames233a60e2009-11-03 23:52:08 +0000233 Changed = true;
234
Evan Chenge7c91952009-11-25 21:13:39 +0000235 // Process each use instruction once.
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000236 for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
237 UE = MRI->use_end(); UI != UE; ++UI) {
Jakob Stoklund Olesen8eea48a2010-02-15 22:03:29 +0000238 if (UI.getOperand().isUndef())
Lang Hames233a60e2009-11-03 23:52:08 +0000239 continue;
Jakob Stoklund Olesen8eea48a2010-02-15 22:03:29 +0000240 MachineInstr *RMI = &*UI;
Evan Chenge7c91952009-11-25 21:13:39 +0000241 if (ModInsts.insert(RMI))
242 RUses.push_back(RMI);
243 }
244
245 for (unsigned i = 0, e = RUses.size(); i != e; ++i) {
246 MachineInstr *RMI = RUses[i];
Lang Hames233a60e2009-11-03 23:52:08 +0000247
248 // Turn a copy use into an implicit_def.
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000249 if (isUndefCopy(RMI, Reg, ImpDefRegs)) {
250 RMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));
Evan Chenge7c91952009-11-25 21:13:39 +0000251
252 bool isKill = false;
253 SmallVector<unsigned, 4> Ops;
254 for (unsigned j = 0, ee = RMI->getNumOperands(); j != ee; ++j) {
255 MachineOperand &RRMO = RMI->getOperand(j);
256 if (RRMO.isReg() && RRMO.getReg() == Reg) {
257 Ops.push_back(j);
258 if (RRMO.isKill())
259 isKill = true;
260 }
261 }
262 // Leave the other operands along.
263 for (unsigned j = 0, ee = Ops.size(); j != ee; ++j) {
264 unsigned OpIdx = Ops[j];
265 RMI->RemoveOperand(OpIdx-j);
266 }
267
268 // Update LiveVariables varinfo if the instruction is a kill.
269 if (isKill) {
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000270 LiveVariables::VarInfo& vi = LV->getVarInfo(Reg);
Lang Hames79ac32d2009-11-16 02:07:31 +0000271 vi.removeKill(RMI);
272 }
Lang Hames233a60e2009-11-03 23:52:08 +0000273 continue;
274 }
275
Evan Chenge7c91952009-11-25 21:13:39 +0000276 // Replace Reg with a new vreg that's marked implicit.
Jakob Stoklund Olesencf03e352011-03-14 20:57:14 +0000277 const TargetRegisterClass* RC = MRI->getRegClass(Reg);
278 unsigned NewVReg = MRI->createVirtualRegister(RC);
Evan Chenge7c91952009-11-25 21:13:39 +0000279 bool isKill = true;
280 for (unsigned j = 0, ee = RMI->getNumOperands(); j != ee; ++j) {
281 MachineOperand &RRMO = RMI->getOperand(j);
282 if (RRMO.isReg() && RRMO.getReg() == Reg) {
283 RRMO.setReg(NewVReg);
284 RRMO.setIsUndef();
285 if (isKill) {
286 // Only the first operand of NewVReg is marked kill.
287 RRMO.setIsKill();
288 isKill = false;
289 }
290 }
291 }
Lang Hames233a60e2009-11-03 23:52:08 +0000292 }
Evan Chenge7c91952009-11-25 21:13:39 +0000293 RUses.clear();
Jakob Stoklund Olesene4d2d962010-02-04 18:46:28 +0000294 ModInsts.clear();
Lang Hames233a60e2009-11-03 23:52:08 +0000295 }
Lang Hames233a60e2009-11-03 23:52:08 +0000296 ImpDefRegs.clear();
297 ImpDefMIs.clear();
298 }
299
300 return Changed;
301}
302