| Dan Gohman | 9cec412 | 2009-09-08 15:45:00 +0000 | [diff] [blame] | 1 | ; RUN: opt -loop-unswitch %s -disable-output |
| 2 | |
| 3 | ; Loop unswitch should be able to unswitch these loops and |
| 4 | ; preserve LCSSA and LoopSimplify forms. |
| 5 | |
| 6 | target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64" |
| 7 | target triple = "armv6-apple-darwin9" |
| 8 | |
| Dan Gohman | 9cec412 | 2009-09-08 15:45:00 +0000 | [diff] [blame] | 9 | @delim1 = external global i32 ; <i32*> [#uses=1] |
| 10 | @delim2 = external global i32 ; <i32*> [#uses=1] |
| Dan Gohman | 9cec412 | 2009-09-08 15:45:00 +0000 | [diff] [blame] | 11 | |
| 12 | define arm_apcscc i32 @ineqn(i8* %s, i8* %p) nounwind readonly { |
| 13 | entry: |
| 14 | %0 = load i32* @delim1, align 4 ; <i32> [#uses=1] |
| 15 | %1 = load i32* @delim2, align 4 ; <i32> [#uses=1] |
| 16 | br label %bb8.outer |
| 17 | |
| 18 | bb: ; preds = %bb8 |
| 19 | %2 = icmp eq i8* %p_addr.0, %s ; <i1> [#uses=1] |
| 20 | br i1 %2, label %bb10, label %bb2 |
| 21 | |
| 22 | bb2: ; preds = %bb |
| 23 | %3 = getelementptr inbounds i8* %p_addr.0, i32 1 ; <i8*> [#uses=3] |
| 24 | switch i32 %ineq.0.ph, label %bb8.backedge [ |
| 25 | i32 0, label %bb3 |
| 26 | i32 1, label %bb6 |
| 27 | ] |
| 28 | |
| 29 | bb8.backedge: ; preds = %bb6, %bb5, %bb2 |
| 30 | br label %bb8 |
| 31 | |
| 32 | bb3: ; preds = %bb2 |
| 33 | %4 = icmp eq i32 %8, %0 ; <i1> [#uses=1] |
| 34 | br i1 %4, label %bb8.outer.loopexit, label %bb5 |
| 35 | |
| 36 | bb5: ; preds = %bb3 |
| 37 | br i1 %6, label %bb6, label %bb8.backedge |
| 38 | |
| 39 | bb6: ; preds = %bb5, %bb2 |
| 40 | %5 = icmp eq i32 %8, %1 ; <i1> [#uses=1] |
| 41 | br i1 %5, label %bb7, label %bb8.backedge |
| 42 | |
| 43 | bb7: ; preds = %bb6 |
| 44 | %.lcssa1 = phi i8* [ %3, %bb6 ] ; <i8*> [#uses=1] |
| 45 | br label %bb8.outer.backedge |
| 46 | |
| 47 | bb8.outer.backedge: ; preds = %bb8.outer.loopexit, %bb7 |
| 48 | %.lcssa2 = phi i8* [ %.lcssa1, %bb7 ], [ %.lcssa, %bb8.outer.loopexit ] ; <i8*> [#uses=1] |
| 49 | %ineq.0.ph.be = phi i32 [ 0, %bb7 ], [ 1, %bb8.outer.loopexit ] ; <i32> [#uses=1] |
| 50 | br label %bb8.outer |
| 51 | |
| 52 | bb8.outer.loopexit: ; preds = %bb3 |
| 53 | %.lcssa = phi i8* [ %3, %bb3 ] ; <i8*> [#uses=1] |
| 54 | br label %bb8.outer.backedge |
| 55 | |
| 56 | bb8.outer: ; preds = %bb8.outer.backedge, %entry |
| 57 | %ineq.0.ph = phi i32 [ 0, %entry ], [ %ineq.0.ph.be, %bb8.outer.backedge ] ; <i32> [#uses=3] |
| 58 | %p_addr.0.ph = phi i8* [ %p, %entry ], [ %.lcssa2, %bb8.outer.backedge ] ; <i8*> [#uses=1] |
| 59 | %6 = icmp eq i32 %ineq.0.ph, 1 ; <i1> [#uses=1] |
| 60 | br label %bb8 |
| 61 | |
| 62 | bb8: ; preds = %bb8.outer, %bb8.backedge |
| 63 | %p_addr.0 = phi i8* [ %p_addr.0.ph, %bb8.outer ], [ %3, %bb8.backedge ] ; <i8*> [#uses=3] |
| 64 | %7 = load i8* %p_addr.0, align 1 ; <i8> [#uses=2] |
| 65 | %8 = sext i8 %7 to i32 ; <i32> [#uses=2] |
| 66 | %9 = icmp eq i8 %7, 0 ; <i1> [#uses=1] |
| 67 | br i1 %9, label %bb10, label %bb |
| 68 | |
| 69 | bb10: ; preds = %bb8, %bb |
| 70 | %.0 = phi i32 [ %ineq.0.ph, %bb ], [ 0, %bb8 ] ; <i32> [#uses=1] |
| 71 | ret i32 %.0 |
| 72 | } |
| 73 | |
| Dan Gohman | 9cec412 | 2009-09-08 15:45:00 +0000 | [diff] [blame] | 74 | ; This is a simplified form of ineqn from above. It triggers some |
| 75 | ; different cases in the loop-unswitch code. |
| 76 | |
| 77 | define void @simplified_ineqn() nounwind readonly { |
| 78 | entry: |
| 79 | br label %bb8.outer |
| 80 | |
| 81 | bb8.outer: ; preds = %bb6, %bb2, %entry |
| 82 | %x = phi i32 [ 0, %entry ], [ 0, %bb6 ], [ 1, %bb2 ] ; <i32> [#uses=1] |
| 83 | br i1 undef, label %return, label %bb2 |
| 84 | |
| 85 | bb2: ; preds = %bb |
| 86 | switch i32 %x, label %bb6 [ |
| 87 | i32 0, label %bb8.outer |
| 88 | ] |
| 89 | |
| 90 | bb6: ; preds = %bb2 |
| 91 | br i1 undef, label %bb8.outer, label %bb2 |
| 92 | |
| 93 | return: ; preds = %bb8, %bb |
| 94 | ret void |
| 95 | } |