Dan Gohman | f17a25c | 2007-07-18 16:29:46 +0000 | [diff] [blame^] | 1 | //===- MipsInstrInfo.h - Mips Instruction Information -----------*- C++ -*-===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file was developed by Bruno Cardoso Lopes and is distributed under the |
| 6 | // University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // This file contains the Mips implementation of the TargetInstrInfo class. |
| 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef MIPSINSTRUCTIONINFO_H |
| 15 | #define MIPSINSTRUCTIONINFO_H |
| 16 | |
| 17 | #include "Mips.h" |
| 18 | #include "llvm/Target/TargetInstrInfo.h" |
| 19 | #include "MipsRegisterInfo.h" |
| 20 | |
| 21 | namespace llvm { |
| 22 | |
| 23 | class MipsInstrInfo : public TargetInstrInfo |
| 24 | { |
| 25 | MipsTargetMachine &TM; |
| 26 | const MipsRegisterInfo RI; |
| 27 | public: |
| 28 | MipsInstrInfo(MipsTargetMachine &TM); |
| 29 | |
| 30 | /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As |
| 31 | /// such, whenever a client has an instance of instruction info, it should |
| 32 | /// always be able to get register info as well (through this method). |
| 33 | /// |
| 34 | virtual const MRegisterInfo &getRegisterInfo() const { return RI; } |
| 35 | |
| 36 | /// Return true if the instruction is a register to register move and |
| 37 | /// leave the source and dest operands in the passed parameters. |
| 38 | /// |
| 39 | virtual bool isMoveInstr(const MachineInstr &MI, |
| 40 | unsigned &SrcReg, unsigned &DstReg) const; |
| 41 | |
| 42 | /// isLoadFromStackSlot - If the specified machine instruction is a direct |
| 43 | /// load from a stack slot, return the virtual or physical register number of |
| 44 | /// the destination along with the FrameIndex of the loaded stack slot. If |
| 45 | /// not, return 0. This predicate must return 0 if the instruction has |
| 46 | /// any side effects other than loading from the stack slot. |
| 47 | virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; |
| 48 | |
| 49 | /// isStoreToStackSlot - If the specified machine instruction is a direct |
| 50 | /// store to a stack slot, return the virtual or physical register number of |
| 51 | /// the source reg along with the FrameIndex of the loaded stack slot. If |
| 52 | /// not, return 0. This predicate must return 0 if the instruction has |
| 53 | /// any side effects other than storing to the stack slot. |
| 54 | virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; |
| 55 | |
| 56 | virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, |
| 57 | MachineBasicBlock *FBB, |
| 58 | const std::vector<MachineOperand> &Cond) const; |
| 59 | }; |
| 60 | |
| 61 | } |
| 62 | |
| 63 | #endif |