Blame - lib/CodeGen/SelectionDAG/TargetLowering.cpp - platform/external/llvm

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Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	1	//===-- TargetLowering.cpp - Implement the TargetLowering class -----------===//
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	2	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	3	// The LLVM Compiler Infrastructure
				4	//
Chris Lattner	4ee451d	2007-12-29 20:36:04 +0000	[diff] [blame]	5	// This file is distributed under the University of Illinois Open Source
				6	// License. See LICENSE.TXT for details.
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	7	//
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	8	//===----------------------------------------------------------------------===//
				9	//
				10	// This implements the TargetLowering class.
				11	//
				12	//===----------------------------------------------------------------------===//
				13
				14	#include "llvm/Target/TargetLowering.h"
Jakob Stoklund Olesen	e3ee49f	2012-05-04 02:19:22 +0000	[diff] [blame]	15	#include "llvm/ADT/BitVector.h"
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	16	#include "llvm/ADT/STLExtras.h"
Chandler Carruth	d04a8d4	2012-12-03 16:50:05 +0000	[diff] [blame]	17	#include "llvm/CodeGen/Analysis.h"
				18	#include "llvm/CodeGen/MachineFrameInfo.h"
				19	#include "llvm/CodeGen/MachineFunction.h"
				20	#include "llvm/CodeGen/MachineJumpTableInfo.h"
				21	#include "llvm/CodeGen/SelectionDAG.h"
Chandler Carruth	0b8c9a8	2013-01-02 11:36:10 +0000	[diff] [blame]	22	#include "llvm/IR/DataLayout.h"
				23	#include "llvm/IR/DerivedTypes.h"
				24	#include "llvm/IR/GlobalVariable.h"
Chandler Carruth	d04a8d4	2012-12-03 16:50:05 +0000	[diff] [blame]	25	#include "llvm/MC/MCAsmInfo.h"
				26	#include "llvm/MC/MCExpr.h"
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	27	#include "llvm/Support/CommandLine.h"
Torok Edwin	c25e758	2009-07-11 20:10:48 +0000	[diff] [blame]	28	#include "llvm/Support/ErrorHandling.h"
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	29	#include "llvm/Support/MathExtras.h"
Chandler Carruth	d04a8d4	2012-12-03 16:50:05 +0000	[diff] [blame]	30	#include "llvm/Target/TargetLoweringObjectFile.h"
				31	#include "llvm/Target/TargetMachine.h"
				32	#include "llvm/Target/TargetRegisterInfo.h"
Nick Lewycky	476b242	2010-12-19 20:43:38 +0000	[diff] [blame]	33	#include <cctype>
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	34	using namespace llvm;
				35
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	36	/// InitLibcallNames - Set default libcall names.
				37	///
Evan Cheng	79cca50	2007-01-12 22:51:10 +0000	[diff] [blame]	38	static void InitLibcallNames(const char **Names) {
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	39	Names[RTLIB::SHL_I16] = "__ashlhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	40	Names[RTLIB::SHL_I32] = "__ashlsi3";
				41	Names[RTLIB::SHL_I64] = "__ashldi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	42	Names[RTLIB::SHL_I128] = "__ashlti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	43	Names[RTLIB::SRL_I16] = "__lshrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	44	Names[RTLIB::SRL_I32] = "__lshrsi3";
				45	Names[RTLIB::SRL_I64] = "__lshrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	46	Names[RTLIB::SRL_I128] = "__lshrti3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	47	Names[RTLIB::SRA_I16] = "__ashrhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	48	Names[RTLIB::SRA_I32] = "__ashrsi3";
				49	Names[RTLIB::SRA_I64] = "__ashrdi3";
Duncan Sands	dddc629	2008-07-11 16:52:29 +0000	[diff] [blame]	50	Names[RTLIB::SRA_I128] = "__ashrti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	51	Names[RTLIB::MUL_I8] = "__mulqi3";
Anton Korobeynikov	c31642f	2009-05-03 13:14:08 +0000	[diff] [blame]	52	Names[RTLIB::MUL_I16] = "__mulhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	53	Names[RTLIB::MUL_I32] = "__mulsi3";
				54	Names[RTLIB::MUL_I64] = "__muldi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	55	Names[RTLIB::MUL_I128] = "__multi3";
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	56	Names[RTLIB::MULO_I32] = "__mulosi4";
				57	Names[RTLIB::MULO_I64] = "__mulodi4";
				58	Names[RTLIB::MULO_I128] = "__muloti4";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	59	Names[RTLIB::SDIV_I8] = "__divqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	60	Names[RTLIB::SDIV_I16] = "__divhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	61	Names[RTLIB::SDIV_I32] = "__divsi3";
				62	Names[RTLIB::SDIV_I64] = "__divdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	63	Names[RTLIB::SDIV_I128] = "__divti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	64	Names[RTLIB::UDIV_I8] = "__udivqi3";
Anton Korobeynikov	fb3f84f	2009-05-08 18:50:54 +0000	[diff] [blame]	65	Names[RTLIB::UDIV_I16] = "__udivhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	66	Names[RTLIB::UDIV_I32] = "__udivsi3";
				67	Names[RTLIB::UDIV_I64] = "__udivdi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	68	Names[RTLIB::UDIV_I128] = "__udivti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	69	Names[RTLIB::SREM_I8] = "__modqi3";
Anton Korobeynikov	813090c	2009-05-03 13:18:16 +0000	[diff] [blame]	70	Names[RTLIB::SREM_I16] = "__modhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	71	Names[RTLIB::SREM_I32] = "__modsi3";
				72	Names[RTLIB::SREM_I64] = "__moddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	73	Names[RTLIB::SREM_I128] = "__modti3";
Anton Korobeynikov	8983da7	2009-11-07 17:14:39 +0000	[diff] [blame]	74	Names[RTLIB::UREM_I8] = "__umodqi3";
Anton Korobeynikov	9fe9c8e	2009-05-03 13:19:57 +0000	[diff] [blame]	75	Names[RTLIB::UREM_I16] = "__umodhi3";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	76	Names[RTLIB::UREM_I32] = "__umodsi3";
				77	Names[RTLIB::UREM_I64] = "__umoddi3";
Duncan Sands	5ac319a	2008-07-10 15:35:05 +0000	[diff] [blame]	78	Names[RTLIB::UREM_I128] = "__umodti3";
Evan Cheng	8e23e81	2011-04-01 00:42:02 +0000	[diff] [blame]	79
				80	// These are generally not available.
				81	Names[RTLIB::SDIVREM_I8] = 0;
				82	Names[RTLIB::SDIVREM_I16] = 0;
				83	Names[RTLIB::SDIVREM_I32] = 0;
				84	Names[RTLIB::SDIVREM_I64] = 0;
				85	Names[RTLIB::SDIVREM_I128] = 0;
				86	Names[RTLIB::UDIVREM_I8] = 0;
				87	Names[RTLIB::UDIVREM_I16] = 0;
				88	Names[RTLIB::UDIVREM_I32] = 0;
				89	Names[RTLIB::UDIVREM_I64] = 0;
				90	Names[RTLIB::UDIVREM_I128] = 0;
				91
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	92	Names[RTLIB::NEG_I32] = "__negsi2";
				93	Names[RTLIB::NEG_I64] = "__negdi2";
				94	Names[RTLIB::ADD_F32] = "__addsf3";
				95	Names[RTLIB::ADD_F64] = "__adddf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	96	Names[RTLIB::ADD_F80] = "__addxf3";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	97	Names[RTLIB::ADD_F128] = "__addtf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	98	Names[RTLIB::ADD_PPCF128] = "__gcc_qadd";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	99	Names[RTLIB::SUB_F32] = "__subsf3";
				100	Names[RTLIB::SUB_F64] = "__subdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	101	Names[RTLIB::SUB_F80] = "__subxf3";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	102	Names[RTLIB::SUB_F128] = "__subtf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	103	Names[RTLIB::SUB_PPCF128] = "__gcc_qsub";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	104	Names[RTLIB::MUL_F32] = "__mulsf3";
				105	Names[RTLIB::MUL_F64] = "__muldf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	106	Names[RTLIB::MUL_F80] = "__mulxf3";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	107	Names[RTLIB::MUL_F128] = "__multf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	108	Names[RTLIB::MUL_PPCF128] = "__gcc_qmul";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	109	Names[RTLIB::DIV_F32] = "__divsf3";
				110	Names[RTLIB::DIV_F64] = "__divdf3";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	111	Names[RTLIB::DIV_F80] = "__divxf3";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	112	Names[RTLIB::DIV_F128] = "__divtf3";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	113	Names[RTLIB::DIV_PPCF128] = "__gcc_qdiv";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	114	Names[RTLIB::REM_F32] = "fmodf";
				115	Names[RTLIB::REM_F64] = "fmod";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	116	Names[RTLIB::REM_F80] = "fmodl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	117	Names[RTLIB::REM_F128] = "fmodl";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	118	Names[RTLIB::REM_PPCF128] = "fmodl";
Cameron Zwarich	3339084	2011-07-08 21:39:21 +0000	[diff] [blame]	119	Names[RTLIB::FMA_F32] = "fmaf";
				120	Names[RTLIB::FMA_F64] = "fma";
				121	Names[RTLIB::FMA_F80] = "fmal";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	122	Names[RTLIB::FMA_F128] = "fmal";
Cameron Zwarich	3339084	2011-07-08 21:39:21 +0000	[diff] [blame]	123	Names[RTLIB::FMA_PPCF128] = "fmal";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	124	Names[RTLIB::POWI_F32] = "__powisf2";
				125	Names[RTLIB::POWI_F64] = "__powidf2";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	126	Names[RTLIB::POWI_F80] = "__powixf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	127	Names[RTLIB::POWI_F128] = "__powitf2";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	128	Names[RTLIB::POWI_PPCF128] = "__powitf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	129	Names[RTLIB::SQRT_F32] = "sqrtf";
				130	Names[RTLIB::SQRT_F64] = "sqrt";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	131	Names[RTLIB::SQRT_F80] = "sqrtl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	132	Names[RTLIB::SQRT_F128] = "sqrtl";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	133	Names[RTLIB::SQRT_PPCF128] = "sqrtl";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	134	Names[RTLIB::LOG_F32] = "logf";
				135	Names[RTLIB::LOG_F64] = "log";
				136	Names[RTLIB::LOG_F80] = "logl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	137	Names[RTLIB::LOG_F128] = "logl";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	138	Names[RTLIB::LOG_PPCF128] = "logl";
				139	Names[RTLIB::LOG2_F32] = "log2f";
				140	Names[RTLIB::LOG2_F64] = "log2";
				141	Names[RTLIB::LOG2_F80] = "log2l";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	142	Names[RTLIB::LOG2_F128] = "log2l";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	143	Names[RTLIB::LOG2_PPCF128] = "log2l";
				144	Names[RTLIB::LOG10_F32] = "log10f";
				145	Names[RTLIB::LOG10_F64] = "log10";
				146	Names[RTLIB::LOG10_F80] = "log10l";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	147	Names[RTLIB::LOG10_F128] = "log10l";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	148	Names[RTLIB::LOG10_PPCF128] = "log10l";
				149	Names[RTLIB::EXP_F32] = "expf";
				150	Names[RTLIB::EXP_F64] = "exp";
				151	Names[RTLIB::EXP_F80] = "expl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	152	Names[RTLIB::EXP_F128] = "expl";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	153	Names[RTLIB::EXP_PPCF128] = "expl";
				154	Names[RTLIB::EXP2_F32] = "exp2f";
				155	Names[RTLIB::EXP2_F64] = "exp2";
				156	Names[RTLIB::EXP2_F80] = "exp2l";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	157	Names[RTLIB::EXP2_F128] = "exp2l";
Dale Johannesen	7794f2a	2008-09-04 00:47:13 +0000	[diff] [blame]	158	Names[RTLIB::EXP2_PPCF128] = "exp2l";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	159	Names[RTLIB::SIN_F32] = "sinf";
				160	Names[RTLIB::SIN_F64] = "sin";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	161	Names[RTLIB::SIN_F80] = "sinl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	162	Names[RTLIB::SIN_F128] = "sinl";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	163	Names[RTLIB::SIN_PPCF128] = "sinl";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	164	Names[RTLIB::COS_F32] = "cosf";
				165	Names[RTLIB::COS_F64] = "cos";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	166	Names[RTLIB::COS_F80] = "cosl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	167	Names[RTLIB::COS_F128] = "cosl";
Duncan Sands	007f984	2008-01-10 10:28:30 +0000	[diff] [blame]	168	Names[RTLIB::COS_PPCF128] = "cosl";
Dan Gohman	e54be10	2007-10-11 23:09:10 +0000	[diff] [blame]	169	Names[RTLIB::POW_F32] = "powf";
				170	Names[RTLIB::POW_F64] = "pow";
				171	Names[RTLIB::POW_F80] = "powl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	172	Names[RTLIB::POW_F128] = "powl";
Dan Gohman	e54be10	2007-10-11 23:09:10 +0000	[diff] [blame]	173	Names[RTLIB::POW_PPCF128] = "powl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	174	Names[RTLIB::CEIL_F32] = "ceilf";
				175	Names[RTLIB::CEIL_F64] = "ceil";
				176	Names[RTLIB::CEIL_F80] = "ceill";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	177	Names[RTLIB::CEIL_F128] = "ceill";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	178	Names[RTLIB::CEIL_PPCF128] = "ceill";
				179	Names[RTLIB::TRUNC_F32] = "truncf";
				180	Names[RTLIB::TRUNC_F64] = "trunc";
				181	Names[RTLIB::TRUNC_F80] = "truncl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	182	Names[RTLIB::TRUNC_F128] = "truncl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	183	Names[RTLIB::TRUNC_PPCF128] = "truncl";
				184	Names[RTLIB::RINT_F32] = "rintf";
				185	Names[RTLIB::RINT_F64] = "rint";
				186	Names[RTLIB::RINT_F80] = "rintl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	187	Names[RTLIB::RINT_F128] = "rintl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	188	Names[RTLIB::RINT_PPCF128] = "rintl";
				189	Names[RTLIB::NEARBYINT_F32] = "nearbyintf";
				190	Names[RTLIB::NEARBYINT_F64] = "nearbyint";
				191	Names[RTLIB::NEARBYINT_F80] = "nearbyintl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	192	Names[RTLIB::NEARBYINT_F128] = "nearbyintl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	193	Names[RTLIB::NEARBYINT_PPCF128] = "nearbyintl";
				194	Names[RTLIB::FLOOR_F32] = "floorf";
				195	Names[RTLIB::FLOOR_F64] = "floor";
				196	Names[RTLIB::FLOOR_F80] = "floorl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	197	Names[RTLIB::FLOOR_F128] = "floorl";
Dan Gohman	2bb1e3e	2008-08-21 18:38:14 +0000	[diff] [blame]	198	Names[RTLIB::FLOOR_PPCF128] = "floorl";
Duncan Sands	d2c817e	2010-03-14 21:08:40 +0000	[diff] [blame]	199	Names[RTLIB::COPYSIGN_F32] = "copysignf";
				200	Names[RTLIB::COPYSIGN_F64] = "copysign";
				201	Names[RTLIB::COPYSIGN_F80] = "copysignl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	202	Names[RTLIB::COPYSIGN_F128] = "copysignl";
Duncan Sands	d2c817e	2010-03-14 21:08:40 +0000	[diff] [blame]	203	Names[RTLIB::COPYSIGN_PPCF128] = "copysignl";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	204	Names[RTLIB::FPEXT_F64_F128] = "__extenddftf2";
				205	Names[RTLIB::FPEXT_F32_F128] = "__extendsftf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	206	Names[RTLIB::FPEXT_F32_F64] = "__extendsfdf2";
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	207	Names[RTLIB::FPEXT_F16_F32] = "__gnu_h2f_ieee";
				208	Names[RTLIB::FPROUND_F32_F16] = "__gnu_f2h_ieee";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	209	Names[RTLIB::FPROUND_F64_F32] = "__truncdfsf2";
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	210	Names[RTLIB::FPROUND_F80_F32] = "__truncxfsf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	211	Names[RTLIB::FPROUND_F128_F32] = "__trunctfsf2";
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	212	Names[RTLIB::FPROUND_PPCF128_F32] = "__trunctfsf2";
				213	Names[RTLIB::FPROUND_F80_F64] = "__truncxfdf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	214	Names[RTLIB::FPROUND_F128_F64] = "__trunctfdf2";
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	215	Names[RTLIB::FPROUND_PPCF128_F64] = "__trunctfdf2";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	216	Names[RTLIB::FPTOSINT_F32_I8] = "__fixsfqi";
				217	Names[RTLIB::FPTOSINT_F32_I16] = "__fixsfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	218	Names[RTLIB::FPTOSINT_F32_I32] = "__fixsfsi";
				219	Names[RTLIB::FPTOSINT_F32_I64] = "__fixsfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	220	Names[RTLIB::FPTOSINT_F32_I128] = "__fixsfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	221	Names[RTLIB::FPTOSINT_F64_I8] = "__fixdfqi";
				222	Names[RTLIB::FPTOSINT_F64_I16] = "__fixdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	223	Names[RTLIB::FPTOSINT_F64_I32] = "__fixdfsi";
				224	Names[RTLIB::FPTOSINT_F64_I64] = "__fixdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	225	Names[RTLIB::FPTOSINT_F64_I128] = "__fixdfti";
Duncan Sands	be1ad4d	2008-07-10 15:33:02 +0000	[diff] [blame]	226	Names[RTLIB::FPTOSINT_F80_I32] = "__fixxfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	227	Names[RTLIB::FPTOSINT_F80_I64] = "__fixxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	228	Names[RTLIB::FPTOSINT_F80_I128] = "__fixxfti";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	229	Names[RTLIB::FPTOSINT_F128_I32] = "__fixtfsi";
				230	Names[RTLIB::FPTOSINT_F128_I64] = "__fixtfdi";
				231	Names[RTLIB::FPTOSINT_F128_I128] = "__fixtfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	232	Names[RTLIB::FPTOSINT_PPCF128_I32] = "__fixtfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	233	Names[RTLIB::FPTOSINT_PPCF128_I64] = "__fixtfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	234	Names[RTLIB::FPTOSINT_PPCF128_I128] = "__fixtfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	235	Names[RTLIB::FPTOUINT_F32_I8] = "__fixunssfqi";
				236	Names[RTLIB::FPTOUINT_F32_I16] = "__fixunssfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	237	Names[RTLIB::FPTOUINT_F32_I32] = "__fixunssfsi";
				238	Names[RTLIB::FPTOUINT_F32_I64] = "__fixunssfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	239	Names[RTLIB::FPTOUINT_F32_I128] = "__fixunssfti";
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	240	Names[RTLIB::FPTOUINT_F64_I8] = "__fixunsdfqi";
				241	Names[RTLIB::FPTOUINT_F64_I16] = "__fixunsdfhi";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	242	Names[RTLIB::FPTOUINT_F64_I32] = "__fixunsdfsi";
				243	Names[RTLIB::FPTOUINT_F64_I64] = "__fixunsdfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	244	Names[RTLIB::FPTOUINT_F64_I128] = "__fixunsdfti";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	245	Names[RTLIB::FPTOUINT_F80_I32] = "__fixunsxfsi";
				246	Names[RTLIB::FPTOUINT_F80_I64] = "__fixunsxfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	247	Names[RTLIB::FPTOUINT_F80_I128] = "__fixunsxfti";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	248	Names[RTLIB::FPTOUINT_F128_I32] = "__fixunstfsi";
				249	Names[RTLIB::FPTOUINT_F128_I64] = "__fixunstfdi";
				250	Names[RTLIB::FPTOUINT_F128_I128] = "__fixunstfti";
Duncan Sands	041cde2	2008-06-25 20:24:48 +0000	[diff] [blame]	251	Names[RTLIB::FPTOUINT_PPCF128_I32] = "__fixunstfsi";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	252	Names[RTLIB::FPTOUINT_PPCF128_I64] = "__fixunstfdi";
Dan Gohman	a2e9485	2008-03-10 23:03:31 +0000	[diff] [blame]	253	Names[RTLIB::FPTOUINT_PPCF128_I128] = "__fixunstfti";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	254	Names[RTLIB::SINTTOFP_I32_F32] = "__floatsisf";
				255	Names[RTLIB::SINTTOFP_I32_F64] = "__floatsidf";
Duncan Sands	9bed0f5	2008-07-11 16:57:02 +0000	[diff] [blame]	256	Names[RTLIB::SINTTOFP_I32_F80] = "__floatsixf";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	257	Names[RTLIB::SINTTOFP_I32_F128] = "__floatsitf";
Duncan Sands	9bed0f5	2008-07-11 16:57:02 +0000	[diff] [blame]	258	Names[RTLIB::SINTTOFP_I32_PPCF128] = "__floatsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	259	Names[RTLIB::SINTTOFP_I64_F32] = "__floatdisf";
				260	Names[RTLIB::SINTTOFP_I64_F64] = "__floatdidf";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	261	Names[RTLIB::SINTTOFP_I64_F80] = "__floatdixf";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	262	Names[RTLIB::SINTTOFP_I64_F128] = "__floatditf";
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	263	Names[RTLIB::SINTTOFP_I64_PPCF128] = "__floatditf";
Dan Gohman	d91446d	2008-03-05 01:08:17 +0000	[diff] [blame]	264	Names[RTLIB::SINTTOFP_I128_F32] = "__floattisf";
				265	Names[RTLIB::SINTTOFP_I128_F64] = "__floattidf";
				266	Names[RTLIB::SINTTOFP_I128_F80] = "__floattixf";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	267	Names[RTLIB::SINTTOFP_I128_F128] = "__floattitf";
Dan Gohman	d91446d	2008-03-05 01:08:17 +0000	[diff] [blame]	268	Names[RTLIB::SINTTOFP_I128_PPCF128] = "__floattitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	269	Names[RTLIB::UINTTOFP_I32_F32] = "__floatunsisf";
				270	Names[RTLIB::UINTTOFP_I32_F64] = "__floatunsidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	271	Names[RTLIB::UINTTOFP_I32_F80] = "__floatunsixf";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	272	Names[RTLIB::UINTTOFP_I32_F128] = "__floatunsitf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	273	Names[RTLIB::UINTTOFP_I32_PPCF128] = "__floatunsitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	274	Names[RTLIB::UINTTOFP_I64_F32] = "__floatundisf";
				275	Names[RTLIB::UINTTOFP_I64_F64] = "__floatundidf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	276	Names[RTLIB::UINTTOFP_I64_F80] = "__floatundixf";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	277	Names[RTLIB::UINTTOFP_I64_F128] = "__floatunditf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	278	Names[RTLIB::UINTTOFP_I64_PPCF128] = "__floatunditf";
				279	Names[RTLIB::UINTTOFP_I128_F32] = "__floatuntisf";
				280	Names[RTLIB::UINTTOFP_I128_F64] = "__floatuntidf";
				281	Names[RTLIB::UINTTOFP_I128_F80] = "__floatuntixf";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	282	Names[RTLIB::UINTTOFP_I128_F128] = "__floatuntitf";
Duncan Sands	ac6cece	2008-07-11 17:00:14 +0000	[diff] [blame]	283	Names[RTLIB::UINTTOFP_I128_PPCF128] = "__floatuntitf";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	284	Names[RTLIB::OEQ_F32] = "__eqsf2";
				285	Names[RTLIB::OEQ_F64] = "__eqdf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	286	Names[RTLIB::OEQ_F128] = "__eqtf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	287	Names[RTLIB::UNE_F32] = "__nesf2";
				288	Names[RTLIB::UNE_F64] = "__nedf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	289	Names[RTLIB::UNE_F128] = "__netf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	290	Names[RTLIB::OGE_F32] = "__gesf2";
				291	Names[RTLIB::OGE_F64] = "__gedf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	292	Names[RTLIB::OGE_F128] = "__getf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	293	Names[RTLIB::OLT_F32] = "__ltsf2";
				294	Names[RTLIB::OLT_F64] = "__ltdf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	295	Names[RTLIB::OLT_F128] = "__lttf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	296	Names[RTLIB::OLE_F32] = "__lesf2";
				297	Names[RTLIB::OLE_F64] = "__ledf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	298	Names[RTLIB::OLE_F128] = "__letf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	299	Names[RTLIB::OGT_F32] = "__gtsf2";
				300	Names[RTLIB::OGT_F64] = "__gtdf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	301	Names[RTLIB::OGT_F128] = "__gttf2";
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	302	Names[RTLIB::UO_F32] = "__unordsf2";
				303	Names[RTLIB::UO_F64] = "__unorddf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	304	Names[RTLIB::UO_F128] = "__unordtf2";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	305	Names[RTLIB::O_F32] = "__unordsf2";
				306	Names[RTLIB::O_F64] = "__unorddf2";
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	307	Names[RTLIB::O_F128] = "__unordtf2";
Sanjiv Gupta	a114baa	2009-07-30 09:12:56 +0000	[diff] [blame]	308	Names[RTLIB::MEMCPY] = "memcpy";
				309	Names[RTLIB::MEMMOVE] = "memmove";
				310	Names[RTLIB::MEMSET] = "memset";
Duncan Sands	b0f1e17	2009-05-22 20:36:31 +0000	[diff] [blame]	311	Names[RTLIB::UNWIND_RESUME] = "_Unwind_Resume";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	312	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_1] = "__sync_val_compare_and_swap_1";
				313	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_2] = "__sync_val_compare_and_swap_2";
				314	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_4] = "__sync_val_compare_and_swap_4";
				315	Names[RTLIB::SYNC_VAL_COMPARE_AND_SWAP_8] = "__sync_val_compare_and_swap_8";
Jim Grosbach	ef6eb9c	2010-06-18 23:03:10 +0000	[diff] [blame]	316	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_1] = "__sync_lock_test_and_set_1";
				317	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_2] = "__sync_lock_test_and_set_2";
				318	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_4] = "__sync_lock_test_and_set_4";
				319	Names[RTLIB::SYNC_LOCK_TEST_AND_SET_8] = "__sync_lock_test_and_set_8";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	320	Names[RTLIB::SYNC_FETCH_AND_ADD_1] = "__sync_fetch_and_add_1";
				321	Names[RTLIB::SYNC_FETCH_AND_ADD_2] = "__sync_fetch_and_add_2";
				322	Names[RTLIB::SYNC_FETCH_AND_ADD_4] = "__sync_fetch_and_add_4";
				323	Names[RTLIB::SYNC_FETCH_AND_ADD_8] = "__sync_fetch_and_add_8";
				324	Names[RTLIB::SYNC_FETCH_AND_SUB_1] = "__sync_fetch_and_sub_1";
				325	Names[RTLIB::SYNC_FETCH_AND_SUB_2] = "__sync_fetch_and_sub_2";
				326	Names[RTLIB::SYNC_FETCH_AND_SUB_4] = "__sync_fetch_and_sub_4";
				327	Names[RTLIB::SYNC_FETCH_AND_SUB_8] = "__sync_fetch_and_sub_8";
				328	Names[RTLIB::SYNC_FETCH_AND_AND_1] = "__sync_fetch_and_and_1";
				329	Names[RTLIB::SYNC_FETCH_AND_AND_2] = "__sync_fetch_and_and_2";
				330	Names[RTLIB::SYNC_FETCH_AND_AND_4] = "__sync_fetch_and_and_4";
				331	Names[RTLIB::SYNC_FETCH_AND_AND_8] = "__sync_fetch_and_and_8";
				332	Names[RTLIB::SYNC_FETCH_AND_OR_1] = "__sync_fetch_and_or_1";
				333	Names[RTLIB::SYNC_FETCH_AND_OR_2] = "__sync_fetch_and_or_2";
				334	Names[RTLIB::SYNC_FETCH_AND_OR_4] = "__sync_fetch_and_or_4";
				335	Names[RTLIB::SYNC_FETCH_AND_OR_8] = "__sync_fetch_and_or_8";
				336	Names[RTLIB::SYNC_FETCH_AND_XOR_1] = "__sync_fetch_and_xor_1";
				337	Names[RTLIB::SYNC_FETCH_AND_XOR_2] = "__sync_fetch_and_xor_2";
Jim Grosbach	312b7c9	2011-10-14 15:53:48 +0000	[diff] [blame]	338	Names[RTLIB::SYNC_FETCH_AND_XOR_4] = "__sync_fetch_and_xor_4";
Jim Grosbach	e03262f	2010-06-18 21:43:38 +0000	[diff] [blame]	339	Names[RTLIB::SYNC_FETCH_AND_XOR_8] = "__sync_fetch_and_xor_8";
				340	Names[RTLIB::SYNC_FETCH_AND_NAND_1] = "__sync_fetch_and_nand_1";
				341	Names[RTLIB::SYNC_FETCH_AND_NAND_2] = "__sync_fetch_and_nand_2";
				342	Names[RTLIB::SYNC_FETCH_AND_NAND_4] = "__sync_fetch_and_nand_4";
				343	Names[RTLIB::SYNC_FETCH_AND_NAND_8] = "__sync_fetch_and_nand_8";
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	344	}
				345
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	346	/// InitLibcallCallingConvs - Set default libcall CallingConvs.
				347	///
				348	static void InitLibcallCallingConvs(CallingConv::ID *CCs) {
				349	for (int i = 0; i < RTLIB::UNKNOWN_LIBCALL; ++i) {
				350	CCs[i] = CallingConv::C;
				351	}
				352	}
				353
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	354	/// getFPEXT - Return the FPEXT__ value for the given types, or
				355	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	356	RTLIB::Libcall RTLIB::getFPEXT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	357	if (OpVT == MVT::f32) {
				358	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	359	return FPEXT_F32_F64;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	360	if (RetVT == MVT::f128)
				361	return FPEXT_F32_F128;
				362	} else if (OpVT == MVT::f64) {
				363	if (RetVT == MVT::f128)
				364	return FPEXT_F64_F128;
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	365	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	366
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	367	return UNKNOWN_LIBCALL;
				368	}
				369
				370	/// getFPROUND - Return the FPROUND__ value for the given types, or
				371	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	372	RTLIB::Libcall RTLIB::getFPROUND(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	373	if (RetVT == MVT::f32) {
				374	if (OpVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	375	return FPROUND_F64_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	376	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	377	return FPROUND_F80_F32;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	378	if (OpVT == MVT::f128)
				379	return FPROUND_F128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	380	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	381	return FPROUND_PPCF128_F32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	382	} else if (RetVT == MVT::f64) {
				383	if (OpVT == MVT::f80)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	384	return FPROUND_F80_F64;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	385	if (OpVT == MVT::f128)
				386	return FPROUND_F128_F64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	387	if (OpVT == MVT::ppcf128)
Bruno Cardoso Lopes	e36bfe6	2008-08-07 19:01:24 +0000	[diff] [blame]	388	return FPROUND_PPCF128_F64;
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	389	}
Anton Korobeynikov	927411b	2010-03-14 18:42:24 +0000	[diff] [blame]	390
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	391	return UNKNOWN_LIBCALL;
				392	}
				393
				394	/// getFPTOSINT - Return the FPTOSINT__ value for the given types, or
				395	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	396	RTLIB::Libcall RTLIB::getFPTOSINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	397	if (OpVT == MVT::f32) {
				398	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	399	return FPTOSINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	400	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	401	return FPTOSINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	402	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	403	return FPTOSINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	404	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	405	return FPTOSINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	406	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	407	return FPTOSINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	408	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	409	if (RetVT == MVT::i8)
				410	return FPTOSINT_F64_I8;
				411	if (RetVT == MVT::i16)
				412	return FPTOSINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	413	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	414	return FPTOSINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	415	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	416	return FPTOSINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	417	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	418	return FPTOSINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	419	} else if (OpVT == MVT::f80) {
				420	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	421	return FPTOSINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	422	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	423	return FPTOSINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	424	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	425	return FPTOSINT_F80_I128;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	426	} else if (OpVT == MVT::f128) {
				427	if (RetVT == MVT::i32)
				428	return FPTOSINT_F128_I32;
				429	if (RetVT == MVT::i64)
				430	return FPTOSINT_F128_I64;
				431	if (RetVT == MVT::i128)
				432	return FPTOSINT_F128_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	433	} else if (OpVT == MVT::ppcf128) {
				434	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	435	return FPTOSINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	436	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	437	return FPTOSINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	438	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	439	return FPTOSINT_PPCF128_I128;
				440	}
				441	return UNKNOWN_LIBCALL;
				442	}
				443
				444	/// getFPTOUINT - Return the FPTOUINT__ value for the given types, or
				445	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	446	RTLIB::Libcall RTLIB::getFPTOUINT(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	447	if (OpVT == MVT::f32) {
				448	if (RetVT == MVT::i8)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	449	return FPTOUINT_F32_I8;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	450	if (RetVT == MVT::i16)
Sanjiv Gupta	8aa207e	2009-06-16 09:03:58 +0000	[diff] [blame]	451	return FPTOUINT_F32_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	452	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	453	return FPTOUINT_F32_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	454	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	455	return FPTOUINT_F32_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	456	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	457	return FPTOUINT_F32_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	458	} else if (OpVT == MVT::f64) {
Anton Korobeynikov	de0118c	2010-03-26 21:32:14 +0000	[diff] [blame]	459	if (RetVT == MVT::i8)
				460	return FPTOUINT_F64_I8;
				461	if (RetVT == MVT::i16)
				462	return FPTOUINT_F64_I16;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	463	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	464	return FPTOUINT_F64_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	465	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	466	return FPTOUINT_F64_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	467	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	468	return FPTOUINT_F64_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	469	} else if (OpVT == MVT::f80) {
				470	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	471	return FPTOUINT_F80_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	472	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	473	return FPTOUINT_F80_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	474	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	475	return FPTOUINT_F80_I128;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	476	} else if (OpVT == MVT::f128) {
				477	if (RetVT == MVT::i32)
				478	return FPTOUINT_F128_I32;
				479	if (RetVT == MVT::i64)
				480	return FPTOUINT_F128_I64;
				481	if (RetVT == MVT::i128)
				482	return FPTOUINT_F128_I128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	483	} else if (OpVT == MVT::ppcf128) {
				484	if (RetVT == MVT::i32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	485	return FPTOUINT_PPCF128_I32;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	486	if (RetVT == MVT::i64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	487	return FPTOUINT_PPCF128_I64;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	488	if (RetVT == MVT::i128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	489	return FPTOUINT_PPCF128_I128;
				490	}
				491	return UNKNOWN_LIBCALL;
				492	}
				493
				494	/// getSINTTOFP - Return the SINTTOFP__ value for the given types, or
				495	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	496	RTLIB::Libcall RTLIB::getSINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	497	if (OpVT == MVT::i32) {
				498	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	499	return SINTTOFP_I32_F32;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	500	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	501	return SINTTOFP_I32_F64;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	502	if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	503	return SINTTOFP_I32_F80;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	504	if (RetVT == MVT::f128)
				505	return SINTTOFP_I32_F128;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	506	if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	507	return SINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	508	} else if (OpVT == MVT::i64) {
				509	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	510	return SINTTOFP_I64_F32;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	511	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	512	return SINTTOFP_I64_F64;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	513	if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	514	return SINTTOFP_I64_F80;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	515	if (RetVT == MVT::f128)
				516	return SINTTOFP_I64_F128;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	517	if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	518	return SINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	519	} else if (OpVT == MVT::i128) {
				520	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	521	return SINTTOFP_I128_F32;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	522	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	523	return SINTTOFP_I128_F64;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	524	if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	525	return SINTTOFP_I128_F80;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	526	if (RetVT == MVT::f128)
				527	return SINTTOFP_I128_F128;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	528	if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	529	return SINTTOFP_I128_PPCF128;
				530	}
				531	return UNKNOWN_LIBCALL;
				532	}
				533
				534	/// getUINTTOFP - Return the UINTTOFP__ value for the given types, or
				535	/// UNKNOWN_LIBCALL if there is none.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	536	RTLIB::Libcall RTLIB::getUINTTOFP(EVT OpVT, EVT RetVT) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	537	if (OpVT == MVT::i32) {
				538	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	539	return UINTTOFP_I32_F32;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	540	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	541	return UINTTOFP_I32_F64;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	542	if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	543	return UINTTOFP_I32_F80;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	544	if (RetVT == MVT::f128)
				545	return UINTTOFP_I32_F128;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	546	if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	547	return UINTTOFP_I32_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	548	} else if (OpVT == MVT::i64) {
				549	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	550	return UINTTOFP_I64_F32;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	551	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	552	return UINTTOFP_I64_F64;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	553	if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	554	return UINTTOFP_I64_F80;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	555	if (RetVT == MVT::f128)
				556	return UINTTOFP_I64_F128;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	557	if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	558	return UINTTOFP_I64_PPCF128;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	559	} else if (OpVT == MVT::i128) {
				560	if (RetVT == MVT::f32)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	561	return UINTTOFP_I128_F32;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	562	if (RetVT == MVT::f64)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	563	return UINTTOFP_I128_F64;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	564	if (RetVT == MVT::f80)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	565	return UINTTOFP_I128_F80;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	566	if (RetVT == MVT::f128)
				567	return UINTTOFP_I128_F128;
Craig Topper	a1b3c03	2012-12-19 06:39:17 +0000	[diff] [blame]	568	if (RetVT == MVT::ppcf128)
Duncan Sands	b2ff885	2008-07-17 02:36:29 +0000	[diff] [blame]	569	return UINTTOFP_I128_PPCF128;
				570	}
				571	return UNKNOWN_LIBCALL;
				572	}
				573
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	574	/// InitCmpLibcallCCs - Set default comparison libcall CC.
				575	///
				576	static void InitCmpLibcallCCs(ISD::CondCode *CCs) {
				577	memset(CCs, ISD::SETCC_INVALID, sizeof(ISD::CondCode)*RTLIB::UNKNOWN_LIBCALL);
				578	CCs[RTLIB::OEQ_F32] = ISD::SETEQ;
				579	CCs[RTLIB::OEQ_F64] = ISD::SETEQ;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	580	CCs[RTLIB::OEQ_F128] = ISD::SETEQ;
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	581	CCs[RTLIB::UNE_F32] = ISD::SETNE;
				582	CCs[RTLIB::UNE_F64] = ISD::SETNE;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	583	CCs[RTLIB::UNE_F128] = ISD::SETNE;
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	584	CCs[RTLIB::OGE_F32] = ISD::SETGE;
				585	CCs[RTLIB::OGE_F64] = ISD::SETGE;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	586	CCs[RTLIB::OGE_F128] = ISD::SETGE;
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	587	CCs[RTLIB::OLT_F32] = ISD::SETLT;
				588	CCs[RTLIB::OLT_F64] = ISD::SETLT;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	589	CCs[RTLIB::OLT_F128] = ISD::SETLT;
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	590	CCs[RTLIB::OLE_F32] = ISD::SETLE;
				591	CCs[RTLIB::OLE_F64] = ISD::SETLE;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	592	CCs[RTLIB::OLE_F128] = ISD::SETLE;
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	593	CCs[RTLIB::OGT_F32] = ISD::SETGT;
				594	CCs[RTLIB::OGT_F64] = ISD::SETGT;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	595	CCs[RTLIB::OGT_F128] = ISD::SETGT;
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	596	CCs[RTLIB::UO_F32] = ISD::SETNE;
				597	CCs[RTLIB::UO_F64] = ISD::SETNE;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	598	CCs[RTLIB::UO_F128] = ISD::SETNE;
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	599	CCs[RTLIB::O_F32] = ISD::SETEQ;
				600	CCs[RTLIB::O_F64] = ISD::SETEQ;
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	601	CCs[RTLIB::O_F128] = ISD::SETEQ;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	602	}
				603
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	604	/// NOTE: The constructor takes ownership of TLOF.
Dan Gohman	f0757b0	2010-04-21 01:34:56 +0000	[diff] [blame]	605	TargetLowering::TargetLowering(const TargetMachine &tm,
				606	const TargetLoweringObjectFile *tlof)
Micah Villmow	3574eca	2012-10-08 16:38:25 +0000	[diff] [blame]	607	: TM(tm), TD(TM.getDataLayout()), TLOF(*tlof) {
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	608	// All operations default to being supported.
				609	memset(OpActions, 0, sizeof(OpActions));
Evan Cheng	0329466	2008-10-14 21:26:46 +0000	[diff] [blame]	610	memset(LoadExtActions, 0, sizeof(LoadExtActions));
Chris Lattner	ddf8956	2008-01-17 19:59:44 +0000	[diff] [blame]	611	memset(TruncStoreActions, 0, sizeof(TruncStoreActions));
Chris Lattner	c9133f9	2008-01-18 19:36:20 +0000	[diff] [blame]	612	memset(IndexedModeActions, 0, sizeof(IndexedModeActions));
Evan Cheng	7f04268	2008-10-15 02:05:31 +0000	[diff] [blame]	613	memset(CondCodeActions, 0, sizeof(CondCodeActions));
Dan Gohman	93f81e2	2007-07-09 20:49:44 +0000	[diff] [blame]	614
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	615	// Set default actions for various operations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	616	for (unsigned VT = 0; VT != (unsigned)MVT::LAST_VALUETYPE; ++VT) {
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	617	// Default all indexed load / store to expand.
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	618	for (unsigned IM = (unsigned)ISD::PRE_INC;
				619	IM != (unsigned)ISD::LAST_INDEXED_MODE; ++IM) {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	620	setIndexedLoadAction(IM, (MVT::SimpleValueType)VT, Expand);
				621	setIndexedStoreAction(IM, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	622	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	623
Chris Lattner	1a3048b	2007-12-22 20:47:56 +0000	[diff] [blame]	624	// These operations default to expand.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	625	setOperationAction(ISD::FGETSIGN, (MVT::SimpleValueType)VT, Expand);
				626	setOperationAction(ISD::CONCAT_VECTORS, (MVT::SimpleValueType)VT, Expand);
Evan Cheng	5ff839f	2006-11-09 18:56:43 +0000	[diff] [blame]	627	}
Evan Cheng	d2cde68	2008-03-10 19:38:10 +0000	[diff] [blame]	628
				629	// Most targets ignore the @llvm.prefetch intrinsic.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	630	setOperationAction(ISD::PREFETCH, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	631
				632	// ConstantFP nodes default to expand. Targets can either change this to
Evan Cheng	eb2f969	2009-10-27 19:56:55 +0000	[diff] [blame]	633	// Legal, in which case all fp constants are legal, or use isFPImmLegal()
Nate Begeman	e179584	2008-02-14 08:57:00 +0000	[diff] [blame]	634	// to optimize expansions for certain constants.
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	635	setOperationAction(ISD::ConstantFP, MVT::f16, Expand);
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	636	setOperationAction(ISD::ConstantFP, MVT::f32, Expand);
				637	setOperationAction(ISD::ConstantFP, MVT::f64, Expand);
				638	setOperationAction(ISD::ConstantFP, MVT::f80, Expand);
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	639	setOperationAction(ISD::ConstantFP, MVT::f128, Expand);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	640
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	641	// These library functions default to expand.
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	642	setOperationAction(ISD::FLOG , MVT::f16, Expand);
				643	setOperationAction(ISD::FLOG2, MVT::f16, Expand);
				644	setOperationAction(ISD::FLOG10, MVT::f16, Expand);
				645	setOperationAction(ISD::FEXP , MVT::f16, Expand);
				646	setOperationAction(ISD::FEXP2, MVT::f16, Expand);
				647	setOperationAction(ISD::FFLOOR, MVT::f16, Expand);
				648	setOperationAction(ISD::FNEARBYINT, MVT::f16, Expand);
				649	setOperationAction(ISD::FCEIL, MVT::f16, Expand);
				650	setOperationAction(ISD::FRINT, MVT::f16, Expand);
				651	setOperationAction(ISD::FTRUNC, MVT::f16, Expand);
Owen Anderson	4a4fdf3	2011-12-08 19:32:14 +0000	[diff] [blame]	652	setOperationAction(ISD::FLOG , MVT::f32, Expand);
				653	setOperationAction(ISD::FLOG2, MVT::f32, Expand);
				654	setOperationAction(ISD::FLOG10, MVT::f32, Expand);
				655	setOperationAction(ISD::FEXP , MVT::f32, Expand);
				656	setOperationAction(ISD::FEXP2, MVT::f32, Expand);
				657	setOperationAction(ISD::FFLOOR, MVT::f32, Expand);
				658	setOperationAction(ISD::FNEARBYINT, MVT::f32, Expand);
				659	setOperationAction(ISD::FCEIL, MVT::f32, Expand);
				660	setOperationAction(ISD::FRINT, MVT::f32, Expand);
				661	setOperationAction(ISD::FTRUNC, MVT::f32, Expand);
Dan Gohman	e3376ec	2011-12-20 00:02:33 +0000	[diff] [blame]	662	setOperationAction(ISD::FLOG , MVT::f64, Expand);
				663	setOperationAction(ISD::FLOG2, MVT::f64, Expand);
				664	setOperationAction(ISD::FLOG10, MVT::f64, Expand);
				665	setOperationAction(ISD::FEXP , MVT::f64, Expand);
				666	setOperationAction(ISD::FEXP2, MVT::f64, Expand);
				667	setOperationAction(ISD::FFLOOR, MVT::f64, Expand);
				668	setOperationAction(ISD::FNEARBYINT, MVT::f64, Expand);
				669	setOperationAction(ISD::FCEIL, MVT::f64, Expand);
				670	setOperationAction(ISD::FRINT, MVT::f64, Expand);
				671	setOperationAction(ISD::FTRUNC, MVT::f64, Expand);
Tim Northover	24d315d	2013-01-08 17:09:59 +0000	[diff] [blame]	672	setOperationAction(ISD::FLOG , MVT::f128, Expand);
				673	setOperationAction(ISD::FLOG2, MVT::f128, Expand);
				674	setOperationAction(ISD::FLOG10, MVT::f128, Expand);
				675	setOperationAction(ISD::FEXP , MVT::f128, Expand);
				676	setOperationAction(ISD::FEXP2, MVT::f128, Expand);
				677	setOperationAction(ISD::FFLOOR, MVT::f128, Expand);
				678	setOperationAction(ISD::FNEARBYINT, MVT::f128, Expand);
				679	setOperationAction(ISD::FCEIL, MVT::f128, Expand);
				680	setOperationAction(ISD::FRINT, MVT::f128, Expand);
				681	setOperationAction(ISD::FTRUNC, MVT::f128, Expand);
Dale Johannesen	0bb4160	2008-09-22 21:57:32 +0000	[diff] [blame]	682
Chris Lattner	41bab0b	2008-01-15 21:58:08 +0000	[diff] [blame]	683	// Default ISD::TRAP to expand (which turns it into abort).
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	684	setOperationAction(ISD::TRAP, MVT::Other, Expand);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	685
Shuxin Yang	970755e	2012-10-19 20:11:16 +0000	[diff] [blame]	686	// On most systems, DEBUGTRAP and TRAP have no difference. The "Expand"
				687	// here is to inform DAG Legalizer to replace DEBUGTRAP with TRAP.
				688	//
				689	setOperationAction(ISD::DEBUGTRAP, MVT::Other, Expand);
				690
Owen Anderson	a69571c	2006-05-03 01:29:57 +0000	[diff] [blame]	691	IsLittleEndian = TD->isLittleEndian();
Micah Villmow	7d66146	2012-10-09 16:06:12 +0000	[diff] [blame]	692	PointerTy = MVT::getIntegerVT(8*TD->getPointerSize(0));
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	693	memset(RegClassForVT, 0,MVT::LAST_VALUETYPEsizeof(TargetRegisterClass));
Owen Anderson	718cb66	2007-09-07 04:06:50 +0000	[diff] [blame]	694	memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray));
Evan Cheng	a03a5dc	2006-02-14 08:38:30 +0000	[diff] [blame]	695	maxStoresPerMemset = maxStoresPerMemcpy = maxStoresPerMemmove = 8;
Evan Cheng	0521928	2011-01-06 06:52:41 +0000	[diff] [blame]	696	maxStoresPerMemsetOptSize = maxStoresPerMemcpyOptSize
				697	= maxStoresPerMemmoveOptSize = 4;
Evan Cheng	6ebf7bc	2009-05-13 21:42:09 +0000	[diff] [blame]	698	benefitFromCodePlacementOpt = false;
Anton Korobeynikov	d27a258	2006-12-10 23:12:42 +0000	[diff] [blame]	699	UseUnderscoreSetJmp = false;
				700	UseUnderscoreLongJmp = false;
Chris Lattner	6618039	2007-02-25 01:28:05 +0000	[diff] [blame]	701	SelectIsExpensive = false;
Nate Begeman	405e3ec	2005-10-21 00:02:42 +0000	[diff] [blame]	702	IntDivIsCheap = false;
				703	Pow2DivIsCheap = false;
Chris Lattner	de189be	2010-11-30 18:12:52 +0000	[diff] [blame]	704	JumpIsExpensive = false;
Benjamin Kramer	aaf723d	2012-05-05 12:49:14 +0000	[diff] [blame]	705	predictableSelectIsExpensive = false;
Chris Lattner	ee4a765	2006-01-25 18:57:15 +0000	[diff] [blame]	706	StackPointerRegisterToSaveRestore = 0;
Jim Laskey	9bb3c93	2007-02-22 18:04:49 +0000	[diff] [blame]	707	ExceptionPointerRegister = 0;
				708	ExceptionSelectorRegister = 0;
Duncan Sands	0322808	2008-11-23 15:47:28 +0000	[diff] [blame]	709	BooleanContents = UndefinedBooleanContent;
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	710	BooleanVectorContents = UndefinedBooleanContent;
Dan Gohman	8c2d270	2011-10-24 17:45:02 +0000	[diff] [blame]	711	SchedPreferenceInfo = Sched::ILP;
Chris Lattner	7acf5f3	2006-09-05 17:39:15 +0000	[diff] [blame]	712	JumpBufSize = 0;
Duraid Madina	0c9e0ff	2006-09-04 07:44:11 +0000	[diff] [blame]	713	JumpBufAlignment = 0;
Eli Friedman	fc5d305	2011-05-06 20:34:06 +0000	[diff] [blame]	714	MinFunctionAlignment = 0;
				715	PrefFunctionAlignment = 0;
Evan Cheng	fb8075d	2008-02-28 00:43:03 +0000	[diff] [blame]	716	PrefLoopAlignment = 0;
Rafael Espindola	cbeeae2	2010-07-11 04:01:49 +0000	[diff] [blame]	717	MinStackArgumentAlignment = 1;
Jim Grosbach	9a52649	2010-06-23 16:07:42 +0000	[diff] [blame]	718	ShouldFoldAtomicFences = false;
Eli Friedman	26689ac	2011-08-03 21:06:02 +0000	[diff] [blame]	719	InsertFencesForAtomic = false;
Evan Cheng	769951f	2012-07-02 22:39:56 +0000	[diff] [blame]	720	SupportJumpTables = true;
Sebastian Pop	1a37d7e	2012-09-25 20:35:36 +0000	[diff] [blame]	721	MinimumJumpTableEntries = 4;
Evan Cheng	5696622	2007-01-12 02:11:51 +0000	[diff] [blame]	722
				723	InitLibcallNames(LibcallRoutineNames);
Evan Cheng	d385fd6	2007-01-31 09:29:11 +0000	[diff] [blame]	724	InitCmpLibcallCCs(CmpLibcallCCs);
Anton Korobeynikov	72977a4	2009-08-14 20:10:52 +0000	[diff] [blame]	725	InitLibcallCallingConvs(LibcallCallingConvs);
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	726	}
				727
Chris Lattner	f014412	2009-07-28 03:13:23 +0000	[diff] [blame]	728	TargetLowering::~TargetLowering() {
				729	delete &TLOF;
				730	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	731
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	732	MVT TargetLowering::getShiftAmountTy(EVT LHSTy) const {
Micah Villmow	7d66146	2012-10-09 16:06:12 +0000	[diff] [blame]	733	return MVT::getIntegerVT(8*TD->getPointerSize(0));
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	734	}
				735
Mon P Wang	f7ea6c3	2010-02-10 23:37:45 +0000	[diff] [blame]	736	/// canOpTrap - Returns true if the operation can trap for the value type.
				737	/// VT must be a legal type.
				738	bool TargetLowering::canOpTrap(unsigned Op, EVT VT) const {
				739	assert(isTypeLegal(VT));
				740	switch (Op) {
				741	default:
				742	return false;
				743	case ISD::FDIV:
				744	case ISD::FREM:
				745	case ISD::SDIV:
				746	case ISD::UDIV:
				747	case ISD::SREM:
				748	case ISD::UREM:
				749	return true;
				750	}
				751	}
				752
				753
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	754	static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	755	unsigned &NumIntermediates,
Patrik Hagglund	ee211d2	2012-12-19 11:53:21 +0000	[diff] [blame]	756	MVT &RegisterVT,
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	757	TargetLowering *TLI) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	758	// Figure out the right, legal destination reg to copy into.
				759	unsigned NumElts = VT.getVectorNumElements();
				760	MVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	761
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	762	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	763
				764	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	765	// could break down into LHS/RHS like LegalizeDAG does.
				766	if (!isPowerOf2_32(NumElts)) {
				767	NumVectorRegs = NumElts;
				768	NumElts = 1;
				769	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	770
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	771	// Divide the input until we get to a supported size. This will always
				772	// end with a scalar if the target doesn't support vectors.
				773	while (NumElts > 1 && !TLI->isTypeLegal(MVT::getVectorVT(EltTy, NumElts))) {
				774	NumElts >>= 1;
				775	NumVectorRegs <<= 1;
				776	}
				777
				778	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	779
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	780	MVT NewVT = MVT::getVectorVT(EltTy, NumElts);
				781	if (!TLI->isTypeLegal(NewVT))
				782	NewVT = EltTy;
				783	IntermediateVT = NewVT;
				784
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	785	unsigned NewVTSize = NewVT.getSizeInBits();
				786
				787	// Convert sizes such as i33 to i64.
				788	if (!isPowerOf2_32(NewVTSize))
				789	NewVTSize = NextPowerOf2(NewVTSize);
				790
Patrik Hagglund	dfcf33a	2012-12-19 11:48:16 +0000	[diff] [blame]	791	MVT DestVT = TLI->getRegisterType(NewVT);
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	792	RegisterVT = DestVT;
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	793	if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	794	return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	795
Chris Lattner	32b4b5a	2010-07-05 05:53:14 +0000	[diff] [blame]	796	// Otherwise, promotion or legal types use the same number of registers as
				797	// the vector decimated to the appropriate level.
				798	return NumVectorRegs;
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	799	}
				800
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	801	/// isLegalRC - Return true if the value types that can be represented by the
				802	/// specified register class are all legal.
				803	bool TargetLowering::isLegalRC(const TargetRegisterClass *RC) const {
				804	for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
				805	I != E; ++I) {
				806	if (isTypeLegal(*I))
				807	return true;
				808	}
				809	return false;
				810	}
				811
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	812	/// findRepresentativeClass - Return the largest legal super-reg register class
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	813	/// of the register class for the specified type and its associated "cost".
				814	std::pair<const TargetRegisterClass*, uint8_t>
Patrik Hagglund	0340557	2012-12-19 11:30:36 +0000	[diff] [blame]	815	TargetLowering::findRepresentativeClass(MVT VT) const {
Jakob Stoklund Olesen	e3ee49f	2012-05-04 02:19:22 +0000	[diff] [blame]	816	const TargetRegisterInfo *TRI = getTargetMachine().getRegisterInfo();
Patrik Hagglund	0340557	2012-12-19 11:30:36 +0000	[diff] [blame]	817	const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	818	if (!RC)
				819	return std::make_pair(RC, 0);
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	820
Jakob Stoklund Olesen	e3ee49f	2012-05-04 02:19:22 +0000	[diff] [blame]	821	// Compute the set of all super-register classes.
Jakob Stoklund Olesen	e3ee49f	2012-05-04 02:19:22 +0000	[diff] [blame]	822	BitVector SuperRegRC(TRI->getNumRegClasses());
Jakob Stoklund Olesen	7fc4d9c	2012-05-04 22:53:28 +0000	[diff] [blame]	823	for (SuperRegClassIterator RCI(RC, TRI); RCI.isValid(); ++RCI)
Jakob Stoklund Olesen	e3ee49f	2012-05-04 02:19:22 +0000	[diff] [blame]	824	SuperRegRC.setBitsInMask(RCI.getMask());
				825
Jakob Stoklund Olesen	7fc4d9c	2012-05-04 22:53:28 +0000	[diff] [blame]	826	// Find the first legal register class with the largest spill size.
				827	const TargetRegisterClass *BestRC = RC;
Jakob Stoklund Olesen	e3ee49f	2012-05-04 02:19:22 +0000	[diff] [blame]	828	for (int i = SuperRegRC.find_first(); i >= 0; i = SuperRegRC.find_next(i)) {
				829	const TargetRegisterClass *SuperRC = TRI->getRegClass(i);
Jakob Stoklund Olesen	7fc4d9c	2012-05-04 22:53:28 +0000	[diff] [blame]	830	// We want the largest possible spill size.
				831	if (SuperRC->getSize() <= BestRC->getSize())
				832	continue;
				833	if (!isLegalRC(SuperRC))
				834	continue;
				835	BestRC = SuperRC;
Jakob Stoklund Olesen	e3ee49f	2012-05-04 02:19:22 +0000	[diff] [blame]	836	}
Jakob Stoklund Olesen	7fc4d9c	2012-05-04 22:53:28 +0000	[diff] [blame]	837	return std::make_pair(BestRC, 1);
Jakob Stoklund Olesen	e3ee49f	2012-05-04 02:19:22 +0000	[diff] [blame]	838	}
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	839
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	840	/// computeRegisterProperties - Once all of the register classes are added,
				841	/// this allows us to compute derived properties we expose.
				842	void TargetLowering::computeRegisterProperties() {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	843	assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE &&
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	844	"Too many value types for ValueTypeActions to hold!");
				845
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	846	// Everything defaults to needing one register.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	847	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	848	NumRegistersForVT[i] = 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	849	RegisterTypeForVT[i] = TransformToType[i] = (MVT::SimpleValueType)i;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	850	}
				851	// ...except isVoid, which doesn't need any registers.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	852	NumRegistersForVT[MVT::isVoid] = 0;
Misha Brukman	f976c85	2005-04-21 22:55:34 +0000	[diff] [blame]	853
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	854	// Find the largest integer register class.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	855	unsigned LargestIntReg = MVT::LAST_INTEGER_VALUETYPE;
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	856	for (; RegClassForVT[LargestIntReg] == 0; --LargestIntReg)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	857	assert(LargestIntReg != MVT::i1 && "No integer registers defined!");
Chris Lattner	310968c	2005-01-07 07:44:53 +0000	[diff] [blame]	858
				859	// Every integer value type larger than this largest register takes twice as
				860	// many registers to represent as the previous ValueType.
Patrik Hägglund	d5f0318	2012-11-23 08:35:04 +0000	[diff] [blame]	861	for (unsigned ExpandedReg = LargestIntReg + 1;
				862	ExpandedReg <= MVT::LAST_INTEGER_VALUETYPE; ++ExpandedReg) {
Dan Gohman	b9f1019	2007-06-21 14:42:22 +0000	[diff] [blame]	863	NumRegistersForVT[ExpandedReg] = 2*NumRegistersForVT[ExpandedReg-1];
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	864	RegisterTypeForVT[ExpandedReg] = (MVT::SimpleValueType)LargestIntReg;
				865	TransformToType[ExpandedReg] = (MVT::SimpleValueType)(ExpandedReg - 1);
Patrik Hägglund	d5f0318	2012-11-23 08:35:04 +0000	[diff] [blame]	866	ValueTypeActions.setTypeAction((MVT::SimpleValueType)ExpandedReg,
				867	TypeExpandInteger);
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	868	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	869
				870	// Inspect all of the ValueType's smaller than the largest integer
				871	// register to see which ones need promotion.
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	872	unsigned LegalIntReg = LargestIntReg;
				873	for (unsigned IntReg = LargestIntReg - 1;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	874	IntReg >= (unsigned)MVT::i1; --IntReg) {
Patrik Hagglund	009e1e2	2012-12-13 20:42:43 +0000	[diff] [blame]	875	MVT IVT = (MVT::SimpleValueType)IntReg;
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	876	if (isTypeLegal(IVT)) {
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	877	LegalIntReg = IntReg;
				878	} else {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	879	RegisterTypeForVT[IntReg] = TransformToType[IntReg] =
Roman Divacky	5932429	2012-09-05 22:26:57 +0000	[diff] [blame]	880	(const MVT::SimpleValueType)LegalIntReg;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	881	ValueTypeActions.setTypeAction(IVT, TypePromoteInteger);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	882	}
				883	}
				884
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	885	// ppcf128 type is really two f64's.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	886	if (!isTypeLegal(MVT::ppcf128)) {
				887	NumRegistersForVT[MVT::ppcf128] = 2*NumRegistersForVT[MVT::f64];
				888	RegisterTypeForVT[MVT::ppcf128] = MVT::f64;
				889	TransformToType[MVT::ppcf128] = MVT::f64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	890	ValueTypeActions.setTypeAction(MVT::ppcf128, TypeExpandFloat);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	891	}
Dale Johannesen	161e897	2007-10-05 20:04:43 +0000	[diff] [blame]	892
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	893	// Decide how to handle f64. If the target does not have native f64 support,
				894	// expand it to i64 and we will be generating soft float library calls.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	895	if (!isTypeLegal(MVT::f64)) {
				896	NumRegistersForVT[MVT::f64] = NumRegistersForVT[MVT::i64];
				897	RegisterTypeForVT[MVT::f64] = RegisterTypeForVT[MVT::i64];
				898	TransformToType[MVT::f64] = MVT::i64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	899	ValueTypeActions.setTypeAction(MVT::f64, TypeSoftenFloat);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	900	}
				901
				902	// Decide how to handle f32. If the target does not have native support for
				903	// f32, promote it to f64 if it is legal. Otherwise, expand it to i32.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	904	if (!isTypeLegal(MVT::f32)) {
				905	if (isTypeLegal(MVT::f64)) {
				906	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::f64];
				907	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::f64];
				908	TransformToType[MVT::f32] = MVT::f64;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	909	ValueTypeActions.setTypeAction(MVT::f32, TypePromoteInteger);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	910	} else {
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	911	NumRegistersForVT[MVT::f32] = NumRegistersForVT[MVT::i32];
				912	RegisterTypeForVT[MVT::f32] = RegisterTypeForVT[MVT::i32];
				913	TransformToType[MVT::f32] = MVT::i32;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	914	ValueTypeActions.setTypeAction(MVT::f32, TypeSoftenFloat);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	915	}
Evan Cheng	1a8f1fe	2006-12-09 02:42:38 +0000	[diff] [blame]	916	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	917
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	918	// Loop over all of the vector value types to see which need transformations.
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	919	for (unsigned i = MVT::FIRST_VECTOR_VALUETYPE;
				920	i <= (unsigned)MVT::LAST_VECTOR_VALUETYPE; ++i) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	921	MVT VT = (MVT::SimpleValueType)i;
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	922	if (isTypeLegal(VT)) continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	923
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	924	// Determine if there is a legal wider type. If so, we should promote to
				925	// that wider vector type.
Patrik Hagglund	ff01277	2012-12-19 11:42:00 +0000	[diff] [blame]	926	MVT EltVT = VT.getVectorElementType();
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	927	unsigned NElts = VT.getVectorNumElements();
Justin Holewinski	3d20025	2012-11-29 14:26:24 +0000	[diff] [blame]	928	if (NElts != 1 && !shouldSplitVectorElementType(EltVT)) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	929	bool IsLegalWiderType = false;
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	930	// First try to promote the elements of integer vectors. If no legal
				931	// promotion was found, fallback to the widen-vector method.
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	932	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
Patrik Hagglund	ff01277	2012-12-19 11:42:00 +0000	[diff] [blame]	933	MVT SVT = (MVT::SimpleValueType)nVT;
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	934	// Promote vectors of integers to vectors with the same number
				935	// of elements, with a wider element type.
				936	if (SVT.getVectorElementType().getSizeInBits() > EltVT.getSizeInBits()
				937	&& SVT.getVectorNumElements() == NElts &&
				938	isTypeLegal(SVT) && SVT.getScalarType().isInteger()) {
				939	TransformToType[i] = SVT;
				940	RegisterTypeForVT[i] = SVT;
				941	NumRegistersForVT[i] = 1;
				942	ValueTypeActions.setTypeAction(VT, TypePromoteInteger);
				943	IsLegalWiderType = true;
				944	break;
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	945	}
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	946	}
Nadav Rotem	b6fbec3	2011-06-01 12:51:46 +0000	[diff] [blame]	947
Nadav Rotem	f1c025d	2011-06-04 20:32:01 +0000	[diff] [blame]	948	if (IsLegalWiderType) continue;
				949
				950	// Try to widen the vector.
				951	for (unsigned nVT = i+1; nVT <= MVT::LAST_VECTOR_VALUETYPE; ++nVT) {
Patrik Hagglund	ff01277	2012-12-19 11:42:00 +0000	[diff] [blame]	952	MVT SVT = (MVT::SimpleValueType)nVT;
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	953	if (SVT.getVectorElementType() == EltVT &&
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	954	SVT.getVectorNumElements() > NElts &&
Dale Johannesen	e93d99c	2010-10-20 21:32:10 +0000	[diff] [blame]	955	isTypeLegal(SVT)) {
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	956	TransformToType[i] = SVT;
				957	RegisterTypeForVT[i] = SVT;
				958	NumRegistersForVT[i] = 1;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	959	ValueTypeActions.setTypeAction(VT, TypeWidenVector);
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	960	IsLegalWiderType = true;
				961	break;
				962	}
				963	}
				964	if (IsLegalWiderType) continue;
				965	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	966
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	967	MVT IntermediateVT;
Patrik Hagglund	ee211d2	2012-12-19 11:53:21 +0000	[diff] [blame]	968	MVT RegisterVT;
Chris Lattner	598751e	2010-07-05 05:36:21 +0000	[diff] [blame]	969	unsigned NumIntermediates;
				970	NumRegistersForVT[i] =
				971	getVectorTypeBreakdownMVT(VT, IntermediateVT, NumIntermediates,
				972	RegisterVT, this);
Patrik Hagglund	ee211d2	2012-12-19 11:53:21 +0000	[diff] [blame]	973	RegisterTypeForVT[i] = RegisterVT;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	974
Patrik Hagglund	ff01277	2012-12-19 11:42:00 +0000	[diff] [blame]	975	MVT NVT = VT.getPow2VectorType();
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	976	if (NVT == VT) {
				977	// Type is already a power of 2. The default action is to split.
				978	TransformToType[i] = MVT::Other;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	979	unsigned NumElts = VT.getVectorNumElements();
				980	ValueTypeActions.setTypeAction(VT,
				981	NumElts > 1 ? TypeSplitVector : TypeScalarizeVector);
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	982	} else {
				983	TransformToType[i] = NVT;
Nadav Rotem	b6aacae	2011-05-28 17:57:14 +0000	[diff] [blame]	984	ValueTypeActions.setTypeAction(VT, TypeWidenVector);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	985	}
Chris Lattner	3a593584	2006-03-16 19:50:01 +0000	[diff] [blame]	986	}
Evan Cheng	46dcb57	2010-07-19 18:47:01 +0000	[diff] [blame]	987
				988	// Determine the 'representative' register class for each value type.
				989	// An representative register class is the largest (meaning one which is
				990	// not a sub-register class / subreg register class) legal register class for
				991	// a group of value types. For example, on i386, i8, i16, and i32
				992	// representative would be GR32; while on x86_64 it's GR64.
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	993	for (unsigned i = 0; i != MVT::LAST_VALUETYPE; ++i) {
Evan Cheng	4f6b467	2010-07-21 06:09:07 +0000	[diff] [blame]	994	const TargetRegisterClass* RRC;
				995	uint8_t Cost;
				996	tie(RRC, Cost) = findRepresentativeClass((MVT::SimpleValueType)i);
				997	RepRegClassForVT[i] = RRC;
				998	RepRegClassCostForVT[i] = Cost;
Evan Cheng	d70f57b	2010-07-19 22:15:08 +0000	[diff] [blame]	999	}
Chris Lattner	bb97d81	2005-01-16 01:10:58 +0000	[diff] [blame]	1000	}
Chris Lattner	cba82f9	2005-01-16 07:28:11 +0000	[diff] [blame]	1001
Evan Cheng	7226158	2005-12-20 06:22:03 +0000	[diff] [blame]	1002	const char *TargetLowering::getTargetNodeName(unsigned Opcode) const {
				1003	return NULL;
				1004	}
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	1005
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	1006	EVT TargetLowering::getSetCCResultType(EVT VT) const {
				1007	assert(!VT.isVector() && "No default SetCC type for vectors!");
Micah Villmow	7d66146	2012-10-09 16:06:12 +0000	[diff] [blame]	1008	return getPointerTy(0).SimpleTy;
Scott Michel	5b8f82e	2008-03-10 15:42:14 +0000	[diff] [blame]	1009	}
				1010
Sanjiv Gupta	8f17a36	2009-12-28 02:40:33 +0000	[diff] [blame]	1011	MVT::SimpleValueType TargetLowering::getCmpLibcallReturnType() const {
				1012	return MVT::i32; // return the default value
				1013	}
				1014
Tim Northover	2c8cf4b	2013-01-09 13:18:15 +0000	[diff] [blame]	1015	/// Check whether a given call node is in tail position within its function. If
				1016	/// so, it sets Chain to the input chain of the tail call.
				1017	bool TargetLowering::isInTailCallPosition(SelectionDAG &DAG, SDNode *Node,
				1018	SDValue &Chain) const {
				1019	const Function *F = DAG.getMachineFunction().getFunction();
				1020
				1021	// Conservatively require the attributes of the call to match those of
				1022	// the return. Ignore noalias because it doesn't affect the call sequence.
				1023	Attribute CallerRetAttr = F->getAttributes().getRetAttributes();
				1024	if (AttrBuilder(CallerRetAttr)
				1025	.removeAttribute(Attribute::NoAlias).hasAttributes())
				1026	return false;
				1027
				1028	// It's not safe to eliminate the sign / zero extension of the return value.
				1029	if (CallerRetAttr.hasAttribute(Attribute::ZExt) \|\|
				1030	CallerRetAttr.hasAttribute(Attribute::SExt))
				1031	return false;
				1032
				1033	// Check if the only use is a function return node.
				1034	return isUsedByReturnOnly(Node, Chain);
				1035	}
				1036
				1037
				1038	/// Generate a libcall taking the given operands as arguments and returning a
				1039	/// result of type RetVT.
				1040	SDValue TargetLowering::makeLibCall(SelectionDAG &DAG,
				1041	RTLIB::Libcall LC, EVT RetVT,
				1042	const SDValue *Ops, unsigned NumOps,
				1043	bool isSigned, DebugLoc dl) const {
				1044	TargetLowering::ArgListTy Args;
				1045	Args.reserve(NumOps);
				1046
				1047	TargetLowering::ArgListEntry Entry;
				1048	for (unsigned i = 0; i != NumOps; ++i) {
				1049	Entry.Node = Ops[i];
				1050	Entry.Ty = Entry.Node.getValueType().getTypeForEVT(*DAG.getContext());
				1051	Entry.isSExt = isSigned;
				1052	Entry.isZExt = !isSigned;
				1053	Args.push_back(Entry);
				1054	}
				1055	SDValue Callee = DAG.getExternalSymbol(getLibcallName(LC), getPointerTy());
				1056
				1057	Type RetTy = RetVT.getTypeForEVT(DAG.getContext());
				1058	TargetLowering::
				1059	CallLoweringInfo CLI(DAG.getEntryNode(), RetTy, isSigned, !isSigned, false,
				1060	false, 0, getLibcallCallingConv(LC),
				1061	/isTailCall=/false,
				1062	/doesNotReturn=/false, /isReturnValueUsed=/true,
				1063	Callee, Args, DAG, dl);
				1064	std::pair<SDValue,SDValue> CallInfo = LowerCallTo(CLI);
				1065
				1066	return CallInfo.first;
				1067	}
				1068
				1069
				1070	/// SoftenSetCCOperands - Soften the operands of a comparison. This code is
				1071	/// shared among BR_CC, SELECT_CC, and SETCC handlers.
				1072	void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT,
				1073	SDValue &NewLHS, SDValue &NewRHS,
				1074	ISD::CondCode &CCCode,
				1075	DebugLoc dl) const {
				1076	assert((VT == MVT::f32 \|\| VT == MVT::f64 \|\| VT == MVT::f128)
				1077	&& "Unsupported setcc type!");
				1078
				1079	// Expand into one or more soft-fp libcall(s).
				1080	RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
				1081	switch (CCCode) {
				1082	case ISD::SETEQ:
				1083	case ISD::SETOEQ:
				1084	LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 :
				1085	(VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128;
				1086	break;
				1087	case ISD::SETNE:
				1088	case ISD::SETUNE:
				1089	LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 :
				1090	(VT == MVT::f64) ? RTLIB::UNE_F64 : RTLIB::UNE_F128;
				1091	break;
				1092	case ISD::SETGE:
				1093	case ISD::SETOGE:
				1094	LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 :
				1095	(VT == MVT::f64) ? RTLIB::OGE_F64 : RTLIB::OGE_F128;
				1096	break;
				1097	case ISD::SETLT:
				1098	case ISD::SETOLT:
				1099	LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :
				1100	(VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;
				1101	break;
				1102	case ISD::SETLE:
				1103	case ISD::SETOLE:
				1104	LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 :
				1105	(VT == MVT::f64) ? RTLIB::OLE_F64 : RTLIB::OLE_F128;
				1106	break;
				1107	case ISD::SETGT:
				1108	case ISD::SETOGT:
				1109	LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 :
				1110	(VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;
				1111	break;
				1112	case ISD::SETUO:
				1113	LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 :
				1114	(VT == MVT::f64) ? RTLIB::UO_F64 : RTLIB::UO_F128;
				1115	break;
				1116	case ISD::SETO:
				1117	LC1 = (VT == MVT::f32) ? RTLIB::O_F32 :
				1118	(VT == MVT::f64) ? RTLIB::O_F64 : RTLIB::O_F128;
				1119	break;
				1120	default:
				1121	LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 :
				1122	(VT == MVT::f64) ? RTLIB::UO_F64 : RTLIB::UO_F128;
				1123	switch (CCCode) {
				1124	case ISD::SETONE:
				1125	// SETONE = SETOLT \| SETOGT
				1126	LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 :
				1127	(VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;
				1128	// Fallthrough
				1129	case ISD::SETUGT:
				1130	LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 :
				1131	(VT == MVT::f64) ? RTLIB::OGT_F64 : RTLIB::OGT_F128;
				1132	break;
				1133	case ISD::SETUGE:
				1134	LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 :
				1135	(VT == MVT::f64) ? RTLIB::OGE_F64 : RTLIB::OGE_F128;
				1136	break;
				1137	case ISD::SETULT:
				1138	LC2 = (VT == MVT::f32) ? RTLIB::OLT_F32 :
				1139	(VT == MVT::f64) ? RTLIB::OLT_F64 : RTLIB::OLT_F128;
				1140	break;
				1141	case ISD::SETULE:
				1142	LC2 = (VT == MVT::f32) ? RTLIB::OLE_F32 :
				1143	(VT == MVT::f64) ? RTLIB::OLE_F64 : RTLIB::OLE_F128;
				1144	break;
				1145	case ISD::SETUEQ:
				1146	LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 :
				1147	(VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128;
				1148	break;
				1149	default: llvm_unreachable("Do not know how to soften this setcc!");
				1150	}
				1151	}
				1152
				1153	// Use the target specific return value for comparions lib calls.
				1154	EVT RetVT = getCmpLibcallReturnType();
				1155	SDValue Ops[2] = { NewLHS, NewRHS };
				1156	NewLHS = makeLibCall(DAG, LC1, RetVT, Ops, 2, false/sign irrelevant/, dl);
				1157	NewRHS = DAG.getConstant(0, RetVT);
				1158	CCCode = getCmpLibcallCC(LC1);
				1159	if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
				1160	SDValue Tmp = DAG.getNode(ISD::SETCC, dl, getSetCCResultType(RetVT),
				1161	NewLHS, NewRHS, DAG.getCondCode(CCCode));
				1162	NewLHS = makeLibCall(DAG, LC2, RetVT, Ops, 2, false/sign irrelevant/, dl);
				1163	NewLHS = DAG.getNode(ISD::SETCC, dl, getSetCCResultType(RetVT), NewLHS,
				1164	NewRHS, DAG.getCondCode(getCmpLibcallCC(LC2)));
				1165	NewLHS = DAG.getNode(ISD::OR, dl, Tmp.getValueType(), Tmp, NewLHS);
				1166	NewRHS = SDValue();
				1167	}
				1168	}
				1169
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	1170	/// getVectorTypeBreakdown - Vector types are broken down into some number of
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	1171	/// legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32
				1172	/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack.
				1173	/// Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1174	///
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	1175	/// This method returns the number of registers needed, and the VT for each
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	1176	/// register. It also returns the VT and quantity of the intermediate values
				1177	/// before they are promoted/expanded.
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1178	///
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1179	unsigned TargetLowering::getVectorTypeBreakdown(LLVMContext &Context, EVT VT,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1180	EVT &IntermediateVT,
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	1181	unsigned &NumIntermediates,
Patrik Hagglund	ee211d2	2012-12-19 11:53:21 +0000	[diff] [blame]	1182	MVT &RegisterVT) const {
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1183	unsigned NumElts = VT.getVectorNumElements();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1184
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	1185	// If there is a wider vector type with the same element type as this one,
Nadav Rotem	db34616	2012-04-21 20:08:32 +0000	[diff] [blame]	1186	// or a promoted vector type that has the same number of elements which
				1187	// are wider, then we should convert to that legal vector type.
				1188	// This handles things like <2 x float> -> <4 x float> and
				1189	// <4 x i1> -> <4 x i32>.
				1190	LegalizeTypeAction TA = getTypeAction(Context, VT);
				1191	if (NumElts != 1 && (TA == TypeWidenVector \|\| TA == TypePromoteInteger)) {
Patrik Hagglund	ee211d2	2012-12-19 11:53:21 +0000	[diff] [blame]	1192	EVT RegisterEVT = getTypeToTransformTo(Context, VT);
				1193	if (isTypeLegal(RegisterEVT)) {
				1194	IntermediateVT = RegisterEVT;
				1195	RegisterVT = RegisterEVT.getSimpleVT();
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	1196	NumIntermediates = 1;
				1197	return 1;
				1198	}
				1199	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1200
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	1201	// Figure out the right, legal destination reg to copy into.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1202	EVT EltTy = VT.getVectorElementType();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1203
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1204	unsigned NumVectorRegs = 1;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1205
				1206	// FIXME: We don't support non-power-of-2-sized vectors for now. Ideally we
Nate Begeman	d73ab88	2007-11-27 19:28:48 +0000	[diff] [blame]	1207	// could break down into LHS/RHS like LegalizeDAG does.
				1208	if (!isPowerOf2_32(NumElts)) {
				1209	NumVectorRegs = NumElts;
				1210	NumElts = 1;
				1211	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1212
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1213	// Divide the input until we get to a supported size. This will always
				1214	// end with a scalar if the target doesn't support vectors.
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1215	while (NumElts > 1 && !isTypeLegal(
				1216	EVT::getVectorVT(Context, EltTy, NumElts))) {
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1217	NumElts >>= 1;
				1218	NumVectorRegs <<= 1;
				1219	}
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	1220
				1221	NumIntermediates = NumVectorRegs;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1222
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1223	EVT NewVT = EVT::getVectorVT(Context, EltTy, NumElts);
Dan Gohman	7f32156	2007-06-25 16:23:39 +0000	[diff] [blame]	1224	if (!isTypeLegal(NewVT))
				1225	NewVT = EltTy;
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	1226	IntermediateVT = NewVT;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1227
Patrik Hagglund	ee211d2	2012-12-19 11:53:21 +0000	[diff] [blame]	1228	MVT DestVT = getRegisterType(Context, NewVT);
Dan Gohman	b6f5b00	2007-06-28 23:29:44 +0000	[diff] [blame]	1229	RegisterVT = DestVT;
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	1230	unsigned NewVTSize = NewVT.getSizeInBits();
				1231
				1232	// Convert sizes such as i33 to i64.
				1233	if (!isPowerOf2_32(NewVTSize))
				1234	NewVTSize = NextPowerOf2(NewVTSize);
				1235
Patrik Hagglund	ee211d2	2012-12-19 11:53:21 +0000	[diff] [blame]	1236	if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	1237	return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1238
Chris Lattner	e6f7c26	2010-08-25 22:49:25 +0000	[diff] [blame]	1239	// Otherwise, promotion or legal types use the same number of registers as
				1240	// the vector decimated to the appropriate level.
				1241	return NumVectorRegs;
Chris Lattner	dc87929	2006-03-31 00:28:56 +0000	[diff] [blame]	1242	}
				1243
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1244	/// Get the EVTs and ArgFlags collections that represent the legalized return
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1245	/// type of the given function. This does not require a DAG or a return value,
				1246	/// and is suitable for use before any DAGs for the function are constructed.
				1247	/// TODO: Move this out of TargetLowering.cpp.
Bill Wendling	8b62abd	2012-12-30 13:01:51 +0000	[diff] [blame]	1248	void llvm::GetReturnInfo(Type* ReturnType, AttributeSet attr,
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1249	SmallVectorImpl<ISD::OutputArg> &Outs,
Eli Friedman	2db0e9e	2012-05-25 00:09:29 +0000	[diff] [blame]	1250	const TargetLowering &TLI) {
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1251	SmallVector<EVT, 4> ValueVTs;
				1252	ComputeValueVTs(TLI, ReturnType, ValueVTs);
				1253	unsigned NumValues = ValueVTs.size();
				1254	if (NumValues == 0) return;
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1255
				1256	for (unsigned j = 0, f = NumValues; j != f; ++j) {
				1257	EVT VT = ValueVTs[j];
				1258	ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
				1259
Bill Wendling	8b62abd	2012-12-30 13:01:51 +0000	[diff] [blame]	1260	if (attr.hasAttribute(AttributeSet::ReturnIndex, Attribute::SExt))
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1261	ExtendKind = ISD::SIGN_EXTEND;
Bill Wendling	8b62abd	2012-12-30 13:01:51 +0000	[diff] [blame]	1262	else if (attr.hasAttribute(AttributeSet::ReturnIndex, Attribute::ZExt))
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1263	ExtendKind = ISD::ZERO_EXTEND;
				1264
				1265	// FIXME: C calling convention requires the return type to be promoted to
				1266	// at least 32-bit. But this is not necessary for non-C calling
				1267	// conventions. The frontend should mark functions whose return values
				1268	// require promoting with signext or zeroext attributes.
				1269	if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) {
Patrik Hagglund	dfcf33a	2012-12-19 11:48:16 +0000	[diff] [blame]	1270	MVT MinVT = TLI.getRegisterType(ReturnType->getContext(), MVT::i32);
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1271	if (VT.bitsLT(MinVT))
				1272	VT = MinVT;
				1273	}
				1274
				1275	unsigned NumParts = TLI.getNumRegisters(ReturnType->getContext(), VT);
Patrik Hagglund	dfcf33a	2012-12-19 11:48:16 +0000	[diff] [blame]	1276	MVT PartVT = TLI.getRegisterType(ReturnType->getContext(), VT);
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1277
				1278	// 'inreg' on function refers to return value
				1279	ISD::ArgFlagsTy Flags = ISD::ArgFlagsTy();
Bill Wendling	8b62abd	2012-12-30 13:01:51 +0000	[diff] [blame]	1280	if (attr.hasAttribute(AttributeSet::ReturnIndex, Attribute::InReg))
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1281	Flags.setInReg();
				1282
				1283	// Propagate extension type if any
Bill Wendling	8b62abd	2012-12-30 13:01:51 +0000	[diff] [blame]	1284	if (attr.hasAttribute(AttributeSet::ReturnIndex, Attribute::SExt))
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1285	Flags.setSExt();
Bill Wendling	8b62abd	2012-12-30 13:01:51 +0000	[diff] [blame]	1286	else if (attr.hasAttribute(AttributeSet::ReturnIndex, Attribute::ZExt))
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1287	Flags.setZExt();
				1288
Bill Wendling	e853d2e	2012-09-19 23:35:21 +0000	[diff] [blame]	1289	for (unsigned i = 0; i < NumParts; ++i)
Manman Ren	0a1544d	2012-11-01 23:49:58 +0000	[diff] [blame]	1290	Outs.push_back(ISD::OutputArg(Flags, PartVT, /isFixed=/true, 0, 0));
Dan Gohman	84023e0	2010-07-10 09:00:22 +0000	[diff] [blame]	1291	}
				1292	}
				1293
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1294	/// getByValTypeAlignment - Return the desired alignment for ByVal aggregate
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	1295	/// function arguments in the caller parameter area. This is the actual
				1296	/// alignment, not its logarithm.
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	1297	unsigned TargetLowering::getByValTypeAlignment(Type *Ty) const {
Dale Johannesen	28d08fd	2008-02-28 22:31:51 +0000	[diff] [blame]	1298	return TD->getCallFrameTypeAlignment(Ty);
Evan Cheng	3ae0543	2008-01-24 00:22:01 +0000	[diff] [blame]	1299	}
				1300
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1301	/// getJumpTableEncoding - Return the entry encoding for a jump table in the
				1302	/// current function. The returned value is a member of the
				1303	/// MachineJumpTableInfo::JTEntryKind enum.
				1304	unsigned TargetLowering::getJumpTableEncoding() const {
				1305	// In non-pic modes, just use the address of a block.
				1306	if (getTargetMachine().getRelocationModel() != Reloc::PIC_)
				1307	return MachineJumpTableInfo::EK_BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1308
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1309	// In PIC mode, if the target supports a GPRel32 directive, use it.
				1310	if (getTargetMachine().getMCAsmInfo()->getGPRel32Directive() != 0)
				1311	return MachineJumpTableInfo::EK_GPRel32BlockAddress;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1312
Chris Lattner	071c62f	2010-01-25 23:26:13 +0000	[diff] [blame]	1313	// Otherwise, use a label difference.
				1314	return MachineJumpTableInfo::EK_LabelDifference32;
				1315	}
				1316
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1317	SDValue TargetLowering::getPICJumpTableRelocBase(SDValue Table,
				1318	SelectionDAG &DAG) const {
Chris Lattner	f1214cb	2010-01-26 06:53:37 +0000	[diff] [blame]	1319	// If our PIC model is GP relative, use the global offset table as the base.
Akira Hatanaka	787c3fd	2012-04-09 20:32:12 +0000	[diff] [blame]	1320	unsigned JTEncoding = getJumpTableEncoding();
				1321
				1322	if ((JTEncoding == MachineJumpTableInfo::EK_GPRel64BlockAddress) \|\|
				1323	(JTEncoding == MachineJumpTableInfo::EK_GPRel32BlockAddress))
Micah Villmow	7d66146	2012-10-09 16:06:12 +0000	[diff] [blame]	1324	return DAG.getGLOBAL_OFFSET_TABLE(getPointerTy(0));
Akira Hatanaka	787c3fd	2012-04-09 20:32:12 +0000	[diff] [blame]	1325
Evan Cheng	cc41586	2007-11-09 01:32:10 +0000	[diff] [blame]	1326	return Table;
				1327	}
				1328
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1329	/// getPICJumpTableRelocBaseExpr - This returns the relocation base for the
				1330	/// given PIC jumptable, the same as getPICJumpTableRelocBase, but as an
				1331	/// MCExpr.
				1332	const MCExpr *
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1333	TargetLowering::getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
				1334	unsigned JTI,MCContext &Ctx) const{
Chris Lattner	beeb93e	2010-01-26 05:58:28 +0000	[diff] [blame]	1335	// The normal PIC reloc base is the label at the start of the jump table.
Chris Lattner	589c6f6	2010-01-26 06:28:43 +0000	[diff] [blame]	1336	return MCSymbolRefExpr::Create(MF->getJTISymbol(JTI, Ctx), Ctx);
Chris Lattner	13e97a2	2010-01-26 05:30:30 +0000	[diff] [blame]	1337	}
				1338
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1339	bool
				1340	TargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
				1341	// Assume that everything is safe in static mode.
				1342	if (getTargetMachine().getRelocationModel() == Reloc::Static)
				1343	return true;
				1344
				1345	// In dynamic-no-pic mode, assume that known defined values are safe.
				1346	if (getTargetMachine().getRelocationModel() == Reloc::DynamicNoPIC &&
				1347	GA &&
				1348	!GA->getGlobal()->isDeclaration() &&
Duncan Sands	667d4b8	2009-03-07 15:45:40 +0000	[diff] [blame]	1349	!GA->getGlobal()->isWeakForLinker())
Dan Gohman	6520e20	2008-10-18 02:06:02 +0000	[diff] [blame]	1350	return true;
				1351
				1352	// Otherwise assume nothing is safe.
				1353	return false;
				1354	}
				1355
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	1356	//===----------------------------------------------------------------------===//
Chandler Carruth	aeef83c	2013-01-07 01:37:14 +0000	[diff] [blame]	1357	// TargetTransformInfo Helpers
				1358	//===----------------------------------------------------------------------===//
				1359
				1360	int TargetLowering::InstructionOpcodeToISD(unsigned Opcode) const {
				1361	enum InstructionOpcodes {
				1362	#define HANDLE_INST(NUM, OPCODE, CLASS) OPCODE = NUM,
				1363	#define LAST_OTHER_INST(NUM) InstructionOpcodesCount = NUM
				1364	#include "llvm/IR/Instruction.def"
				1365	};
				1366	switch (static_cast<InstructionOpcodes>(Opcode)) {
				1367	case Ret: return 0;
				1368	case Br: return 0;
				1369	case Switch: return 0;
				1370	case IndirectBr: return 0;
				1371	case Invoke: return 0;
				1372	case Resume: return 0;
				1373	case Unreachable: return 0;
				1374	case Add: return ISD::ADD;
				1375	case FAdd: return ISD::FADD;
				1376	case Sub: return ISD::SUB;
				1377	case FSub: return ISD::FSUB;
				1378	case Mul: return ISD::MUL;
				1379	case FMul: return ISD::FMUL;
				1380	case UDiv: return ISD::UDIV;
				1381	case SDiv: return ISD::UDIV;
				1382	case FDiv: return ISD::FDIV;
				1383	case URem: return ISD::UREM;
				1384	case SRem: return ISD::SREM;
				1385	case FRem: return ISD::FREM;
				1386	case Shl: return ISD::SHL;
				1387	case LShr: return ISD::SRL;
				1388	case AShr: return ISD::SRA;
				1389	case And: return ISD::AND;
				1390	case Or: return ISD::OR;
				1391	case Xor: return ISD::XOR;
				1392	case Alloca: return 0;
				1393	case Load: return ISD::LOAD;
				1394	case Store: return ISD::STORE;
				1395	case GetElementPtr: return 0;
				1396	case Fence: return 0;
				1397	case AtomicCmpXchg: return 0;
				1398	case AtomicRMW: return 0;
				1399	case Trunc: return ISD::TRUNCATE;
				1400	case ZExt: return ISD::ZERO_EXTEND;
				1401	case SExt: return ISD::SIGN_EXTEND;
				1402	case FPToUI: return ISD::FP_TO_UINT;
				1403	case FPToSI: return ISD::FP_TO_SINT;
				1404	case UIToFP: return ISD::UINT_TO_FP;
				1405	case SIToFP: return ISD::SINT_TO_FP;
				1406	case FPTrunc: return ISD::FP_ROUND;
				1407	case FPExt: return ISD::FP_EXTEND;
				1408	case PtrToInt: return ISD::BITCAST;
				1409	case IntToPtr: return ISD::BITCAST;
				1410	case BitCast: return ISD::BITCAST;
				1411	case ICmp: return ISD::SETCC;
				1412	case FCmp: return ISD::SETCC;
				1413	case PHI: return 0;
				1414	case Call: return 0;
				1415	case Select: return ISD::SELECT;
				1416	case UserOp1: return 0;
				1417	case UserOp2: return 0;
				1418	case VAArg: return 0;
				1419	case ExtractElement: return ISD::EXTRACT_VECTOR_ELT;
				1420	case InsertElement: return ISD::INSERT_VECTOR_ELT;
				1421	case ShuffleVector: return ISD::VECTOR_SHUFFLE;
				1422	case ExtractValue: return ISD::MERGE_VALUES;
				1423	case InsertValue: return ISD::MERGE_VALUES;
				1424	case LandingPad: return 0;
				1425	}
				1426
				1427	llvm_unreachable("Unknown instruction type encountered!");
				1428	}
				1429
				1430	std::pair<unsigned, MVT>
				1431	TargetLowering::getTypeLegalizationCost(Type *Ty) const {
				1432	LLVMContext &C = Ty->getContext();
				1433	EVT MTy = getValueType(Ty);
				1434
				1435	unsigned Cost = 1;
				1436	// We keep legalizing the type until we find a legal kind. We assume that
				1437	// the only operation that costs anything is the split. After splitting
				1438	// we need to handle two types.
				1439	while (true) {
				1440	LegalizeKind LK = getTypeConversion(C, MTy);
				1441
				1442	if (LK.first == TypeLegal)
				1443	return std::make_pair(Cost, MTy.getSimpleVT());
				1444
				1445	if (LK.first == TypeSplitVector \|\| LK.first == TypeExpandInteger)
				1446	Cost *= 2;
				1447
				1448	// Keep legalizing the type.
				1449	MTy = LK.second;
				1450	}
				1451	}
				1452
				1453	//===----------------------------------------------------------------------===//
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	1454	// Optimization Methods
				1455	//===----------------------------------------------------------------------===//
				1456
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1457	/// ShrinkDemandedConstant - Check to see if the specified operand of the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1458	/// specified instruction is a constant integer. If so, check to see if there
				1459	/// are any bits set in the constant that are not demanded. If so, shrink the
				1460	/// constant and return true.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1461	bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1462	const APInt &Demanded) {
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1463	DebugLoc dl = Op.getDebugLoc();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1464
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1465	// FIXME: ISD::SELECT, ISD::SELECT_CC
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1466	switch (Op.getOpcode()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1467	default: break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1468	case ISD::XOR:
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1469	case ISD::AND:
				1470	case ISD::OR: {
				1471	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				1472	if (!C) return false;
				1473
				1474	if (Op.getOpcode() == ISD::XOR &&
				1475	(C->getAPIntValue() \| (~Demanded)).isAllOnesValue())
				1476	return false;
				1477
				1478	// if we can expand it to have all bits set, do it
				1479	if (C->getAPIntValue().intersects(~Demanded)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1480	EVT VT = Op.getValueType();
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1481	SDValue New = DAG.getNode(Op.getOpcode(), dl, VT, Op.getOperand(0),
				1482	DAG.getConstant(Demanded &
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1483	C->getAPIntValue(),
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1484	VT));
				1485	return CombineTo(Op, New);
				1486	}
				1487
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1488	break;
				1489	}
Bill Wendling	36ae6c1	2009-03-04 00:18:06 +0000	[diff] [blame]	1490	}
				1491
Nate Begeman	de99629	2006-02-03 22:24:05 +0000	[diff] [blame]	1492	return false;
				1493	}
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1494
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1495	/// ShrinkDemandedOp - Convert x+y to (VT)((SmallVT)x+(SmallVT)y) if the
				1496	/// casts are free. This uses isZExtFree and ZERO_EXTEND for the widening
				1497	/// cast, but it could be generalized for targets with other types of
				1498	/// implicit widening casts.
				1499	bool
				1500	TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(SDValue Op,
				1501	unsigned BitWidth,
				1502	const APInt &Demanded,
				1503	DebugLoc dl) {
				1504	assert(Op.getNumOperands() == 2 &&
				1505	"ShrinkDemandedOp only supports binary operators!");
				1506	assert(Op.getNode()->getNumValues() == 1 &&
				1507	"ShrinkDemandedOp only supports nodes with one result!");
				1508
				1509	// Don't do this if the node has another user, which may require the
				1510	// full value.
				1511	if (!Op.getNode()->hasOneUse())
				1512	return false;
				1513
				1514	// Search for the smallest integer type with free casts to and from
				1515	// Op's type. For expedience, just check power-of-2 integer types.
				1516	const TargetLowering &TLI = DAG.getTargetLoweringInfo();
Nadav Rotem	bf5a2c6	2012-12-19 07:39:08 +0000	[diff] [blame]	1517	unsigned DemandedSize = BitWidth - Demanded.countLeadingZeros();
				1518	unsigned SmallVTBits = DemandedSize;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1519	if (!isPowerOf2_32(SmallVTBits))
				1520	SmallVTBits = NextPowerOf2(SmallVTBits);
				1521	for (; SmallVTBits < BitWidth; SmallVTBits = NextPowerOf2(SmallVTBits)) {
Owen Anderson	23b9b19	2009-08-12 00:36:31 +0000	[diff] [blame]	1522	EVT SmallVT = EVT::getIntegerVT(*DAG.getContext(), SmallVTBits);
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1523	if (TLI.isTruncateFree(Op.getValueType(), SmallVT) &&
				1524	TLI.isZExtFree(SmallVT, Op.getValueType())) {
				1525	// We found a type with free casts.
				1526	SDValue X = DAG.getNode(Op.getOpcode(), dl, SmallVT,
				1527	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1528	Op.getNode()->getOperand(0)),
				1529	DAG.getNode(ISD::TRUNCATE, dl, SmallVT,
				1530	Op.getNode()->getOperand(1)));
Nadav Rotem	bf5a2c6	2012-12-19 07:39:08 +0000	[diff] [blame]	1531	bool NeedZext = DemandedSize > SmallVTBits;
				1532	SDValue Z = DAG.getNode(NeedZext ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND,
				1533	dl, Op.getValueType(), X);
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1534	return CombineTo(Op, Z);
				1535	}
				1536	}
				1537	return false;
				1538	}
				1539
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1540	/// SimplifyDemandedBits - Look at Op. At this point, we know that only the
Chad Rosier	8c1ec5a	2011-06-11 02:27:46 +0000	[diff] [blame]	1541	/// DemandedMask bits of the result of Op are ever used downstream. If we can
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1542	/// use this information to simplify Op, create a new simplified DAG node and
				1543	/// return true, returning the original and new nodes in Old and New. Otherwise,
				1544	/// analyze the expression and return a mask of KnownOne and KnownZero bits for
				1545	/// the expression (used to simplify the caller). The KnownZero/One bits may
				1546	/// only be accurate for those bits in the DemandedMask.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1547	bool TargetLowering::SimplifyDemandedBits(SDValue Op,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1548	const APInt &DemandedMask,
				1549	APInt &KnownZero,
				1550	APInt &KnownOne,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1551	TargetLoweringOpt &TLO,
				1552	unsigned Depth) const {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1553	unsigned BitWidth = DemandedMask.getBitWidth();
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1554	assert(Op.getValueType().getScalarType().getSizeInBits() == BitWidth &&
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1555	"Mask size mismatches value type size!");
				1556	APInt NewMask = DemandedMask;
Dale Johannesen	6f38cb6	2009-02-07 19:59:05 +0000	[diff] [blame]	1557	DebugLoc dl = Op.getDebugLoc();
Chris Lattner	3fc5b01	2007-05-17 18:19:23 +0000	[diff] [blame]	1558
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1559	// Don't know anything.
				1560	KnownZero = KnownOne = APInt(BitWidth, 0);
				1561
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1562	// Other users may use these bits.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1563	if (!Op.getNode()->hasOneUse()) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1564	if (Depth != 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1565	// If not at the root, Just compute the KnownZero/KnownOne bits to
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1566	// simplify things downstream.
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1567	TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1568	return false;
				1569	}
				1570	// If this is the root being simplified, allow it to have multiple uses,
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1571	// just set the NewMask to all bits.
				1572	NewMask = APInt::getAllOnesValue(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1573	} else if (DemandedMask == 0) {
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1574	// Not demanding any bits from Op.
				1575	if (Op.getOpcode() != ISD::UNDEF)
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	1576	return TLO.CombineTo(Op, TLO.DAG.getUNDEF(Op.getValueType()));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1577	return false;
				1578	} else if (Depth == 6) { // Limit search depth.
				1579	return false;
				1580	}
				1581
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1582	APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1583	switch (Op.getOpcode()) {
				1584	case ISD::Constant:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1585	// We know all of the bits for a constant!
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1586	KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
				1587	KnownZero = ~KnownOne;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1588	return false; // Don't fall through, will infinitely loop.
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1589	case ISD::AND:
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1590	// If the RHS is a constant, check to see if the LHS would be zero without
				1591	// using the bits from the RHS. Below, we use knowledge about the RHS to
				1592	// simplify the LHS, here we're using information from the LHS to simplify
				1593	// the RHS.
				1594	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1595	APInt LHSZero, LHSOne;
Dale Johannesen	97fd9a5	2011-01-10 21:53:07 +0000	[diff] [blame]	1596	// Do not increment Depth here; that can cause an infinite loop.
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	1597	TLO.DAG.ComputeMaskedBits(Op.getOperand(0), LHSZero, LHSOne, Depth);
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1598	// If the LHS already has zeros where RHSC does, this and is dead.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1599	if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1600	return TLO.CombineTo(Op, Op.getOperand(0));
				1601	// If any of the set bits in the RHS are known zero on the LHS, shrink
				1602	// the constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1603	if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask))
Chris Lattner	81cd355	2006-02-27 00:36:27 +0000	[diff] [blame]	1604	return true;
				1605	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1606
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1607	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1608	KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1609	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1610	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1611	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1612	KnownZero2, KnownOne2, TLO, Depth+1))
				1613	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1614	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1615
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1616	// If all of the demanded bits are known one on one side, return the other.
				1617	// These bits cannot contribute to the result of the 'and'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1618	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1619	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1620	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1621	return TLO.CombineTo(Op, Op.getOperand(1));
				1622	// If all of the demanded bits in the inputs are known zeros, return zero.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1623	if ((NewMask & (KnownZero\|KnownZero2)) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1624	return TLO.CombineTo(Op, TLO.DAG.getConstant(0, Op.getValueType()));
				1625	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1626	if (TLO.ShrinkDemandedConstant(Op, ~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1627	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1628	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1629	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1630	return true;
				1631
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1632	// Output known-1 bits are only known if set in both the LHS & RHS.
				1633	KnownOne &= KnownOne2;
				1634	// Output known-0 are known to be clear if zero in either the LHS \| RHS.
				1635	KnownZero \|= KnownZero2;
				1636	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1637	case ISD::OR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1638	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1639	KnownOne, TLO, Depth+1))
				1640	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1641	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1642	if (SimplifyDemandedBits(Op.getOperand(0), ~KnownOne & NewMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1643	KnownZero2, KnownOne2, TLO, Depth+1))
				1644	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1645	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1646
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1647	// If all of the demanded bits are known zero on one side, return the other.
				1648	// These bits cannot contribute to the result of the 'or'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1649	if ((NewMask & ~KnownOne2 & KnownZero) == (~KnownOne2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1650	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1651	if ((NewMask & ~KnownOne & KnownZero2) == (~KnownOne & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1652	return TLO.CombineTo(Op, Op.getOperand(1));
				1653	// If all of the potentially set bits on one side are known to be set on
				1654	// the other side, just use the 'other' side.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1655	if ((NewMask & ~KnownZero & KnownOne2) == (~KnownZero & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1656	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1657	if ((NewMask & ~KnownZero2 & KnownOne) == (~KnownZero2 & NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1658	return TLO.CombineTo(Op, Op.getOperand(1));
				1659	// If the RHS is a constant, see if we can simplify it.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1660	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1661	return true;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1662	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1663	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1664	return true;
				1665
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1666	// Output known-0 bits are only known if clear in both the LHS & RHS.
				1667	KnownZero &= KnownZero2;
				1668	// Output known-1 are known to be set if set in either the LHS \| RHS.
				1669	KnownOne \|= KnownOne2;
				1670	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1671	case ISD::XOR:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1672	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1673	KnownOne, TLO, Depth+1))
				1674	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1675	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1676	if (SimplifyDemandedBits(Op.getOperand(0), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1677	KnownOne2, TLO, Depth+1))
				1678	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1679	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1680
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1681	// If all of the demanded bits are known zero on one side, return the other.
				1682	// These bits cannot contribute to the result of the 'xor'.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1683	if ((KnownZero & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1684	return TLO.CombineTo(Op, Op.getOperand(0));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1685	if ((KnownZero2 & NewMask) == NewMask)
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1686	return TLO.CombineTo(Op, Op.getOperand(1));
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1687	// If the operation can be done in a smaller type, do so.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	1688	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	1689	return true;
				1690
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1691	// If all of the unknown bits are known to be zero on one side or the other
				1692	// (but not both) turn this into an inclusive or.
Sylvestre Ledru	94c2271	2012-09-27 10:14:43 +0000	[diff] [blame]	1693	// e.g. (A & C1)^(B & C2) -> (A & C1)\|(B & C2) iff C1&C2 == 0
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1694	if ((NewMask & ~KnownZero & ~KnownZero2) == 0)
Dale Johannesen	de06470	2009-02-06 21:50:26 +0000	[diff] [blame]	1695	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::OR, dl, Op.getValueType(),
Chris Lattner	3687c1a	2006-11-27 21:50:02 +0000	[diff] [blame]	1696	Op.getOperand(0),
				1697	Op.getOperand(1)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1698
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1699	// Output known-0 bits are known if clear or set in both the LHS & RHS.
				1700	KnownZeroOut = (KnownZero & KnownZero2) \| (KnownOne & KnownOne2);
				1701	// Output known-1 are known to be set if set in only one of the LHS, RHS.
				1702	KnownOneOut = (KnownZero & KnownOne2) \| (KnownOne & KnownZero2);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1703
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1704	// If all of the demanded bits on one side are known, and all of the set
				1705	// bits on that side are also known to be set on the other side, turn this
				1706	// into an AND, as we know the bits will be cleared.
Sylvestre Ledru	94c2271	2012-09-27 10:14:43 +0000	[diff] [blame]	1707	// e.g. (X \| C1) ^ C2 --> (X \| C1) & ~C2 iff (C1&C2) == C2
Joel Jones	d16ce17	2012-04-17 22:23:10 +0000	[diff] [blame]	1708	// NB: it is okay if more bits are known than are requested
				1709	if ((NewMask & (KnownZero\|KnownOne)) == NewMask) { // all known on one side
				1710	if (KnownOne == KnownOne2) { // set bits are the same on both sides
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1711	EVT VT = Op.getValueType();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1712	SDValue ANDC = TLO.DAG.getConstant(~KnownOne & NewMask, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1713	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::AND, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1714	Op.getOperand(0), ANDC));
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1715	}
				1716	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1717
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1718	// If the RHS is a constant, see if we can simplify it.
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1719	// for XOR, we prefer to force bits to 1 if they will make a -1.
				1720	// if we can't force bits, try to shrink constant
				1721	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
				1722	APInt Expanded = C->getAPIntValue() \| (~NewMask);
				1723	// if we can expand it to have all bits set, do it
				1724	if (Expanded.isAllOnesValue()) {
				1725	if (Expanded != C->getAPIntValue()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1726	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1727	SDValue New = TLO.DAG.getNode(Op.getOpcode(), dl,VT, Op.getOperand(0),
Torok Edwin	4fea2e9	2008-04-06 21:23:02 +0000	[diff] [blame]	1728	TLO.DAG.getConstant(Expanded, VT));
				1729	return TLO.CombineTo(Op, New);
				1730	}
				1731	// if it already has all the bits set, nothing to change
				1732	// but don't shrink either!
				1733	} else if (TLO.ShrinkDemandedConstant(Op, NewMask)) {
				1734	return true;
				1735	}
				1736	}
				1737
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1738	KnownZero = KnownZeroOut;
				1739	KnownOne = KnownOneOut;
				1740	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1741	case ISD::SELECT:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1742	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1743	KnownOne, TLO, Depth+1))
				1744	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1745	if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero2,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1746	KnownOne2, TLO, Depth+1))
				1747	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1748	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1749	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1750
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1751	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1752	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1753	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1754
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1755	// Only known if known in both the LHS and RHS.
				1756	KnownOne &= KnownOne2;
				1757	KnownZero &= KnownZero2;
				1758	break;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1759	case ISD::SELECT_CC:
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1760	if (SimplifyDemandedBits(Op.getOperand(3), NewMask, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1761	KnownOne, TLO, Depth+1))
				1762	return true;
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1763	if (SimplifyDemandedBits(Op.getOperand(2), NewMask, KnownZero2,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1764	KnownOne2, TLO, Depth+1))
				1765	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1766	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
				1767	assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
				1768
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1769	// If the operands are constants, see if we can simplify them.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1770	if (TLO.ShrinkDemandedConstant(Op, NewMask))
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1771	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1772
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1773	// Only known if known in both the LHS and RHS.
				1774	KnownOne &= KnownOne2;
				1775	KnownZero &= KnownZero2;
				1776	break;
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1777	case ISD::SHL:
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1778	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1779	unsigned ShAmt = SA->getZExtValue();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1780	SDValue InOp = Op.getOperand(0);
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1781
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1782	// If the shift count is an invalid immediate, don't do anything.
				1783	if (ShAmt >= BitWidth)
				1784	break;
				1785
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1786	// If this is ((X >>u C1) << ShAmt), see if we can simplify this into a
				1787	// single shift. We can do this if the bottom bits (which are shifted
				1788	// out) are never demanded.
				1789	if (InOp.getOpcode() == ISD::SRL &&
				1790	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1791	if (ShAmt && (NewMask & APInt::getLowBitsSet(BitWidth, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1792	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1793	unsigned Opc = ISD::SHL;
				1794	int Diff = ShAmt-C1;
				1795	if (Diff < 0) {
				1796	Diff = -Diff;
				1797	Opc = ISD::SRL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1798	}
				1799
				1800	SDValue NewSA =
Chris Lattner	4e7e6cd	2007-05-30 16:30:06 +0000	[diff] [blame]	1801	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1802	EVT VT = Op.getValueType();
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1803	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1804	InOp.getOperand(0), NewSA));
				1805	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1806	}
				1807
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1808	if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1809	KnownZero, KnownOne, TLO, Depth+1))
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1810	return true;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1811
				1812	// Convert (shl (anyext x, c)) to (anyext (shl x, c)) if the high bits
				1813	// are not demanded. This will likely allow the anyext to be folded away.
				1814	if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) {
				1815	SDValue InnerOp = InOp.getNode()->getOperand(0);
				1816	EVT InnerVT = InnerOp.getValueType();
Eli Friedman	2dd0353	2011-12-09 01:16:26 +0000	[diff] [blame]	1817	unsigned InnerBits = InnerVT.getSizeInBits();
				1818	if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 &&
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1819	isTypeDesirableForOp(ISD::SHL, InnerVT)) {
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	1820	EVT ShTy = getShiftAmountTy(InnerVT);
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1821	if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits()))
				1822	ShTy = InnerVT;
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1823	SDValue NarrowShl =
				1824	TLO.DAG.getNode(ISD::SHL, dl, InnerVT, InnerOp,
Dan Gohman	cd20c6f	2010-07-23 21:08:12 +0000	[diff] [blame]	1825	TLO.DAG.getConstant(ShAmt, ShTy));
Dan Gohman	a4f4d69	2010-07-23 18:03:30 +0000	[diff] [blame]	1826	return
				1827	TLO.CombineTo(Op,
				1828	TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(),
				1829	NarrowShl));
				1830	}
				1831	}
				1832
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1833	KnownZero <<= SA->getZExtValue();
				1834	KnownOne <<= SA->getZExtValue();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1835	// low bits known zero.
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1836	KnownZero \|= APInt::getLowBitsSet(BitWidth, SA->getZExtValue());
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	1837	}
				1838	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1839	case ISD::SRL:
				1840	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1841	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1842	unsigned ShAmt = SA->getZExtValue();
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	1843	unsigned VTSize = VT.getSizeInBits();
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1844	SDValue InOp = Op.getOperand(0);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1845
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1846	// If the shift count is an invalid immediate, don't do anything.
				1847	if (ShAmt >= BitWidth)
				1848	break;
				1849
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1850	// If this is ((X << C1) >>u ShAmt), see if we can simplify this into a
				1851	// single shift. We can do this if the top bits (which are shifted out)
				1852	// are never demanded.
				1853	if (InOp.getOpcode() == ISD::SHL &&
				1854	isa<ConstantSDNode>(InOp.getOperand(1))) {
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1855	if (ShAmt && (NewMask & APInt::getHighBitsSet(VTSize, ShAmt)) == 0) {
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1856	unsigned C1= cast<ConstantSDNode>(InOp.getOperand(1))->getZExtValue();
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1857	unsigned Opc = ISD::SRL;
				1858	int Diff = ShAmt-C1;
				1859	if (Diff < 0) {
				1860	Diff = -Diff;
				1861	Opc = ISD::SHL;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1862	}
				1863
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	1864	SDValue NewSA =
Chris Lattner	8c7d2d5	2007-04-17 22:53:02 +0000	[diff] [blame]	1865	TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1866	return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, dl, VT,
Chris Lattner	895c4ab	2007-04-17 21:14:16 +0000	[diff] [blame]	1867	InOp.getOperand(0), NewSA));
				1868	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1869	}
				1870
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1871	// Compute the new bits that are at the top now.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1872	if (SimplifyDemandedBits(InOp, (NewMask << ShAmt),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1873	KnownZero, KnownOne, TLO, Depth+1))
				1874	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1875	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1876	KnownZero = KnownZero.lshr(ShAmt);
				1877	KnownOne = KnownOne.lshr(ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1878
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1879	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
Chris Lattner	c4fa603	2006-06-13 16:52:37 +0000	[diff] [blame]	1880	KnownZero \|= HighBits; // High bits known zero.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1881	}
				1882	break;
				1883	case ISD::SRA:
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1884	// If this is an arithmetic shift right and only the low-bit is set, we can
				1885	// always convert this into a logical shr, even if the shift amount is
				1886	// variable. The low bit of the shift cannot be an input sign bit unless
				1887	// the shift amount is >= the size of the datatype, which is undefined.
Eli Friedman	2dd0353	2011-12-09 01:16:26 +0000	[diff] [blame]	1888	if (NewMask == 1)
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	1889	return TLO.CombineTo(Op,
				1890	TLO.DAG.getNode(ISD::SRL, dl, Op.getValueType(),
				1891	Op.getOperand(0), Op.getOperand(1)));
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	1892
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1893	if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	1894	EVT VT = Op.getValueType();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	1895	unsigned ShAmt = SA->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1896
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1897	// If the shift count is an invalid immediate, don't do anything.
				1898	if (ShAmt >= BitWidth)
				1899	break;
				1900
				1901	APInt InDemandedMask = (NewMask << ShAmt);
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1902
				1903	// If any of the demanded bits are produced by the sign extension, we also
				1904	// demand the input sign bit.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1905	APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
				1906	if (HighBits.intersects(NewMask))
Dan Gohman	87862e7	2009-12-11 21:31:27 +0000	[diff] [blame]	1907	InDemandedMask \|= APInt::getSignBit(VT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1908
Chris Lattner	1b73713	2006-05-08 17:22:53 +0000	[diff] [blame]	1909	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedMask,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1910	KnownZero, KnownOne, TLO, Depth+1))
				1911	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1912	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1913	KnownZero = KnownZero.lshr(ShAmt);
				1914	KnownOne = KnownOne.lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1915
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1916	// Handle the sign bit, adjusted to where it is now in the mask.
				1917	APInt SignBit = APInt::getSignBit(BitWidth).lshr(ShAmt);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1918
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1919	// If the input sign bit is known to be zero, or if none of the top bits
				1920	// are demanded, turn this into an unsigned shift right.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1921	if (KnownZero.intersects(SignBit) \|\| (HighBits & ~NewMask) == HighBits) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1922	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl, VT,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	1923	Op.getOperand(0),
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1924	Op.getOperand(1)));
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1925	} else if (KnownOne.intersects(SignBit)) { // New bits are known one.
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1926	KnownOne \|= HighBits;
				1927	}
				1928	}
				1929	break;
				1930	case ISD::SIGN_EXTEND_INREG: {
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1931	EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
				1932
				1933	APInt MsbMask = APInt::getHighBitsSet(BitWidth, 1);
				1934	// If we only care about the highest bit, don't bother shifting right.
Eli Friedman	d49db36	2012-01-31 01:08:03 +0000	[diff] [blame]	1935	if (MsbMask == DemandedMask) {
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1936	unsigned ShAmt = ExVT.getScalarType().getSizeInBits();
				1937	SDValue InOp = Op.getOperand(0);
Eli Friedman	d49db36	2012-01-31 01:08:03 +0000	[diff] [blame]	1938
				1939	// Compute the correct shift amount type, which must be getShiftAmountTy
				1940	// for scalar types after legalization.
				1941	EVT ShiftAmtTy = Op.getValueType();
				1942	if (TLO.LegalTypes() && !ShiftAmtTy.isVector())
				1943	ShiftAmtTy = getShiftAmountTy(ShiftAmtTy);
				1944
				1945	SDValue ShiftAmt = TLO.DAG.getConstant(BitWidth - ShAmt, ShiftAmtTy);
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1946	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
				1947	Op.getValueType(), InOp, ShiftAmt));
				1948	}
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1949
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1950	// Sign extension. Compute the demanded bits in the result that are not
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1951	// present in the input.
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1952	APInt NewBits =
				1953	APInt::getHighBitsSet(BitWidth,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1954	BitWidth - ExVT.getScalarType().getSizeInBits());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1955
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1956	// If none of the extended bits are demanded, eliminate the sextinreg.
Eli Friedman	1d17d19	2010-08-02 04:42:25 +0000	[diff] [blame]	1957	if ((NewBits & NewMask) == 0)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1958	return TLO.CombineTo(Op, Op.getOperand(0));
				1959
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1960	APInt InSignBit =
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1961	APInt::getSignBit(ExVT.getScalarType().getSizeInBits()).zext(BitWidth);
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1962	APInt InputDemandedBits =
				1963	APInt::getLowBitsSet(BitWidth,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1964	ExVT.getScalarType().getSizeInBits()) &
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1965	NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1966
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1967	// Since the sign extended bits are demanded, we know that the sign
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1968	// bit is demanded.
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1969	InputDemandedBits \|= InSignBit;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1970
				1971	if (SimplifyDemandedBits(Op.getOperand(0), InputDemandedBits,
				1972	KnownZero, KnownOne, TLO, Depth+1))
				1973	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1974	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1975
				1976	// If the sign bit of the input is known set or clear, then we know the
				1977	// top bits of the result.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1978
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1979	// If the input sign bit is known zero, convert this into a zero extension.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1980	if (KnownZero.intersects(InSignBit))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1981	return TLO.CombineTo(Op,
Nadav Rotem	cc61656	2012-01-15 19:27:55 +0000	[diff] [blame]	1982	TLO.DAG.getZeroExtendInReg(Op.getOperand(0),dl,ExVT));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1983
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1984	if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1985	KnownOne \|= NewBits;
				1986	KnownZero &= ~NewBits;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1987	} else { // Input sign bit unknown
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	1988	KnownZero &= ~NewBits;
				1989	KnownOne &= ~NewBits;
				1990	}
				1991	break;
				1992	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1993	case ISD::ZERO_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	1994	unsigned OperandBitWidth =
				1995	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	1996	APInt InMask = NewMask.trunc(OperandBitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	1997
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	1998	// If none of the top bits are demanded, convert this into an any_extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	1999	APInt NewBits =
				2000	APInt::getHighBitsSet(BitWidth, BitWidth - OperandBitWidth) & NewMask;
				2001	if (!NewBits.intersects(NewMask))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2002	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2003	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2004	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2005
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2006	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2007	KnownZero, KnownOne, TLO, Depth+1))
				2008	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2009	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2010	KnownZero = KnownZero.zext(BitWidth);
				2011	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2012	KnownZero \|= NewBits;
				2013	break;
				2014	}
				2015	case ISD::SIGN_EXTEND: {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2016	EVT InVT = Op.getOperand(0).getValueType();
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	2017	unsigned InBits = InVT.getScalarType().getSizeInBits();
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2018	APInt InMask = APInt::getLowBitsSet(BitWidth, InBits);
Dan Gohman	9736028	2008-03-11 21:29:43 +0000	[diff] [blame]	2019	APInt InSignBit = APInt::getBitsSet(BitWidth, InBits - 1, InBits);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2020	APInt NewBits = ~InMask & NewMask;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2021
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2022	// If none of the top bits are demanded, convert this into an any_extend.
				2023	if (NewBits == 0)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2024	return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl,
				2025	Op.getValueType(),
				2026	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2027
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2028	// Since some of the sign extended bits are demanded, we know that the sign
				2029	// bit is demanded.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2030	APInt InDemandedBits = InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2031	InDemandedBits \|= InSignBit;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2032	InDemandedBits = InDemandedBits.trunc(InBits);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2033
				2034	if (SimplifyDemandedBits(Op.getOperand(0), InDemandedBits, KnownZero,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2035	KnownOne, TLO, Depth+1))
				2036	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2037	KnownZero = KnownZero.zext(BitWidth);
				2038	KnownOne = KnownOne.zext(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2039
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2040	// If the sign bit is known zero, convert this to a zero extend.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2041	if (KnownZero.intersects(InSignBit))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2042	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ZERO_EXTEND, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2043	Op.getValueType(),
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2044	Op.getOperand(0)));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2045
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2046	// If the sign bit is known one, the top bits match.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2047	if (KnownOne.intersects(InSignBit)) {
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	2048	KnownOne \|= NewBits;
				2049	assert((KnownZero & NewBits) == 0);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2050	} else { // Otherwise, top bits aren't known.
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	2051	assert((KnownOne & NewBits) == 0);
				2052	assert((KnownZero & NewBits) == 0);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2053	}
				2054	break;
				2055	}
				2056	case ISD::ANY_EXTEND: {
Dan Gohman	d199636	2010-01-09 02:13:55 +0000	[diff] [blame]	2057	unsigned OperandBitWidth =
				2058	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2059	APInt InMask = NewMask.trunc(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2060	if (SimplifyDemandedBits(Op.getOperand(0), InMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2061	KnownZero, KnownOne, TLO, Depth+1))
				2062	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2063	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2064	KnownZero = KnownZero.zext(BitWidth);
				2065	KnownOne = KnownOne.zext(BitWidth);
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2066	break;
				2067	}
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	2068	case ISD::TRUNCATE: {
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	2069	// Simplify the input, using demanded bit information, and compute the known
				2070	// zero/one bits live out.
Dan Gohman	042919c	2010-03-01 17:59:21 +0000	[diff] [blame]	2071	unsigned OperandBitWidth =
				2072	Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2073	APInt TruncMask = NewMask.zext(OperandBitWidth);
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2074	if (SimplifyDemandedBits(Op.getOperand(0), TruncMask,
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	2075	KnownZero, KnownOne, TLO, Depth+1))
				2076	return true;
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2077	KnownZero = KnownZero.trunc(BitWidth);
				2078	KnownOne = KnownOne.trunc(BitWidth);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2079
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	2080	// If the input is only used by this truncate, see if we can shrink it based
				2081	// on the known demanded bits.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2082	if (Op.getOperand(0).getNode()->hasOneUse()) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2083	SDValue In = Op.getOperand(0);
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	2084	switch (In.getOpcode()) {
				2085	default: break;
				2086	case ISD::SRL:
				2087	// Shrink SRL by a constant if none of the high bits shifted in are
				2088	// demanded.
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	2089	if (TLO.LegalTypes() &&
				2090	!isTypeDesirableForOp(ISD::SRL, Op.getValueType()))
				2091	// Do not turn (vt1 truncate (vt2 srl)) into (vt1 srl) if vt1 is
				2092	// undesirable.
				2093	break;
				2094	ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(In.getOperand(1));
				2095	if (!ShAmt)
				2096	break;
Owen Anderson	7adf862	2011-04-13 23:22:23 +0000	[diff] [blame]	2097	SDValue Shift = In.getOperand(1);
				2098	if (TLO.LegalTypes()) {
				2099	uint64_t ShVal = ShAmt->getZExtValue();
				2100	Shift =
				2101	TLO.DAG.getConstant(ShVal, getShiftAmountTy(Op.getValueType()));
				2102	}
				2103
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	2104	APInt HighBits = APInt::getHighBitsSet(OperandBitWidth,
				2105	OperandBitWidth - BitWidth);
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2106	HighBits = HighBits.lshr(ShAmt->getZExtValue()).trunc(BitWidth);
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	2107
				2108	if (ShAmt->getZExtValue() < BitWidth && !(HighBits & NewMask)) {
				2109	// None of the shifted in bits are needed. Add a truncate of the
				2110	// shift input, then shift it.
				2111	SDValue NewTrunc = TLO.DAG.getNode(ISD::TRUNCATE, dl,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2112	Op.getValueType(),
Evan Cheng	e5b51ac	2010-04-17 06:13:15 +0000	[diff] [blame]	2113	In.getOperand(0));
				2114	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, dl,
				2115	Op.getValueType(),
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2116	NewTrunc,
Owen Anderson	7adf862	2011-04-13 23:22:23 +0000	[diff] [blame]	2117	Shift));
Chris Lattner	c93dfda	2006-05-06 00:11:52 +0000	[diff] [blame]	2118	}
				2119	break;
				2120	}
				2121	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2122
				2123	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Chris Lattner	fe8babf	2006-05-05 22:32:12 +0000	[diff] [blame]	2124	break;
				2125	}
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2126	case ISD::AssertZext: {
Owen Anderson	7ab15f6	2011-09-03 00:26:49 +0000	[diff] [blame]	2127	// AssertZext demands all of the high bits, plus any of the low bits
				2128	// demanded by its users.
				2129	EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
				2130	APInt InMask = APInt::getLowBitsSet(BitWidth,
				2131	VT.getSizeInBits());
				2132	if (SimplifyDemandedBits(Op.getOperand(0), ~InMask \| NewMask,
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2133	KnownZero, KnownOne, TLO, Depth+1))
				2134	return true;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2135	assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
Dan Gohman	400f75c	2010-06-03 20:21:33 +0000	[diff] [blame]	2136
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2137	KnownZero \|= ~InMask & NewMask;
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2138	break;
				2139	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2140	case ISD::BITCAST:
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	2141	// If this is an FP->Int bitcast and if the sign bit is the only
				2142	// thing demanded, turn this into a FGETSIGN.
Eli Friedman	ca072a3	2011-12-15 02:07:20 +0000	[diff] [blame]	2143	if (!TLO.LegalOperations() &&
				2144	!Op.getValueType().isVector() &&
Eli Friedman	0948f0a	2011-11-09 22:25:12 +0000	[diff] [blame]	2145	!Op.getOperand(0).getValueType().isVector() &&
Nadav Rotem	0c3e678	2011-06-12 14:56:55 +0000	[diff] [blame]	2146	NewMask == APInt::getSignBit(Op.getValueType().getSizeInBits()) &&
				2147	Op.getOperand(0).getValueType().isFloatingPoint()) {
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	2148	bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, Op.getValueType());
				2149	bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32);
				2150	if ((OpVTLegal \|\| i32Legal) && Op.getValueType().isSimple()) {
				2151	EVT Ty = OpVTLegal ? Op.getValueType() : MVT::i32;
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	2152	// Make a FGETSIGN + SHL to move the sign bit into the appropriate
				2153	// place. We expect the SHL to be eliminated by other optimizations.
Stuart Hastings	090bf19	2011-06-01 18:32:25 +0000	[diff] [blame]	2154	SDValue Sign = TLO.DAG.getNode(ISD::FGETSIGN, dl, Ty, Op.getOperand(0));
Stuart Hastings	57f1fde	2011-06-06 16:44:31 +0000	[diff] [blame]	2155	unsigned OpVTSizeInBits = Op.getValueType().getSizeInBits();
				2156	if (!OpVTLegal && OpVTSizeInBits > 32)
Stuart Hastings	090bf19	2011-06-01 18:32:25 +0000	[diff] [blame]	2157	Sign = TLO.DAG.getNode(ISD::ZERO_EXTEND, dl, Op.getValueType(), Sign);
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2158	unsigned ShVal = Op.getValueType().getSizeInBits()-1;
Stuart Hastings	bdce372	2011-06-01 14:04:17 +0000	[diff] [blame]	2159	SDValue ShAmt = TLO.DAG.getConstant(ShVal, Op.getValueType());
Stuart Hastings	3dfc4b12	2011-05-19 18:48:20 +0000	[diff] [blame]	2160	return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SHL, dl,
				2161	Op.getValueType(),
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	2162	Sign, ShAmt));
				2163	}
				2164	}
Chris Lattner	2ceb2cf	2007-12-22 21:35:38 +0000	[diff] [blame]	2165	break;
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	2166	case ISD::ADD:
				2167	case ISD::MUL:
				2168	case ISD::SUB: {
				2169	// Add, Sub, and Mul don't demand any bits in positions beyond that
				2170	// of the highest bit demanded of them.
				2171	APInt LoMask = APInt::getLowBitsSet(BitWidth,
				2172	BitWidth - NewMask.countLeadingZeros());
				2173	if (SimplifyDemandedBits(Op.getOperand(0), LoMask, KnownZero2,
				2174	KnownOne2, TLO, Depth+1))
				2175	return true;
				2176	if (SimplifyDemandedBits(Op.getOperand(1), LoMask, KnownZero2,
				2177	KnownOne2, TLO, Depth+1))
				2178	return true;
				2179	// See if the operation should be performed at a smaller bit width.
Dan Gohman	4e39e9d	2010-06-24 14:30:44 +0000	[diff] [blame]	2180	if (TLO.ShrinkDemandedOp(Op, BitWidth, NewMask, dl))
Dan Gohman	97121ba	2009-04-08 00:15:30 +0000	[diff] [blame]	2181	return true;
				2182	}
				2183	// FALL THROUGH
Dan Gohman	54eed37	2008-05-06 00:53:29 +0000	[diff] [blame]	2184	default:
Chris Lattner	1482b5f	2006-04-02 06:15:09 +0000	[diff] [blame]	2185	// Just use ComputeMaskedBits to compute output bits.
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	2186	TLO.DAG.ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
Chris Lattner	a6bc5a4	2006-02-27 01:00:42 +0000	[diff] [blame]	2187	break;
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	2188	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2189
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2190	// If we know the value of all of the demanded bits, return this as a
				2191	// constant.
Dan Gohman	7b8d4a9	2008-02-27 00:25:32 +0000	[diff] [blame]	2192	if ((NewMask & (KnownZero\|KnownOne)) == NewMask)
Chris Lattner	ec66515	2006-02-26 23:36:02 +0000	[diff] [blame]	2193	return TLO.CombineTo(Op, TLO.DAG.getConstant(KnownOne, Op.getValueType()));
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2194
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	2195	return false;
				2196	}
				2197
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2198	/// computeMaskedBitsForTargetNode - Determine which of the bits specified
				2199	/// in Mask are known to be either zero or one and return them in the
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	2200	/// KnownZero/KnownOne bitsets.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2201	void TargetLowering::computeMaskedBitsForTargetNode(const SDValue Op,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2202	APInt &KnownZero,
Dan Gohman	fd29e0e	2008-02-13 00:35:47 +0000	[diff] [blame]	2203	APInt &KnownOne,
Dan Gohman	ea859be	2007-06-22 14:59:07 +0000	[diff] [blame]	2204	const SelectionDAG &DAG,
Nate Begeman	368e18d	2006-02-16 21:11:51 +0000	[diff] [blame]	2205	unsigned Depth) const {
Chris Lattner	1b5232a	2006-04-02 06:19:46 +0000	[diff] [blame]	2206	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				2207	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				2208	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				2209	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
Chris Lattner	c6fd6cd	2006-01-30 04:09:27 +0000	[diff] [blame]	2210	"Should use MaskedValueIsZero if you don't know whether Op"
				2211	" is a target node!");
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	2212	KnownZero = KnownOne = APInt(KnownOne.getBitWidth(), 0);
Evan Cheng	3a03ebb	2005-12-21 23:05:39 +0000	[diff] [blame]	2213	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	2214
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	2215	/// ComputeNumSignBitsForTargetNode - This method can be implemented by
				2216	/// targets that want to expose additional information about sign bits to the
				2217	/// DAG Combiner.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2218	unsigned TargetLowering::ComputeNumSignBitsForTargetNode(SDValue Op,
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	2219	unsigned Depth) const {
				2220	assert((Op.getOpcode() >= ISD::BUILTIN_OP_END \|\|
				2221	Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN \|\|
				2222	Op.getOpcode() == ISD::INTRINSIC_W_CHAIN \|\|
				2223	Op.getOpcode() == ISD::INTRINSIC_VOID) &&
				2224	"Should use ComputeNumSignBits if you don't know whether Op"
				2225	" is a target node!");
				2226	return 1;
				2227	}
				2228
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	2229	/// ValueHasExactlyOneBitSet - Test if the given value is known to have exactly
				2230	/// one bit set. This differs from ComputeMaskedBits in that it doesn't need to
				2231	/// determine which bit is set.
				2232	///
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2233	static bool ValueHasExactlyOneBitSet(SDValue Val, const SelectionDAG &DAG) {
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	2234	// A left-shift of a constant one will have exactly one bit set, because
				2235	// shifting the bit off the end is undefined.
				2236	if (Val.getOpcode() == ISD::SHL)
				2237	if (ConstantSDNode *C =
				2238	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				2239	if (C->getAPIntValue() == 1)
				2240	return true;
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2241
Dan Gohman	97d1163	2009-02-15 23:59:32 +0000	[diff] [blame]	2242	// Similarly, a right-shift of a constant sign-bit will have exactly
				2243	// one bit set.
				2244	if (Val.getOpcode() == ISD::SRL)
				2245	if (ConstantSDNode *C =
				2246	dyn_cast<ConstantSDNode>(Val.getNode()->getOperand(0)))
				2247	if (C->getAPIntValue().isSignBit())
				2248	return true;
				2249
				2250	// More could be done here, though the above checks are enough
				2251	// to handle some common cases.
				2252
				2253	// Fall back to ComputeMaskedBits to catch other known cases.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2254	EVT OpVT = Val.getValueType();
Dan Gohman	5b870af	2010-03-02 02:14:38 +0000	[diff] [blame]	2255	unsigned BitWidth = OpVT.getScalarType().getSizeInBits();
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2256	APInt KnownZero, KnownOne;
Rafael Espindola	26c8dcc	2012-04-04 12:51:34 +0000	[diff] [blame]	2257	DAG.ComputeMaskedBits(Val, KnownZero, KnownOne);
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2258	return (KnownZero.countPopulation() == BitWidth - 1) &&
				2259	(KnownOne.countPopulation() == 1);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2260	}
Chris Lattner	5c3e21d	2006-05-06 09:27:13 +0000	[diff] [blame]	2261
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2262	/// SimplifySetCC - Try to simplify a setcc built with the specified operands
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2263	/// and cc. If it is unable to simplify it, return a null SDValue.
				2264	SDValue
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2265	TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2266	ISD::CondCode Cond, bool foldBooleans,
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2267	DAGCombinerInfo &DCI, DebugLoc dl) const {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2268	SelectionDAG &DAG = DCI.DAG;
				2269
				2270	// These setcc operations always fold.
				2271	switch (Cond) {
				2272	default: break;
				2273	case ISD::SETFALSE:
				2274	case ISD::SETFALSE2: return DAG.getConstant(0, VT);
				2275	case ISD::SETTRUE:
				2276	case ISD::SETTRUE2: return DAG.getConstant(1, VT);
				2277	}
				2278
Chris Lattner	7a2bdde	2011-04-15 05:18:47 +0000	[diff] [blame]	2279	// Ensure that the constant occurs on the RHS, and fold constant
				2280	// comparisons.
				2281	if (isa<ConstantSDNode>(N0.getNode()))
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2282	return DAG.getSetCC(dl, VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	2283
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2284	if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
Dan Gohman	6c6cd1c	2008-03-03 22:22:56 +0000	[diff] [blame]	2285	const APInt &C1 = N1C->getAPIntValue();
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2286
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2287	// If the LHS is '(srl (ctlz x), 5)', the RHS is 0/1, and this is an
				2288	// equality comparison, then we're just comparing whether X itself is
				2289	// zero.
				2290	if (N0.getOpcode() == ISD::SRL && (C1 == 0 \|\| C1 == 1) &&
				2291	N0.getOperand(0).getOpcode() == ISD::CTLZ &&
				2292	N0.getOperand(1).getOpcode() == ISD::Constant) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2293	const APInt &ShAmt
				2294	= cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2295	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
				2296	ShAmt == Log2_32(N0.getValueType().getSizeInBits())) {
				2297	if ((C1 == 0) == (Cond == ISD::SETEQ)) {
				2298	// (srl (ctlz x), 5) == 0 -> X != 0
				2299	// (srl (ctlz x), 5) != 1 -> X != 0
				2300	Cond = ISD::SETNE;
				2301	} else {
				2302	// (srl (ctlz x), 5) != 0 -> X == 0
				2303	// (srl (ctlz x), 5) == 1 -> X == 0
				2304	Cond = ISD::SETEQ;
				2305	}
				2306	SDValue Zero = DAG.getConstant(0, N0.getValueType());
				2307	return DAG.getSetCC(dl, VT, N0.getOperand(0).getOperand(0),
				2308	Zero, Cond);
				2309	}
				2310	}
				2311
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	2312	SDValue CTPOP = N0;
				2313	// Look through truncs that don't change the value of a ctpop.
				2314	if (N0.hasOneUse() && N0.getOpcode() == ISD::TRUNCATE)
				2315	CTPOP = N0.getOperand(0);
				2316
				2317	if (CTPOP.hasOneUse() && CTPOP.getOpcode() == ISD::CTPOP &&
Benjamin Kramer	c9b6a3e	2011-01-17 18:00:28 +0000	[diff] [blame]	2318	(N0 == CTPOP \|\| N0.getValueType().getSizeInBits() >
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	2319	Log2_32_Ceil(CTPOP.getValueType().getSizeInBits()))) {
				2320	EVT CTVT = CTPOP.getValueType();
				2321	SDValue CTOp = CTPOP.getOperand(0);
				2322
				2323	// (ctpop x) u< 2 -> (x & x-1) == 0
				2324	// (ctpop x) u> 1 -> (x & x-1) != 0
				2325	if ((Cond == ISD::SETULT && C1 == 2) \|\| (Cond == ISD::SETUGT && C1 == 1)){
				2326	SDValue Sub = DAG.getNode(ISD::SUB, dl, CTVT, CTOp,
				2327	DAG.getConstant(1, CTVT));
				2328	SDValue And = DAG.getNode(ISD::AND, dl, CTVT, CTOp, Sub);
				2329	ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE;
				2330	return DAG.getSetCC(dl, VT, And, DAG.getConstant(0, CTVT), CC);
				2331	}
				2332
Sylvestre Ledru	94c2271	2012-09-27 10:14:43 +0000	[diff] [blame]	2333	// TODO: (ctpop x) == 1 -> x && (x & x-1) == 0 iff ctpop is illegal.
Benjamin Kramer	d822892	2011-01-17 12:04:57 +0000	[diff] [blame]	2334	}
				2335
Benjamin Kramer	e7cf062	2011-04-22 18:47:44 +0000	[diff] [blame]	2336	// (zext x) == C --> x == (trunc C)
				2337	if (DCI.isBeforeLegalize() && N0->hasOneUse() &&
				2338	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
				2339	unsigned MinBits = N0.getValueSizeInBits();
				2340	SDValue PreZExt;
				2341	if (N0->getOpcode() == ISD::ZERO_EXTEND) {
				2342	// ZExt
				2343	MinBits = N0->getOperand(0).getValueSizeInBits();
				2344	PreZExt = N0->getOperand(0);
				2345	} else if (N0->getOpcode() == ISD::AND) {
				2346	// DAGCombine turns costly ZExts into ANDs
				2347	if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N0->getOperand(1)))
				2348	if ((C->getAPIntValue()+1).isPowerOf2()) {
				2349	MinBits = C->getAPIntValue().countTrailingOnes();
				2350	PreZExt = N0->getOperand(0);
				2351	}
				2352	} else if (LoadSDNode *LN0 = dyn_cast<LoadSDNode>(N0)) {
				2353	// ZEXTLOAD
				2354	if (LN0->getExtensionType() == ISD::ZEXTLOAD) {
				2355	MinBits = LN0->getMemoryVT().getSizeInBits();
				2356	PreZExt = N0;
				2357	}
				2358	}
				2359
Benjamin Kramer	d9b0b02	2012-06-02 10:20:22 +0000	[diff] [blame]	2360	// Make sure we're not losing bits from the constant.
Benjamin Kramer	e7cf062	2011-04-22 18:47:44 +0000	[diff] [blame]	2361	if (MinBits < C1.getBitWidth() && MinBits > C1.getActiveBits()) {
				2362	EVT MinVT = EVT::getIntegerVT(*DAG.getContext(), MinBits);
				2363	if (isTypeDesirableForOp(ISD::SETCC, MinVT)) {
				2364	// Will get folded away.
				2365	SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, MinVT, PreZExt);
				2366	SDValue C = DAG.getConstant(C1.trunc(MinBits), MinVT);
				2367	return DAG.getSetCC(dl, VT, Trunc, C, Cond);
				2368	}
				2369	}
				2370	}
				2371
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2372	// If the LHS is '(and load, const)', the RHS is 0,
				2373	// the test is for equality or unsigned, and all 1 bits of the const are
				2374	// in the same partial word, see if we can shorten the load.
				2375	if (DCI.isBeforeLegalize() &&
				2376	N0.getOpcode() == ISD::AND && C1 == 0 &&
				2377	N0.getNode()->hasOneUse() &&
				2378	isa<LoadSDNode>(N0.getOperand(0)) &&
				2379	N0.getOperand(0).getNode()->hasOneUse() &&
				2380	isa<ConstantSDNode>(N0.getOperand(1))) {
				2381	LoadSDNode *Lod = cast<LoadSDNode>(N0.getOperand(0));
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2382	APInt bestMask;
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2383	unsigned bestWidth = 0, bestOffset = 0;
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2384	if (!Lod->isVolatile() && Lod->isUnindexed()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2385	unsigned origWidth = N0.getValueType().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2386	unsigned maskWidth = origWidth;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2387	// We can narrow (e.g.) 16-bit extending loads on 32-bit target to
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2388	// 8 bits, but have to be careful...
				2389	if (Lod->getExtensionType() != ISD::NON_EXTLOAD)
				2390	origWidth = Lod->getMemoryVT().getSizeInBits();
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2391	const APInt &Mask =
				2392	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2393	for (unsigned width = origWidth / 2; width>=8; width /= 2) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2394	APInt newMask = APInt::getLowBitsSet(maskWidth, width);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2395	for (unsigned offset=0; offset<origWidth/width; offset++) {
				2396	if ((newMask & Mask) == Mask) {
				2397	if (!TD->isLittleEndian())
				2398	bestOffset = (origWidth/width - offset - 1) * (width/8);
				2399	else
				2400	bestOffset = (uint64_t)offset * (width/8);
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2401	bestMask = Mask.lshr(offset * (width/8) * 8);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2402	bestWidth = width;
				2403	break;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2404	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2405	newMask = newMask << width;
Dale Johannesen	89217a6	2008-11-07 01:28:02 +0000	[diff] [blame]	2406	}
				2407	}
				2408	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2409	if (bestWidth) {
Chris Lattner	c0c7fca	2011-04-14 04:12:47 +0000	[diff] [blame]	2410	EVT newVT = EVT::getIntegerVT(*DAG.getContext(), bestWidth);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2411	if (newVT.isRound()) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2412	EVT PtrType = Lod->getOperand(1).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2413	SDValue Ptr = Lod->getBasePtr();
				2414	if (bestOffset != 0)
				2415	Ptr = DAG.getNode(ISD::ADD, dl, PtrType, Lod->getBasePtr(),
				2416	DAG.getConstant(bestOffset, PtrType));
				2417	unsigned NewAlign = MinAlign(Lod->getAlignment(), bestOffset);
				2418	SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
Chris Lattner	ecf42c4	2010-09-21 16:36:31 +0000	[diff] [blame]	2419	Lod->getPointerInfo().getWithOffset(bestOffset),
Pete Cooper	d752e0f	2011-11-08 18:42:53 +0000	[diff] [blame]	2420	false, false, false, NewAlign);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2421	return DAG.getSetCC(dl, VT,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2422	DAG.getNode(ISD::AND, dl, newVT, NewLoad,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2423	DAG.getConstant(bestMask.trunc(bestWidth),
				2424	newVT)),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2425	DAG.getConstant(0LL, newVT), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2426	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2427	}
				2428	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2429
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2430	// If the LHS is a ZERO_EXTEND, perform the comparison on the input.
				2431	if (N0.getOpcode() == ISD::ZERO_EXTEND) {
				2432	unsigned InSize = N0.getOperand(0).getValueType().getSizeInBits();
				2433
				2434	// If the comparison constant has bits in the upper part, the
				2435	// zero-extended value could never match.
				2436	if (C1.intersects(APInt::getHighBitsSet(C1.getBitWidth(),
				2437	C1.getBitWidth() - InSize))) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2438	switch (Cond) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2439	case ISD::SETUGT:
				2440	case ISD::SETUGE:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2441	case ISD::SETEQ: return DAG.getConstant(0, VT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2442	case ISD::SETULT:
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2443	case ISD::SETULE:
				2444	case ISD::SETNE: return DAG.getConstant(1, VT);
				2445	case ISD::SETGT:
				2446	case ISD::SETGE:
				2447	// True if the sign bit of C1 is set.
				2448	return DAG.getConstant(C1.isNegative(), VT);
				2449	case ISD::SETLT:
				2450	case ISD::SETLE:
				2451	// True if the sign bit of C1 isn't set.
				2452	return DAG.getConstant(C1.isNonNegative(), VT);
				2453	default:
Jakob Stoklund Olesen	78d1264	2009-07-24 18:22:59 +0000	[diff] [blame]	2454	break;
				2455	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2456	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2457
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2458	// Otherwise, we can perform the comparison with the low bits.
				2459	switch (Cond) {
				2460	case ISD::SETEQ:
				2461	case ISD::SETNE:
				2462	case ISD::SETUGT:
				2463	case ISD::SETUGE:
				2464	case ISD::SETULT:
				2465	case ISD::SETULE: {
Patrik Hagglund	34525f9	2012-12-11 11:14:33 +0000	[diff] [blame]	2466	EVT newVT = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2467	if (DCI.isBeforeLegalizeOps() \|\|
				2468	(isOperationLegal(ISD::SETCC, newVT) &&
Patrik Hagglund	9c5ab93	2012-12-19 10:09:26 +0000	[diff] [blame]	2469	getCondCodeAction(Cond, newVT.getSimpleVT())==Legal))
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2470	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Jay Foad	40f8f62	2010-12-07 08:25:19 +0000	[diff] [blame]	2471	DAG.getConstant(C1.trunc(InSize), newVT),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2472	Cond);
				2473	break;
				2474	}
				2475	default:
				2476	break; // todo, be more careful with signed comparisons
				2477	}
				2478	} else if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2479	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2480	EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2481	unsigned ExtSrcTyBits = ExtSrcTy.getSizeInBits();
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2482	EVT ExtDstTy = N0.getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2483	unsigned ExtDstTyBits = ExtDstTy.getSizeInBits();
				2484
Eli Friedman	ad78a88	2010-07-30 06:44:31 +0000	[diff] [blame]	2485	// If the constant doesn't fit into the number of bits for the source of
				2486	// the sign extension, it is impossible for both sides to be equal.
				2487	if (C1.getMinSignedBits() > ExtSrcTyBits)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2488	return DAG.getConstant(Cond == ISD::SETNE, VT);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2489
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2490	SDValue ZextOp;
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	2491	EVT Op0Ty = N0.getOperand(0).getValueType();
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2492	if (Op0Ty == ExtSrcTy) {
				2493	ZextOp = N0.getOperand(0);
				2494	} else {
				2495	APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits);
				2496	ZextOp = DAG.getNode(ISD::AND, dl, Op0Ty, N0.getOperand(0),
				2497	DAG.getConstant(Imm, Op0Ty));
				2498	}
				2499	if (!DCI.isCalledByLegalizer())
				2500	DCI.AddToWorklist(ZextOp.getNode());
				2501	// Otherwise, make this a use of a zext.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2502	return DAG.getSetCC(dl, VT, ZextOp,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2503	DAG.getConstant(C1 & APInt::getLowBitsSet(
				2504	ExtDstTyBits,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2505	ExtSrcTyBits),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2506	ExtDstTy),
				2507	Cond);
				2508	} else if ((N1C->isNullValue() \|\| N1C->getAPIntValue() == 1) &&
				2509	(Cond == ISD::SETEQ \|\| Cond == ISD::SETNE)) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2510	// SETCC (SETCC), [0\|1], [EQ\|NE] -> SETCC
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2511	if (N0.getOpcode() == ISD::SETCC &&
				2512	isTypeLegal(VT) && VT.bitsLE(N0.getValueType())) {
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2513	bool TrueWhenTrue = (Cond == ISD::SETEQ) ^ (N1C->getAPIntValue() != 1);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2514	if (TrueWhenTrue)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2515	return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2516	// Invert the condition.
				2517	ISD::CondCode CC = cast<CondCodeSDNode>(N0.getOperand(2))->get();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2518	CC = ISD::getSetCCInverse(CC,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2519	N0.getOperand(0).getValueType().isInteger());
				2520	return DAG.getSetCC(dl, VT, N0.getOperand(0), N0.getOperand(1), CC);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2521	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2522
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2523	if ((N0.getOpcode() == ISD::XOR \|\|
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2524	(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2525	N0.getOperand(0).getOpcode() == ISD::XOR &&
				2526	N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
				2527	isa<ConstantSDNode>(N0.getOperand(1)) &&
				2528	cast<ConstantSDNode>(N0.getOperand(1))->getAPIntValue() == 1) {
				2529	// If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We
				2530	// can only do this if the top bits are known zero.
				2531	unsigned BitWidth = N0.getValueSizeInBits();
				2532	if (DAG.MaskedValueIsZero(N0,
				2533	APInt::getHighBitsSet(BitWidth,
				2534	BitWidth-1))) {
				2535	// Okay, get the un-inverted input value.
				2536	SDValue Val;
				2537	if (N0.getOpcode() == ISD::XOR)
				2538	Val = N0.getOperand(0);
				2539	else {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2540	assert(N0.getOpcode() == ISD::AND &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2541	N0.getOperand(0).getOpcode() == ISD::XOR);
				2542	// ((X^1)&1)^1 -> X & 1
				2543	Val = DAG.getNode(ISD::AND, dl, N0.getValueType(),
				2544	N0.getOperand(0).getOperand(0),
				2545	N0.getOperand(1));
				2546	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2547
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2548	return DAG.getSetCC(dl, VT, Val, N1,
				2549	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2550	}
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2551	} else if (N1C->getAPIntValue() == 1 &&
				2552	(VT == MVT::i1 \|\|
Duncan Sands	28b77e9	2011-09-06 19:07:46 +0000	[diff] [blame]	2553	getBooleanContents(false) == ZeroOrOneBooleanContent)) {
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2554	SDValue Op0 = N0;
				2555	if (Op0.getOpcode() == ISD::TRUNCATE)
				2556	Op0 = Op0.getOperand(0);
				2557
				2558	if ((Op0.getOpcode() == ISD::XOR) &&
				2559	Op0.getOperand(0).getOpcode() == ISD::SETCC &&
				2560	Op0.getOperand(1).getOpcode() == ISD::SETCC) {
				2561	// (xor (setcc), (setcc)) == / != 1 -> (setcc) != / == (setcc)
				2562	Cond = (Cond == ISD::SETEQ) ? ISD::SETNE : ISD::SETEQ;
				2563	return DAG.getSetCC(dl, VT, Op0.getOperand(0), Op0.getOperand(1),
				2564	Cond);
Craig Topper	40b4a81	2012-12-19 06:12:28 +0000	[diff] [blame]	2565	}
				2566	if (Op0.getOpcode() == ISD::AND &&
				2567	isa<ConstantSDNode>(Op0.getOperand(1)) &&
				2568	cast<ConstantSDNode>(Op0.getOperand(1))->getAPIntValue() == 1) {
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2569	// If this is (X&1) == / != 1, normalize it to (X&1) != / == 0.
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2570	if (Op0.getValueType().bitsGT(VT))
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2571	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2572	DAG.getNode(ISD::TRUNCATE, dl, VT, Op0.getOperand(0)),
				2573	DAG.getConstant(1, VT));
Anton Korobeynikov	17458a7	2010-05-01 12:52:34 +0000	[diff] [blame]	2574	else if (Op0.getValueType().bitsLT(VT))
				2575	Op0 = DAG.getNode(ISD::AND, dl, VT,
				2576	DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)),
				2577	DAG.getConstant(1, VT));
				2578
Evan Cheng	2c755ba	2010-02-27 07:36:59 +0000	[diff] [blame]	2579	return DAG.getSetCC(dl, VT, Op0,
				2580	DAG.getConstant(0, Op0.getValueType()),
				2581	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
				2582	}
Craig Topper	40b4a81	2012-12-19 06:12:28 +0000	[diff] [blame]	2583	if (Op0.getOpcode() == ISD::AssertZext &&
				2584	cast<VTSDNode>(Op0.getOperand(1))->getVT() == MVT::i1)
				2585	return DAG.getSetCC(dl, VT, Op0,
				2586	DAG.getConstant(0, Op0.getValueType()),
				2587	Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2588	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2589	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2590
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2591	APInt MinVal, MaxVal;
				2592	unsigned OperandBitSize = N1C->getValueType(0).getSizeInBits();
				2593	if (ISD::isSignedIntSetCC(Cond)) {
				2594	MinVal = APInt::getSignedMinValue(OperandBitSize);
				2595	MaxVal = APInt::getSignedMaxValue(OperandBitSize);
				2596	} else {
				2597	MinVal = APInt::getMinValue(OperandBitSize);
				2598	MaxVal = APInt::getMaxValue(OperandBitSize);
				2599	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2600
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2601	// Canonicalize GE/LE comparisons to use GT/LT comparisons.
				2602	if (Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) {
				2603	if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true
				2604	// X >= C0 --> X > (C0-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2605	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2606	DAG.getConstant(C1-1, N1.getValueType()),
				2607	(Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
				2608	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2609
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2610	if (Cond == ISD::SETLE \|\| Cond == ISD::SETULE) {
				2611	if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true
				2612	// X <= C0 --> X < (C0+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2613	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2614	DAG.getConstant(C1+1, N1.getValueType()),
				2615	(Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
				2616	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2617
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2618	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal)
				2619	return DAG.getConstant(0, VT); // X < MIN --> false
				2620	if ((Cond == ISD::SETGE \|\| Cond == ISD::SETUGE) && C1 == MinVal)
				2621	return DAG.getConstant(1, VT); // X >= MIN --> true
				2622	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal)
				2623	return DAG.getConstant(0, VT); // X > MAX --> false
				2624	if ((Cond == ISD::SETLE \|\| Cond == ISD::SETULE) && C1 == MaxVal)
				2625	return DAG.getConstant(1, VT); // X <= MAX --> true
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2626
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2627	// Canonicalize setgt X, Min --> setne X, Min
				2628	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MinVal)
				2629	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
				2630	// Canonicalize setlt X, Max --> setne X, Max
				2631	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MaxVal)
				2632	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2633
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2634	// If we have setult X, 1, turn it into seteq X, 0
				2635	if ((Cond == ISD::SETLT \|\| Cond == ISD::SETULT) && C1 == MinVal+1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2636	return DAG.getSetCC(dl, VT, N0,
				2637	DAG.getConstant(MinVal, N0.getValueType()),
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2638	ISD::SETEQ);
				2639	// If we have setugt X, Max-1, turn it into seteq X, Max
Craig Topper	8502256	2012-12-19 06:43:58 +0000	[diff] [blame]	2640	if ((Cond == ISD::SETGT \|\| Cond == ISD::SETUGT) && C1 == MaxVal-1)
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2641	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2642	DAG.getConstant(MaxVal, N0.getValueType()),
				2643	ISD::SETEQ);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2644
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2645	// If we have "setcc X, C0", check to see if we can shrink the immediate
				2646	// by changing cc.
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2647
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2648	// SETUGT X, SINTMAX -> SETLT X, 0
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2649	if (Cond == ISD::SETUGT &&
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2650	C1 == APInt::getSignedMaxValue(OperandBitSize))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2651	return DAG.getSetCC(dl, VT, N0,
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2652	DAG.getConstant(0, N1.getValueType()),
				2653	ISD::SETLT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2654
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2655	// SETULT X, SINTMIN -> SETGT X, -1
				2656	if (Cond == ISD::SETULT &&
				2657	C1 == APInt::getSignedMinValue(OperandBitSize)) {
				2658	SDValue ConstMinusOne =
				2659	DAG.getConstant(APInt::getAllOnesValue(OperandBitSize),
				2660	N1.getValueType());
				2661	return DAG.getSetCC(dl, VT, N0, ConstMinusOne, ISD::SETGT);
				2662	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2663
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2664	// Fold bit comparisons when we can.
				2665	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2666	(VT == N0.getValueType() \|\|
				2667	(isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) &&
				2668	N0.getOpcode() == ISD::AND)
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2669	if (ConstantSDNode *AndRHS =
				2670	dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
Benjamin Kramer	b97cebd	2012-08-17 15:54:21 +0000	[diff] [blame]	2671	EVT ShiftTy = DCI.isBeforeLegalizeOps() ?
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2672	getPointerTy() : getShiftAmountTy(N0.getValueType());
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2673	if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
				2674	// Perform the xform if the AND RHS is a single bit.
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2675	if (AndRHS->getAPIntValue().isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2676	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2677	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2678	DAG.getConstant(AndRHS->getAPIntValue().logBase2(), ShiftTy)));
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2679	}
Evan Cheng	347a9cb	2010-01-07 20:58:44 +0000	[diff] [blame]	2680	} else if (Cond == ISD::SETEQ && C1 == AndRHS->getAPIntValue()) {
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2681	// (X & 8) == 8 --> (X & 8) >> 3
				2682	// Perform the xform if C1 is a single bit.
				2683	if (C1.isPowerOf2()) {
Evan Cheng	d40d03e	2010-01-06 19:38:29 +0000	[diff] [blame]	2684	return DAG.getNode(ISD::TRUNCATE, dl, VT,
				2685	DAG.getNode(ISD::SRL, dl, N0.getValueType(), N0,
				2686	DAG.getConstant(C1.logBase2(), ShiftTy)));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2687	}
				2688	}
Eli Friedman	b101b0b	2009-07-26 23:47:17 +0000	[diff] [blame]	2689	}
Evan Cheng	70e10d3	2012-07-17 06:53:39 +0000	[diff] [blame]	2690
Evan Cheng	b4d4959	2012-07-17 07:47:50 +0000	[diff] [blame]	2691	if (C1.getMinSignedBits() <= 64 &&
				2692	!isLegalICmpImmediate(C1.getSExtValue())) {
Evan Cheng	70e10d3	2012-07-17 06:53:39 +0000	[diff] [blame]	2693	// (X & -256) == 256 -> (X >> 8) == 1
				2694	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
				2695	N0.getOpcode() == ISD::AND && N0.hasOneUse()) {
				2696	if (ConstantSDNode *AndRHS =
				2697	dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
				2698	const APInt &AndRHSC = AndRHS->getAPIntValue();
				2699	if ((-AndRHSC).isPowerOf2() && (AndRHSC & C1) == C1) {
				2700	unsigned ShiftBits = AndRHSC.countTrailingZeros();
Benjamin Kramer	b97cebd	2012-08-17 15:54:21 +0000	[diff] [blame]	2701	EVT ShiftTy = DCI.isBeforeLegalizeOps() ?
Evan Cheng	70e10d3	2012-07-17 06:53:39 +0000	[diff] [blame]	2702	getPointerTy() : getShiftAmountTy(N0.getValueType());
				2703	EVT CmpTy = N0.getValueType();
				2704	SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0.getOperand(0),
				2705	DAG.getConstant(ShiftBits, ShiftTy));
				2706	SDValue CmpRHS = DAG.getConstant(C1.lshr(ShiftBits), CmpTy);
				2707	return DAG.getSetCC(dl, VT, Shift, CmpRHS, Cond);
				2708	}
				2709	}
Evan Cheng	f5c0539	2012-07-17 08:31:11 +0000	[diff] [blame]	2710	} else if (Cond == ISD::SETULT \|\| Cond == ISD::SETUGE \|\|
				2711	Cond == ISD::SETULE \|\| Cond == ISD::SETUGT) {
				2712	bool AdjOne = (Cond == ISD::SETULE \|\| Cond == ISD::SETUGT);
				2713	// X < 0x100000000 -> (X >> 32) < 1
				2714	// X >= 0x100000000 -> (X >> 32) >= 1
				2715	// X <= 0x0ffffffff -> (X >> 32) < 1
				2716	// X > 0x0ffffffff -> (X >> 32) >= 1
				2717	unsigned ShiftBits;
				2718	APInt NewC = C1;
				2719	ISD::CondCode NewCond = Cond;
				2720	if (AdjOne) {
				2721	ShiftBits = C1.countTrailingOnes();
				2722	NewC = NewC + 1;
				2723	NewCond = (Cond == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
				2724	} else {
				2725	ShiftBits = C1.countTrailingZeros();
				2726	}
				2727	NewC = NewC.lshr(ShiftBits);
				2728	if (ShiftBits && isLegalICmpImmediate(NewC.getSExtValue())) {
Benjamin Kramer	b97cebd	2012-08-17 15:54:21 +0000	[diff] [blame]	2729	EVT ShiftTy = DCI.isBeforeLegalizeOps() ?
Evan Cheng	f5c0539	2012-07-17 08:31:11 +0000	[diff] [blame]	2730	getPointerTy() : getShiftAmountTy(N0.getValueType());
				2731	EVT CmpTy = N0.getValueType();
				2732	SDValue Shift = DAG.getNode(ISD::SRL, dl, CmpTy, N0,
				2733	DAG.getConstant(ShiftBits, ShiftTy));
				2734	SDValue CmpRHS = DAG.getConstant(NewC, CmpTy);
				2735	return DAG.getSetCC(dl, VT, Shift, CmpRHS, NewCond);
				2736	}
Evan Cheng	70e10d3	2012-07-17 06:53:39 +0000	[diff] [blame]	2737	}
				2738	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2739	}
				2740
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2741	if (isa<ConstantFPSDNode>(N0.getNode())) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2742	// Constant fold or commute setcc.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2743	SDValue O = DAG.FoldSetCC(VT, N0, N1, Cond, dl);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2744	if (O.getNode()) return O;
				2745	} else if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2746	// If the RHS of an FP comparison is a constant, simplify it away in
				2747	// some cases.
				2748	if (CFP->getValueAPF().isNaN()) {
				2749	// If an operand is known to be a nan, we can fold it.
				2750	switch (ISD::getUnorderedFlavor(Cond)) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2751	default: llvm_unreachable("Unknown flavor!");
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2752	case 0: // Known false.
				2753	return DAG.getConstant(0, VT);
				2754	case 1: // Known true.
				2755	return DAG.getConstant(1, VT);
Chris Lattner	1c3e1e2	2007-12-30 21:21:10 +0000	[diff] [blame]	2756	case 2: // Undefined.
Dale Johannesen	e8d7230	2009-02-06 23:05:02 +0000	[diff] [blame]	2757	return DAG.getUNDEF(VT);
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2758	}
				2759	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2760
Chris Lattner	63079f0	2007-12-29 08:37:08 +0000	[diff] [blame]	2761	// Otherwise, we know the RHS is not a NaN. Simplify the node to drop the
				2762	// constant if knowing that the operand is non-nan is enough. We prefer to
				2763	// have SETO(x,x) instead of SETO(x, 0.0) because this avoids having to
				2764	// materialize 0.0.
				2765	if (Cond == ISD::SETO \|\| Cond == ISD::SETUO)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2766	return DAG.getSetCC(dl, VT, N0, N0, Cond);
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2767
				2768	// If the condition is not legal, see if we can find an equivalent one
				2769	// which is legal.
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2770	if (!isCondCodeLegal(Cond, N0.getSimpleValueType())) {
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2771	// If the comparison was an awkward floating-point == or != and one of
				2772	// the comparison operands is infinity or negative infinity, convert the
				2773	// condition to a less-awkward <= or >=.
				2774	if (CFP->getValueAPF().isInfinity()) {
				2775	if (CFP->getValueAPF().isNegative()) {
				2776	if (Cond == ISD::SETOEQ &&
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2777	isCondCodeLegal(ISD::SETOLE, N0.getSimpleValueType()))
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2778	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLE);
				2779	if (Cond == ISD::SETUEQ &&
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2780	isCondCodeLegal(ISD::SETOLE, N0.getSimpleValueType()))
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2781	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULE);
				2782	if (Cond == ISD::SETUNE &&
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2783	isCondCodeLegal(ISD::SETUGT, N0.getSimpleValueType()))
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2784	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGT);
				2785	if (Cond == ISD::SETONE &&
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2786	isCondCodeLegal(ISD::SETUGT, N0.getSimpleValueType()))
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2787	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGT);
				2788	} else {
				2789	if (Cond == ISD::SETOEQ &&
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2790	isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType()))
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2791	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOGE);
				2792	if (Cond == ISD::SETUEQ &&
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2793	isCondCodeLegal(ISD::SETOGE, N0.getSimpleValueType()))
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2794	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETUGE);
				2795	if (Cond == ISD::SETUNE &&
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2796	isCondCodeLegal(ISD::SETULT, N0.getSimpleValueType()))
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2797	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETULT);
				2798	if (Cond == ISD::SETONE &&
Patrik Hagglund	fdbeb05	2012-12-19 10:19:55 +0000	[diff] [blame]	2799	isCondCodeLegal(ISD::SETULT, N0.getSimpleValueType()))
Dan Gohman	11eab02	2009-09-26 15:24:17 +0000	[diff] [blame]	2800	return DAG.getSetCC(dl, VT, N0, N1, ISD::SETOLT);
				2801	}
				2802	}
				2803	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2804	}
				2805
				2806	if (N0 == N1) {
Duncan Sands	e7de3b2	2012-07-05 09:32:46 +0000	[diff] [blame]	2807	// The sext(setcc()) => setcc() optimization relies on the appropriate
				2808	// constant being emitted.
Nadav Rotem	e757640	2012-09-06 11:13:55 +0000	[diff] [blame]	2809	uint64_t EqVal = 0;
Duncan Sands	e7de3b2	2012-07-05 09:32:46 +0000	[diff] [blame]	2810	switch (getBooleanContents(N0.getValueType().isVector())) {
Duncan Sands	e7de3b2	2012-07-05 09:32:46 +0000	[diff] [blame]	2811	case UndefinedBooleanContent:
				2812	case ZeroOrOneBooleanContent:
				2813	EqVal = ISD::isTrueWhenEqual(Cond);
				2814	break;
				2815	case ZeroOrNegativeOneBooleanContent:
				2816	EqVal = ISD::isTrueWhenEqual(Cond) ? -1 : 0;
				2817	break;
				2818	}
				2819
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2820	// We can always fold X == X for integer setcc's.
Chad Rosier	9dbb018	2012-04-03 20:11:24 +0000	[diff] [blame]	2821	if (N0.getValueType().isInteger()) {
Duncan Sands	e7de3b2	2012-07-05 09:32:46 +0000	[diff] [blame]	2822	return DAG.getConstant(EqVal, VT);
Chad Rosier	9dbb018	2012-04-03 20:11:24 +0000	[diff] [blame]	2823	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2824	unsigned UOF = ISD::getUnorderedFlavor(Cond);
				2825	if (UOF == 2) // FP operators that are undefined on NaNs.
Duncan Sands	e7de3b2	2012-07-05 09:32:46 +0000	[diff] [blame]	2826	return DAG.getConstant(EqVal, VT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2827	if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
Duncan Sands	e7de3b2	2012-07-05 09:32:46 +0000	[diff] [blame]	2828	return DAG.getConstant(EqVal, VT);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2829	// Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
				2830	// if it is not already.
				2831	ISD::CondCode NewCond = UOF == 0 ? ISD::SETO : ISD::SETUO;
Micah Villmow	8c574be	2012-07-31 18:07:43 +0000	[diff] [blame]	2832	if (NewCond != Cond && (DCI.isBeforeLegalizeOps() \|\|
Patrik Hagglund	9c5ab93	2012-12-19 10:09:26 +0000	[diff] [blame]	2833	getCondCodeAction(NewCond, N0.getSimpleValueType()) == Legal))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2834	return DAG.getSetCC(dl, VT, N0, N1, NewCond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2835	}
				2836
				2837	if ((Cond == ISD::SETEQ \|\| Cond == ISD::SETNE) &&
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	2838	N0.getValueType().isInteger()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2839	if (N0.getOpcode() == ISD::ADD \|\| N0.getOpcode() == ISD::SUB \|\|
				2840	N0.getOpcode() == ISD::XOR) {
				2841	// Simplify (X+Y) == (X+Z) --> Y == Z
				2842	if (N0.getOpcode() == N1.getOpcode()) {
				2843	if (N0.getOperand(0) == N1.getOperand(0))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2844	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(1), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2845	if (N0.getOperand(1) == N1.getOperand(1))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2846	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2847	if (DAG.isCommutativeBinOp(N0.getOpcode())) {
				2848	// If X op Y == Y op X, try other combinations.
				2849	if (N0.getOperand(0) == N1.getOperand(1))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2850	return DAG.getSetCC(dl, VT, N0.getOperand(1), N1.getOperand(0),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2851	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2852	if (N0.getOperand(1) == N1.getOperand(0))
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2853	return DAG.getSetCC(dl, VT, N0.getOperand(0), N1.getOperand(1),
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2854	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2855	}
				2856	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2857
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2858	// If RHS is a legal immediate value for a compare instruction, we need
				2859	// to be careful about increasing register pressure needlessly.
				2860	bool LegalRHSImm = false;
				2861
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2862	if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N1)) {
				2863	if (ConstantSDNode *LHSR = dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
				2864	// Turn (X+C1) == C2 --> X == C2-C1
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2865	if (N0.getOpcode() == ISD::ADD && N0.getNode()->hasOneUse()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2866	return DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	2867	DAG.getConstant(RHSC->getAPIntValue()-
				2868	LHSR->getAPIntValue(),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2869	N0.getValueType()), Cond);
				2870	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2871
Sylvestre Ledru	94c2271	2012-09-27 10:14:43 +0000	[diff] [blame]	2872	// Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0.
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2873	if (N0.getOpcode() == ISD::XOR)
				2874	// If we know that all of the inverted bits are zero, don't bother
				2875	// performing the inversion.
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2876	if (DAG.MaskedValueIsZero(N0.getOperand(0), ~LHSR->getAPIntValue()))
				2877	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2878	DAG.getSetCC(dl, VT, N0.getOperand(0),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2879	DAG.getConstant(LHSR->getAPIntValue() ^
				2880	RHSC->getAPIntValue(),
				2881	N0.getValueType()),
				2882	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2883	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2884
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2885	// Turn (C1-X) == C2 --> X == C1-C2
				2886	if (ConstantSDNode *SUBC = dyn_cast<ConstantSDNode>(N0.getOperand(0))) {
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2887	if (N0.getOpcode() == ISD::SUB && N0.getNode()->hasOneUse()) {
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2888	return
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2889	DAG.getSetCC(dl, VT, N0.getOperand(1),
Dan Gohman	2e68b6f	2008-02-25 21:11:39 +0000	[diff] [blame]	2890	DAG.getConstant(SUBC->getAPIntValue() -
				2891	RHSC->getAPIntValue(),
				2892	N0.getValueType()),
				2893	Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2894	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2895	}
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2896
				2897	// Could RHSC fold directly into a compare?
				2898	if (RHSC->getValueType(0).getSizeInBits() <= 64)
				2899	LegalRHSImm = isLegalICmpImmediate(RHSC->getSExtValue());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2900	}
				2901
				2902	// Simplify (X+Z) == X --> Z == 0
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2903	// Don't do this if X is an immediate that can fold into a cmp
				2904	// instruction and X+Z has other uses. It could be an induction variable
				2905	// chain, and the transform would increase register pressure.
				2906	if (!LegalRHSImm \|\| N0.getNode()->hasOneUse()) {
				2907	if (N0.getOperand(0) == N1)
				2908	return DAG.getSetCC(dl, VT, N0.getOperand(1),
				2909	DAG.getConstant(0, N0.getValueType()), Cond);
				2910	if (N0.getOperand(1) == N1) {
				2911	if (DAG.isCommutativeBinOp(N0.getOpcode()))
				2912	return DAG.getSetCC(dl, VT, N0.getOperand(0),
				2913	DAG.getConstant(0, N0.getValueType()), Cond);
Craig Topper	8502256	2012-12-19 06:43:58 +0000	[diff] [blame]	2914	if (N0.getNode()->hasOneUse()) {
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2915	assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
				2916	// (Z-X) == X --> Z == X<<1
				2917	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N1,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2918	DAG.getConstant(1, getShiftAmountTy(N1.getValueType())));
Jakob Stoklund Olesen	740cd65	2012-04-05 20:30:20 +0000	[diff] [blame]	2919	if (!DCI.isCalledByLegalizer())
				2920	DCI.AddToWorklist(SH.getNode());
				2921	return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond);
				2922	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2923	}
				2924	}
				2925	}
				2926
				2927	if (N1.getOpcode() == ISD::ADD \|\| N1.getOpcode() == ISD::SUB \|\|
				2928	N1.getOpcode() == ISD::XOR) {
				2929	// Simplify X == (X+Z) --> Z == 0
Craig Topper	8502256	2012-12-19 06:43:58 +0000	[diff] [blame]	2930	if (N1.getOperand(0) == N0)
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2931	return DAG.getSetCC(dl, VT, N1.getOperand(1),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2932	DAG.getConstant(0, N1.getValueType()), Cond);
Craig Topper	8502256	2012-12-19 06:43:58 +0000	[diff] [blame]	2933	if (N1.getOperand(1) == N0) {
				2934	if (DAG.isCommutativeBinOp(N1.getOpcode()))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2935	return DAG.getSetCC(dl, VT, N1.getOperand(0),
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2936	DAG.getConstant(0, N1.getValueType()), Cond);
Craig Topper	8502256	2012-12-19 06:43:58 +0000	[diff] [blame]	2937	if (N1.getNode()->hasOneUse()) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2938	assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
				2939	// X == (Z-X) --> X<<1 == Z
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	2940	SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	2941	DAG.getConstant(1, getShiftAmountTy(N0.getValueType())));
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2942	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2943	DCI.AddToWorklist(SH.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2944	return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2945	}
				2946	}
				2947	}
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2948
Dan Gohman	2c65c3d	2009-01-29 16:18:12 +0000	[diff] [blame]	2949	// Simplify x&y == y to x&y != 0 if y has exactly one bit set.
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2950	// Note that where y is variable and is known to have at most
				2951	// one bit set (for example, if it is z&1) we cannot do this;
				2952	// the expressions are not equivalent when y==0.
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2953	if (N0.getOpcode() == ISD::AND)
				2954	if (N0.getOperand(0) == N1 \|\| N0.getOperand(1) == N1) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2955	if (ValueHasExactlyOneBitSet(N1, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2956	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2957	SDValue Zero = DAG.getConstant(0, N1.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2958	return DAG.getSetCC(dl, VT, N0, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2959	}
				2960	}
				2961	if (N1.getOpcode() == ISD::AND)
				2962	if (N1.getOperand(0) == N0 \|\| N1.getOperand(1) == N0) {
Dale Johannesen	85b0ede	2009-02-11 19:19:41 +0000	[diff] [blame]	2963	if (ValueHasExactlyOneBitSet(N0, DAG)) {
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2964	Cond = ISD::getSetCCInverse(Cond, /isInteger=/true);
				2965	SDValue Zero = DAG.getConstant(0, N0.getValueType());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	2966	return DAG.getSetCC(dl, VT, N1, Zero, Cond);
Dan Gohman	e5af2d3	2009-01-29 01:59:02 +0000	[diff] [blame]	2967	}
				2968	}
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2969	}
				2970
				2971	// Fold away ALL boolean setcc's.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	2972	SDValue Temp;
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2973	if (N0.getValueType() == MVT::i1 && foldBooleans) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2974	switch (Cond) {
Torok Edwin	c23197a	2009-07-14 16:55:14 +0000	[diff] [blame]	2975	default: llvm_unreachable("Unknown integer setcc!");
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2976	case ISD::SETEQ: // X == Y -> ~(X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2977	Temp = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
				2978	N0 = DAG.getNOT(dl, Temp, MVT::i1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2979	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2980	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2981	break;
				2982	case ISD::SETNE: // X != Y --> (X^Y)
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2983	N0 = DAG.getNode(ISD::XOR, dl, MVT::i1, N0, N1);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2984	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2985	case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> ~X & Y
				2986	case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> ~X & Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2987	Temp = DAG.getNOT(dl, N0, MVT::i1);
				2988	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2989	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2990	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2991	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2992	case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> ~Y & X
				2993	case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> ~Y & X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	2994	Temp = DAG.getNOT(dl, N1, MVT::i1);
				2995	N0 = DAG.getNode(ISD::AND, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2996	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	2997	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	2998	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	2999	case ISD::SETULE: // X <=u Y --> X == 0 \| Y == 1 --> ~X \| Y
				3000	case ISD::SETGE: // X >=s Y --> X == 0 \| Y == 1 --> ~X \| Y
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	3001	Temp = DAG.getNOT(dl, N0, MVT::i1);
				3002	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N1, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	3003	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3004	DCI.AddToWorklist(Temp.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	3005	break;
Bob Wilson	4c24546	2009-01-22 17:39:32 +0000	[diff] [blame]	3006	case ISD::SETUGE: // X >=u Y --> X == 1 \| Y == 0 --> ~Y \| X
				3007	case ISD::SETLE: // X <=s Y --> X == 1 \| Y == 0 --> ~Y \| X
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	3008	Temp = DAG.getNOT(dl, N1, MVT::i1);
				3009	N0 = DAG.getNode(ISD::OR, dl, MVT::i1, N0, Temp);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	3010	break;
				3011	}
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	3012	if (VT != MVT::i1) {
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	3013	if (!DCI.isCalledByLegalizer())
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3014	DCI.AddToWorklist(N0.getNode());
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	3015	// FIXME: If running after legalize, we probably can't do this.
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3016	N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, N0);
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	3017	}
				3018	return N0;
				3019	}
				3020
				3021	// Could not fold it.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3022	return SDValue();
Evan Cheng	fa1eb27	2007-02-08 22:13:59 +0000	[diff] [blame]	3023	}
				3024
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	3025	/// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the
				3026	/// node is a GlobalAddress + offset.
Chris Lattner	0a9481f	2011-02-13 22:25:43 +0000	[diff] [blame]	3027	bool TargetLowering::isGAPlusOffset(SDNode N, const GlobalValue &GA,
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	3028	int64_t &Offset) const {
				3029	if (isa<GlobalAddressSDNode>(N)) {
Dan Gohman	9ea3f56	2008-06-09 22:05:52 +0000	[diff] [blame]	3030	GlobalAddressSDNode *GASD = cast<GlobalAddressSDNode>(N);
				3031	GA = GASD->getGlobal();
				3032	Offset += GASD->getOffset();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	3033	return true;
				3034	}
				3035
				3036	if (N->getOpcode() == ISD::ADD) {
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3037	SDValue N1 = N->getOperand(0);
				3038	SDValue N2 = N->getOperand(1);
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3039	if (isGAPlusOffset(N1.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	3040	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2);
				3041	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	3042	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	3043	return true;
				3044	}
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3045	} else if (isGAPlusOffset(N2.getNode(), GA, Offset)) {
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	3046	ConstantSDNode *V = dyn_cast<ConstantSDNode>(N1);
				3047	if (V) {
Dan Gohman	7810bfe	2008-09-26 21:54:37 +0000	[diff] [blame]	3048	Offset += V->getSExtValue();
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	3049	return true;
				3050	}
				3051	}
				3052	}
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3053
Evan Cheng	ad4196b	2008-05-12 19:56:52 +0000	[diff] [blame]	3054	return false;
				3055	}
				3056
				3057
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3058	SDValue TargetLowering::
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	3059	PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const {
				3060	// Default implementation: no optimization.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3061	return SDValue();
Chris Lattner	00ffed0	2006-03-01 04:52:55 +0000	[diff] [blame]	3062	}
				3063
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	3064	//===----------------------------------------------------------------------===//
				3065	// Inline Assembler Implementation Methods
				3066	//===----------------------------------------------------------------------===//
				3067
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3068
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	3069	TargetLowering::ConstraintType
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	3070	TargetLowering::getConstraintType(const std::string &Constraint) const {
Eric Christopher	fffe363	2013-01-11 18:12:39 +0000	[diff] [blame^]	3071	unsigned S = Constraint.size();
				3072
				3073	if (S == 1) {
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	3074	switch (Constraint[0]) {
				3075	default: break;
				3076	case 'r': return C_RegisterClass;
				3077	case 'm': // memory
				3078	case 'o': // offsetable
				3079	case 'V': // not offsetable
				3080	return C_Memory;
				3081	case 'i': // Simple Integer or Relocatable Constant
				3082	case 'n': // Simple Integer
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3083	case 'E': // Floating Point Constant
				3084	case 'F': // Floating Point Constant
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	3085	case 's': // Relocatable Constant
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3086	case 'p': // Address.
Chris Lattner	c13dd1c	2007-03-25 04:35:41 +0000	[diff] [blame]	3087	case 'X': // Allow ANY value.
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	3088	case 'I': // Target registers.
				3089	case 'J':
				3090	case 'K':
				3091	case 'L':
				3092	case 'M':
				3093	case 'N':
				3094	case 'O':
				3095	case 'P':
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3096	case '<':
				3097	case '>':
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	3098	return C_Other;
				3099	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	3100	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3101
Eric Christopher	fffe363	2013-01-11 18:12:39 +0000	[diff] [blame^]	3102	if (S > 1 && Constraint[0] == '{' && Constraint[S-1] == '}') {
				3103	if (S == 8 && !Constraint.compare(1, 6, "memory", 6)) // "{memory}"
				3104	return C_Memory;
Chris Lattner	065421f	2007-03-25 02:18:14 +0000	[diff] [blame]	3105	return C_Register;
Eric Christopher	fffe363	2013-01-11 18:12:39 +0000	[diff] [blame^]	3106	}
Chris Lattner	4234f57	2007-03-25 02:14:49 +0000	[diff] [blame]	3107	return C_Unknown;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	3108	}
				3109
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	3110	/// LowerXConstraint - try to replace an X constraint, which matches anything,
				3111	/// with another that has more specific requirements based on the type of the
				3112	/// corresponding operand.
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3113	const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const{
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	3114	if (ConstraintVT.isInteger())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	3115	return "r";
Duncan Sands	83ec4b6	2008-06-06 12:08:01 +0000	[diff] [blame]	3116	if (ConstraintVT.isFloatingPoint())
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	3117	return "f"; // works for many targets
				3118	return 0;
Dale Johannesen	ba2a0b9	2008-01-29 02:21:21 +0000	[diff] [blame]	3119	}
				3120
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	3121	/// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
				3122	/// vector. If it is invalid, don't add anything to Ops.
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3123	void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	3124	std::string &Constraint,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3125	std::vector<SDValue> &Ops,
Chris Lattner	5e76423	2008-04-26 23:02:14 +0000	[diff] [blame]	3126	SelectionDAG &DAG) const {
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	3127
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	3128	if (Constraint.length() > 1) return;
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	3129
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	3130	char ConstraintLetter = Constraint[0];
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	3131	switch (ConstraintLetter) {
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	3132	default: break;
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	3133	case 'X': // Allows any operand; labels (basic block) use this.
				3134	if (Op.getOpcode() == ISD::BasicBlock) {
				3135	Ops.push_back(Op);
				3136	return;
				3137	}
				3138	// fall through
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	3139	case 'i': // Simple Integer or Relocatable Constant
				3140	case 'n': // Simple Integer
Dale Johannesen	eb57ea7	2007-11-05 21:20:28 +0000	[diff] [blame]	3141	case 's': { // Relocatable Constant
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	3142	// These operands are interested in values of the form (GV+C), where C may
				3143	// be folded in as an offset of GV, or it may be explicitly added. Also, it
				3144	// is possible and fine if either GV or C are missing.
				3145	ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op);
				3146	GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Op);
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3147
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	3148	// If we have "(add GV, C)", pull out GV/C
				3149	if (Op.getOpcode() == ISD::ADD) {
				3150	C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
				3151	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(0));
				3152	if (C == 0 \|\| GA == 0) {
				3153	C = dyn_cast<ConstantSDNode>(Op.getOperand(0));
				3154	GA = dyn_cast<GlobalAddressSDNode>(Op.getOperand(1));
				3155	}
				3156	if (C == 0 \|\| GA == 0)
				3157	C = 0, GA = 0;
				3158	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3159
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	3160	// If we find a valid operand, map to the TargetXXX version so that the
				3161	// value itself doesn't get selected.
				3162	if (GA) { // Either &GV or &GV+C
				3163	if (ConstraintLetter != 'n') {
				3164	int64_t Offs = GA->getOffset();
Dan Gohman	f5aeb1a	2008-09-12 16:56:44 +0000	[diff] [blame]	3165	if (C) Offs += C->getZExtValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3166	Ops.push_back(DAG.getTargetGlobalAddress(GA->getGlobal(),
Devang Patel	07538ad	2010-07-15 18:45:27 +0000	[diff] [blame]	3167	C ? C->getDebugLoc() : DebugLoc(),
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	3168	Op.getValueType(), Offs));
				3169	return;
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	3170	}
				3171	}
				3172	if (C) { // just C, no GV.
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	3173	// Simple constants are not allowed for 's'.
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	3174	if (ConstraintLetter != 's') {
Dale Johannesen	78e3e52	2009-02-12 20:58:09 +0000	[diff] [blame]	3175	// gcc prints these as sign extended. Sign extend value to 64 bits
				3176	// now; without this it would get ZExt'd later in
				3177	// ScheduleDAGSDNodes::EmitNode, which is very generic.
				3178	Ops.push_back(DAG.getTargetConstant(C->getAPIntValue().getSExtValue(),
Owen Anderson	825b72b	2009-08-11 20:47:22 +0000	[diff] [blame]	3179	MVT::i64));
Chris Lattner	48884cd	2007-08-25 00:47:38 +0000	[diff] [blame]	3180	return;
				3181	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	3182	}
Chris Lattner	9ff6ee8	2007-02-17 06:00:35 +0000	[diff] [blame]	3183	break;
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	3184	}
Chris Lattner	75c7d2b	2007-05-03 16:54:34 +0000	[diff] [blame]	3185	}
Chris Lattner	eb8146b	2006-02-04 02:13:02 +0000	[diff] [blame]	3186	}
				3187
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	3188	std::pair<unsigned, const TargetRegisterClass*> TargetLowering::
Chris Lattner	4217ca8dc	2006-02-21 23:11:00 +0000	[diff] [blame]	3189	getRegForInlineAsmConstraint(const std::string &Constraint,
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3190	EVT VT) const {
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	3191	if (Constraint[0] != '{')
Douglas Gregor	7d9663c	2010-05-11 06:17:44 +0000	[diff] [blame]	3192	return std::make_pair(0u, static_cast<TargetRegisterClass*>(0));
Chris Lattner	a55079a	2006-02-01 01:29:47 +0000	[diff] [blame]	3193	assert(*(Constraint.end()-1) == '}' && "Not a brace enclosed constraint?");
				3194
				3195	// Remove the braces from around the name.
Benjamin Kramer	05872ea	2009-11-12 20:36:59 +0000	[diff] [blame]	3196	StringRef RegName(Constraint.data()+1, Constraint.size()-2);
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	3197
Hal Finkel	ca2dd36	2012-12-18 17:50:58 +0000	[diff] [blame]	3198	std::pair<unsigned, const TargetRegisterClass*> R =
				3199	std::make_pair(0u, static_cast<const TargetRegisterClass*>(0));
				3200
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	3201	// Figure out which register class contains this reg.
Dan Gohman	6f0d024	2008-02-10 18:45:23 +0000	[diff] [blame]	3202	const TargetRegisterInfo *RI = TM.getRegisterInfo();
				3203	for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(),
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	3204	E = RI->regclass_end(); RCI != E; ++RCI) {
				3205	const TargetRegisterClass RC = RCI;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3206
				3207	// If none of the value types for this register class are valid, we
Chris Lattner	b3befd4	2006-02-22 23:00:51 +0000	[diff] [blame]	3208	// can't use it. For example, 64-bit reg classes on 32-bit targets.
Jakob Stoklund Olesen	22e8a36	2011-10-12 01:24:51 +0000	[diff] [blame]	3209	if (!isLegalRC(RC))
				3210	continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3211
				3212	for (TargetRegisterClass::iterator I = RC->begin(), E = RC->end();
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	3213	I != E; ++I) {
Hal Finkel	ca2dd36	2012-12-18 17:50:58 +0000	[diff] [blame]	3214	if (RegName.equals_lower(RI->getName(*I))) {
				3215	std::pair<unsigned, const TargetRegisterClass*> S =
				3216	std::make_pair(*I, RC);
				3217
				3218	// If this register class has the requested value type, return it,
				3219	// otherwise keep searching and return the first class found
				3220	// if no other is found which explicitly has the requested type.
				3221	if (RC->hasType(VT))
				3222	return S;
				3223	else if (!R.second)
				3224	R = S;
				3225	}
Chris Lattner	1efa40f	2006-02-22 00:56:39 +0000	[diff] [blame]	3226	}
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	3227	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3228
Hal Finkel	ca2dd36	2012-12-18 17:50:58 +0000	[diff] [blame]	3229	return R;
Chris Lattner	4ccb070	2006-01-26 20:37:03 +0000	[diff] [blame]	3230	}
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	3231
				3232	//===----------------------------------------------------------------------===//
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3233	// Constraint Selection.
				3234
Chris Lattner	6bdcda3	2008-10-17 16:47:46 +0000	[diff] [blame]	3235	/// isMatchingInputConstraint - Return true of this is an input operand that is
				3236	/// a matching constraint like "4".
				3237	bool TargetLowering::AsmOperandInfo::isMatchingInputConstraint() const {
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	3238	assert(!ConstraintCode.empty() && "No known constraint!");
				3239	return isdigit(ConstraintCode[0]);
				3240	}
				3241
				3242	/// getMatchedOperand - If this is an input matching constraint, this method
				3243	/// returns the output operand it matches.
				3244	unsigned TargetLowering::AsmOperandInfo::getMatchedOperand() const {
				3245	assert(!ConstraintCode.empty() && "No known constraint!");
				3246	return atoi(ConstraintCode.c_str());
				3247	}
				3248
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3249
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3250	/// ParseConstraints - Split up the constraint string from the inline
				3251	/// assembly value into the specific constraints and their prefixes,
				3252	/// and also tie in the associated operand values.
				3253	/// If this returns an empty vector, and if the constraint string itself
				3254	/// isn't empty, there was an error parsing.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3255	TargetLowering::AsmOperandInfoVector TargetLowering::ParseConstraints(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3256	ImmutableCallSite CS) const {
				3257	/// ConstraintOperands - Information about all of the constraints.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3258	AsmOperandInfoVector ConstraintOperands;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3259	const InlineAsm *IA = cast<InlineAsm>(CS.getCalledValue());
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3260	unsigned maCount = 0; // Largest number of multiple alternative constraints.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3261
				3262	// Do a prepass over the constraints, canonicalizing them, and building up the
				3263	// ConstraintOperands list.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3264	InlineAsm::ConstraintInfoVector
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3265	ConstraintInfos = IA->ParseConstraints();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3266
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3267	unsigned ArgNo = 0; // ArgNo - The argument of the CallInst.
				3268	unsigned ResNo = 0; // ResNo - The result number of the next output.
				3269
				3270	for (unsigned i = 0, e = ConstraintInfos.size(); i != e; ++i) {
				3271	ConstraintOperands.push_back(AsmOperandInfo(ConstraintInfos[i]));
				3272	AsmOperandInfo &OpInfo = ConstraintOperands.back();
				3273
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3274	// Update multiple alternative constraint count.
				3275	if (OpInfo.multipleAlternatives.size() > maCount)
				3276	maCount = OpInfo.multipleAlternatives.size();
				3277
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3278	OpInfo.ConstraintVT = MVT::Other;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3279
				3280	// Compute the value type for each operand.
				3281	switch (OpInfo.Type) {
				3282	case InlineAsm::isOutput:
				3283	// Indirect outputs just consume an argument.
				3284	if (OpInfo.isIndirect) {
				3285	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				3286	break;
				3287	}
				3288
				3289	// The return value of the call is this value. As such, there is no
				3290	// corresponding argument.
				3291	assert(!CS.getType()->isVoidTy() &&
				3292	"Bad inline asm!");
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	3293	if (StructType *STy = dyn_cast<StructType>(CS.getType())) {
Patrik Hagglund	c698d3a	2012-12-19 15:19:11 +0000	[diff] [blame]	3294	OpInfo.ConstraintVT = getSimpleValueType(STy->getElementType(ResNo));
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3295	} else {
				3296	assert(ResNo == 0 && "Asm only has one result!");
Patrik Hagglund	c698d3a	2012-12-19 15:19:11 +0000	[diff] [blame]	3297	OpInfo.ConstraintVT = getSimpleValueType(CS.getType());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3298	}
				3299	++ResNo;
				3300	break;
				3301	case InlineAsm::isInput:
				3302	OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
				3303	break;
				3304	case InlineAsm::isClobber:
				3305	// Nothing to do.
				3306	break;
				3307	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3308
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3309	if (OpInfo.CallOperandVal) {
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	3310	llvm::Type *OpTy = OpInfo.CallOperandVal->getType();
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3311	if (OpInfo.isIndirect) {
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	3312	llvm::PointerType *PtrTy = dyn_cast<PointerType>(OpTy);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3313	if (!PtrTy)
				3314	report_fatal_error("Indirect operand for inline asm not a pointer!");
				3315	OpTy = PtrTy->getElementType();
				3316	}
Eric Christopher	362fee9	2011-06-17 20:41:29 +0000	[diff] [blame]	3317
Eric Christopher	cef81b7	2011-05-09 20:04:43 +0000	[diff] [blame]	3318	// Look for vector wrapped in a struct. e.g. { <16 x i8> }.
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	3319	if (StructType *STy = dyn_cast<StructType>(OpTy))
Eric Christopher	cef81b7	2011-05-09 20:04:43 +0000	[diff] [blame]	3320	if (STy->getNumElements() == 1)
				3321	OpTy = STy->getElementType(0);
				3322
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3323	// If OpTy is not a single value, it may be a struct/union that we
				3324	// can tile with integers.
				3325	if (!OpTy->isSingleValueType() && OpTy->isSized()) {
				3326	unsigned BitSize = TD->getTypeSizeInBits(OpTy);
				3327	switch (BitSize) {
				3328	default: break;
				3329	case 1:
				3330	case 8:
				3331	case 16:
				3332	case 32:
				3333	case 64:
				3334	case 128:
Dale Johannesen	71365d3	2010-11-09 01:15:07 +0000	[diff] [blame]	3335	OpInfo.ConstraintVT =
Patrik Hagglund	c698d3a	2012-12-19 15:19:11 +0000	[diff] [blame]	3336	MVT::getVT(IntegerType::get(OpTy->getContext(), BitSize), true);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3337	break;
				3338	}
Micah Villmow	7d66146	2012-10-09 16:06:12 +0000	[diff] [blame]	3339	} else if (PointerType *PT = dyn_cast<PointerType>(OpTy)) {
				3340	OpInfo.ConstraintVT = MVT::getIntegerVT(
				3341	8*TD->getPointerSize(PT->getAddressSpace()));
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3342	} else {
Patrik Hagglund	c698d3a	2012-12-19 15:19:11 +0000	[diff] [blame]	3343	OpInfo.ConstraintVT = MVT::getVT(OpTy, true);
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3344	}
				3345	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3346	}
				3347
				3348	// If we have multiple alternative constraints, select the best alternative.
				3349	if (ConstraintInfos.size()) {
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3350	if (maCount) {
				3351	unsigned bestMAIndex = 0;
				3352	int bestWeight = -1;
				3353	// weight: -1 = invalid match, and 0 = so-so match to 5 = good match.
				3354	int weight = -1;
				3355	unsigned maIndex;
				3356	// Compute the sums of the weights for each alternative, keeping track
				3357	// of the best (highest weight) one so far.
				3358	for (maIndex = 0; maIndex < maCount; ++maIndex) {
				3359	int weightSum = 0;
				3360	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				3361	cIndex != eIndex; ++cIndex) {
				3362	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
				3363	if (OpInfo.Type == InlineAsm::isClobber)
				3364	continue;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3365
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3366	// If this is an output operand with a matching input operand,
				3367	// look up the matching input. If their types mismatch, e.g. one
				3368	// is an integer, the other is floating point, or their sizes are
				3369	// different, flag it as an maCantMatch.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3370	if (OpInfo.hasMatchingInput()) {
				3371	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3372	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
				3373	if ((OpInfo.ConstraintVT.isInteger() !=
				3374	Input.ConstraintVT.isInteger()) \|\|
				3375	(OpInfo.ConstraintVT.getSizeInBits() !=
				3376	Input.ConstraintVT.getSizeInBits())) {
				3377	weightSum = -1; // Can't match.
				3378	break;
				3379	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3380	}
				3381	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3382	weight = getMultipleConstraintMatchWeight(OpInfo, maIndex);
				3383	if (weight == -1) {
				3384	weightSum = -1;
				3385	break;
				3386	}
				3387	weightSum += weight;
				3388	}
				3389	// Update best.
				3390	if (weightSum > bestWeight) {
				3391	bestWeight = weightSum;
				3392	bestMAIndex = maIndex;
				3393	}
				3394	}
				3395
				3396	// Now select chosen alternative in each constraint.
				3397	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				3398	cIndex != eIndex; ++cIndex) {
				3399	AsmOperandInfo& cInfo = ConstraintOperands[cIndex];
				3400	if (cInfo.Type == InlineAsm::isClobber)
				3401	continue;
				3402	cInfo.selectAlternative(bestMAIndex);
				3403	}
				3404	}
				3405	}
				3406
				3407	// Check and hook up tied operands, choose constraint code to use.
				3408	for (unsigned cIndex = 0, eIndex = ConstraintOperands.size();
				3409	cIndex != eIndex; ++cIndex) {
				3410	AsmOperandInfo& OpInfo = ConstraintOperands[cIndex];
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3411
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3412	// If this is an output operand with a matching input operand, look up the
				3413	// matching input. If their types mismatch, e.g. one is an integer, the
				3414	// other is floating point, or their sizes are different, flag it as an
				3415	// error.
				3416	if (OpInfo.hasMatchingInput()) {
				3417	AsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3418
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3419	if (OpInfo.ConstraintVT != Input.ConstraintVT) {
Bill Wendling	96cb112	2012-07-19 00:04:14 +0000	[diff] [blame]	3420	std::pair<unsigned, const TargetRegisterClass*> MatchRC =
				3421	getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
				3422	OpInfo.ConstraintVT);
				3423	std::pair<unsigned, const TargetRegisterClass*> InputRC =
				3424	getRegForInlineAsmConstraint(Input.ConstraintCode,
				3425	Input.ConstraintVT);
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3426	if ((OpInfo.ConstraintVT.isInteger() !=
				3427	Input.ConstraintVT.isInteger()) \|\|
Eric Christopher	5427ede	2011-07-14 20:13:52 +0000	[diff] [blame]	3428	(MatchRC.second != InputRC.second)) {
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3429	report_fatal_error("Unsupported asm: input constraint"
				3430	" with a matching output constraint of"
				3431	" incompatible type!");
				3432	}
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3433	}
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3434
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3435	}
				3436	}
				3437
				3438	return ConstraintOperands;
				3439	}
				3440
Chris Lattner	58f15c4	2008-10-17 16:21:11 +0000	[diff] [blame]	3441
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3442	/// getConstraintGenerality - Return an integer indicating how general CT
				3443	/// is.
				3444	static unsigned getConstraintGenerality(TargetLowering::ConstraintType CT) {
				3445	switch (CT) {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3446	case TargetLowering::C_Other:
				3447	case TargetLowering::C_Unknown:
				3448	return 0;
				3449	case TargetLowering::C_Register:
				3450	return 1;
				3451	case TargetLowering::C_RegisterClass:
				3452	return 2;
				3453	case TargetLowering::C_Memory:
				3454	return 3;
				3455	}
Chandler Carruth	732f05c	2012-01-10 18:08:01 +0000	[diff] [blame]	3456	llvm_unreachable("Invalid constraint type");
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3457	}
				3458
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3459	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3460	/// This object must already have been set up with the operand type
				3461	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3462	TargetLowering::ConstraintWeight
				3463	TargetLowering::getMultipleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3464	AsmOperandInfo &info, int maIndex) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3465	InlineAsm::ConstraintCodeVector *rCodes;
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3466	if (maIndex >= (int)info.multipleAlternatives.size())
				3467	rCodes = &info.Codes;
				3468	else
				3469	rCodes = &info.multipleAlternatives[maIndex].Codes;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3470	ConstraintWeight BestWeight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3471
				3472	// Loop over the options, keeping track of the most general one.
John Thompson	67aff16	2010-09-21 22:04:54 +0000	[diff] [blame]	3473	for (unsigned i = 0, e = rCodes->size(); i != e; ++i) {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3474	ConstraintWeight weight =
				3475	getSingleConstraintMatchWeight(info, (*rCodes)[i].c_str());
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3476	if (weight > BestWeight)
				3477	BestWeight = weight;
				3478	}
				3479
				3480	return BestWeight;
				3481	}
				3482
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3483	/// Examine constraint type and operand type and determine a weight value.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3484	/// This object must already have been set up with the operand type
				3485	/// and the current alternative constraint selected.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3486	TargetLowering::ConstraintWeight
				3487	TargetLowering::getSingleConstraintMatchWeight(
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3488	AsmOperandInfo &info, const char *constraint) const {
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3489	ConstraintWeight weight = CW_Invalid;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3490	Value *CallOperandVal = info.CallOperandVal;
				3491	// If we don't have a value, we can't do a match,
				3492	// but allow it at the lowest weight.
				3493	if (CallOperandVal == NULL)
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3494	return CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3495	// Look at the constraint type.
				3496	switch (*constraint) {
				3497	case 'i': // immediate integer.
				3498	case 'n': // immediate integer with a known value.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3499	if (isa<ConstantInt>(CallOperandVal))
				3500	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3501	break;
				3502	case 's': // non-explicit intregal immediate.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3503	if (isa<GlobalValue>(CallOperandVal))
				3504	weight = CW_Constant;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3505	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3506	case 'E': // immediate float if host format.
				3507	case 'F': // immediate float.
				3508	if (isa<ConstantFP>(CallOperandVal))
				3509	weight = CW_Constant;
				3510	break;
				3511	case '<': // memory operand with autodecrement.
				3512	case '>': // memory operand with autoincrement.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3513	case 'm': // memory operand.
				3514	case 'o': // offsettable memory operand
				3515	case 'V': // non-offsettable memory operand
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3516	weight = CW_Memory;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3517	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3518	case 'r': // general register.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3519	case 'g': // general register, memory operand or immediate integer.
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3520	// note: Clang converts "g" to "imr".
				3521	if (CallOperandVal->getType()->isIntegerTy())
				3522	weight = CW_Register;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3523	break;
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3524	case 'X': // any operand.
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3525	default:
John Thompson	44ab89e	2010-10-29 17:29:13 +0000	[diff] [blame]	3526	weight = CW_Default;
John Thompson	eac6e1d	2010-09-13 18:15:37 +0000	[diff] [blame]	3527	break;
				3528	}
				3529	return weight;
				3530	}
				3531
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3532	/// ChooseConstraint - If there are multiple different constraints that we
				3533	/// could pick for this operand (e.g. "imr") try to pick the 'best' one.
Chris Lattner	24e1a9d	2008-04-27 01:49:46 +0000	[diff] [blame]	3534	/// This is somewhat tricky: constraints fall into four classes:
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3535	/// Other -> immediates and magic values
				3536	/// Register -> one specific register
				3537	/// RegisterClass -> a group of regs
				3538	/// Memory -> memory
				3539	/// Ideally, we would pick the most specific constraint possible: if we have
				3540	/// something that fits into a register, we would pick it. The problem here
				3541	/// is that if we have something that could either be in a register or in
				3542	/// memory that use of the register could cause selection of other
				3543	/// operands to fail: they might only succeed if we pick memory. Because of
				3544	/// this the heuristic we use is:
				3545	///
				3546	/// 1) If there is an 'other' constraint, and if the operand is valid for
				3547	/// that constraint, use it. This makes us take advantage of 'i'
				3548	/// constraints when available.
				3549	/// 2) Otherwise, pick the most general constraint present. This prefers
				3550	/// 'm' over 'r', for example.
				3551	///
				3552	static void ChooseConstraint(TargetLowering::AsmOperandInfo &OpInfo,
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3553	const TargetLowering &TLI,
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3554	SDValue Op, SelectionDAG *DAG) {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3555	assert(OpInfo.Codes.size() > 1 && "Doesn't have multiple constraint options");
				3556	unsigned BestIdx = 0;
				3557	TargetLowering::ConstraintType BestType = TargetLowering::C_Unknown;
				3558	int BestGenerality = -1;
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3559
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3560	// Loop over the options, keeping track of the most general one.
				3561	for (unsigned i = 0, e = OpInfo.Codes.size(); i != e; ++i) {
				3562	TargetLowering::ConstraintType CType =
				3563	TLI.getConstraintType(OpInfo.Codes[i]);
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3564
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3565	// If this is an 'other' constraint, see if the operand is valid for it.
				3566	// For example, on X86 we might have an 'rI' constraint. If the operand
				3567	// is an integer in the range [0..31] we want to use I (saving a load
				3568	// of a register), otherwise we must use 'r'.
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3569	if (CType == TargetLowering::C_Other && Op.getNode()) {
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3570	assert(OpInfo.Codes[i].size() == 1 &&
				3571	"Unhandled multi-letter 'other' constraint");
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3572	std::vector<SDValue> ResultOps;
Eric Christopher	100c833	2011-06-02 23:16:42 +0000	[diff] [blame]	3573	TLI.LowerAsmOperandForConstraint(Op, OpInfo.Codes[i],
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3574	ResultOps, *DAG);
				3575	if (!ResultOps.empty()) {
				3576	BestType = CType;
				3577	BestIdx = i;
				3578	break;
				3579	}
				3580	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3581
Dale Johannesen	a5989f8	2010-06-28 22:09:45 +0000	[diff] [blame]	3582	// Things with matching constraints can only be registers, per gcc
				3583	// documentation. This mainly affects "g" constraints.
				3584	if (CType == TargetLowering::C_Memory && OpInfo.hasMatchingInput())
				3585	continue;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3586
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3587	// This constraint letter is more general than the previous one, use it.
				3588	int Generality = getConstraintGenerality(CType);
				3589	if (Generality > BestGenerality) {
				3590	BestType = CType;
				3591	BestIdx = i;
				3592	BestGenerality = Generality;
				3593	}
				3594	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3595
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3596	OpInfo.ConstraintCode = OpInfo.Codes[BestIdx];
				3597	OpInfo.ConstraintType = BestType;
				3598	}
				3599
				3600	/// ComputeConstraintToUse - Determines the constraint code and constraint
				3601	/// type to use for the specific AsmOperandInfo, setting
				3602	/// OpInfo.ConstraintCode and OpInfo.ConstraintType.
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3603	void TargetLowering::ComputeConstraintToUse(AsmOperandInfo &OpInfo,
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3604	SDValue Op,
Chris Lattner	5a09690	2008-04-27 00:37:18 +0000	[diff] [blame]	3605	SelectionDAG *DAG) const {
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3606	assert(!OpInfo.Codes.empty() && "Must have at least one constraint");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3607
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3608	// Single-letter constraints ('r') are very common.
				3609	if (OpInfo.Codes.size() == 1) {
				3610	OpInfo.ConstraintCode = OpInfo.Codes[0];
				3611	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3612	} else {
Dale Johannesen	1784d16	2010-06-25 21:55:36 +0000	[diff] [blame]	3613	ChooseConstraint(OpInfo, *this, Op, DAG);
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3614	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3615
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3616	// 'X' matches anything.
				3617	if (OpInfo.ConstraintCode == "X" && OpInfo.CallOperandVal) {
				3618	// Labels and constants are handled elsewhere ('X' is the only thing
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3619	// that matches labels). For Functions, the type here is the type of
Dale Johannesen	5339c55	2009-07-20 23:27:39 +0000	[diff] [blame]	3620	// the result, which is not what we want to look at; leave them alone.
				3621	Value *v = OpInfo.CallOperandVal;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3622	if (isa<BasicBlock>(v) \|\| isa<ConstantInt>(v) \|\| isa<Function>(v)) {
				3623	OpInfo.CallOperandVal = v;
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3624	return;
Dale Johannesen	8ea5ec6	2009-07-07 23:26:33 +0000	[diff] [blame]	3625	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3626
Chris Lattner	4376fea	2008-04-27 00:09:47 +0000	[diff] [blame]	3627	// Otherwise, try to resolve it to something we know about by looking at
				3628	// the actual operand type.
				3629	if (const char *Repl = LowerXConstraint(OpInfo.ConstraintVT)) {
				3630	OpInfo.ConstraintCode = Repl;
				3631	OpInfo.ConstraintType = getConstraintType(OpInfo.ConstraintCode);
				3632	}
				3633	}
				3634	}
				3635
				3636	//===----------------------------------------------------------------------===//
Evan Cheng	30b37b5	2006-03-13 23:18:16 +0000	[diff] [blame]	3637	// Loop Strength Reduction hooks
				3638	//===----------------------------------------------------------------------===//
				3639
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3640	/// isLegalAddressingMode - Return true if the addressing mode represented
				3641	/// by AM is legal for this target, for a load/store of the specified type.
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3642	bool TargetLowering::isLegalAddressingMode(const AddrMode &AM,
Chris Lattner	db125cf	2011-07-18 04:54:35 +0000	[diff] [blame]	3643	Type *Ty) const {
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3644	// The default implementation of this implements a conservative RISCy, r+r and
				3645	// r+i addr mode.
				3646
				3647	// Allows a sign-extended 16-bit immediate field.
				3648	if (AM.BaseOffs <= -(1LL << 16) \|\| AM.BaseOffs >= (1LL << 16)-1)
				3649	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3650
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3651	// No global is ever allowed as a base.
				3652	if (AM.BaseGV)
				3653	return false;
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3654
				3655	// Only support r+r,
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3656	switch (AM.Scale) {
				3657	case 0: // "r+i" or just "i", depending on HasBaseReg.
				3658	break;
				3659	case 1:
				3660	if (AM.HasBaseReg && AM.BaseOffs) // "r+r+i" is not allowed.
				3661	return false;
				3662	// Otherwise we have r+r or r+i.
				3663	break;
				3664	case 2:
				3665	if (AM.HasBaseReg \|\| AM.BaseOffs) // 2r+r or 2r+i is not allowed.
				3666	return false;
				3667	// Allow 2*r as r+r.
				3668	break;
				3669	}
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3670
Chris Lattner	1436bb6	2007-03-30 23:14:50 +0000	[diff] [blame]	3671	return true;
				3672	}
				3673
Benjamin Kramer	9c64030	2011-07-08 10:31:30 +0000	[diff] [blame]	3674	/// BuildExactDiv - Given an exact SDIV by a constant, create a multiplication
				3675	/// with the multiplicative inverse of the constant.
				3676	SDValue TargetLowering::BuildExactSDIV(SDValue Op1, SDValue Op2, DebugLoc dl,
				3677	SelectionDAG &DAG) const {
				3678	ConstantSDNode *C = cast<ConstantSDNode>(Op2);
				3679	APInt d = C->getAPIntValue();
				3680	assert(d != 0 && "Division by zero!");
				3681
				3682	// Shift the value upfront if it is even, so the LSB is one.
				3683	unsigned ShAmt = d.countTrailingZeros();
				3684	if (ShAmt) {
				3685	// TODO: For UDIV use SRL instead of SRA.
				3686	SDValue Amt = DAG.getConstant(ShAmt, getShiftAmountTy(Op1.getValueType()));
				3687	Op1 = DAG.getNode(ISD::SRA, dl, Op1.getValueType(), Op1, Amt);
				3688	d = d.ashr(ShAmt);
				3689	}
				3690
				3691	// Calculate the multiplicative inverse, using Newton's method.
				3692	APInt t, xn = d;
				3693	while ((t = d*xn) != 1)
				3694	xn *= APInt(d.getBitWidth(), 2) - t;
				3695
				3696	Op2 = DAG.getConstant(xn, Op1.getValueType());
				3697	return DAG.getNode(ISD::MUL, dl, Op1.getValueType(), Op1, Op2);
				3698	}
				3699
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3700	/// BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant,
				3701	/// return a DAG expression to select that will generate the same value by
				3702	/// multiplying by a magic number. See:
				3703	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3704	SDValue TargetLowering::
				3705	BuildSDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
Eric Christopher	9171fb9	2012-12-10 22:00:20 +0000	[diff] [blame]	3706	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3707	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3708	DebugLoc dl= N->getDebugLoc();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3709
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3710	// Check to see if we can do this.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3711	// FIXME: We should be more aggressive here.
				3712	if (!isTypeLegal(VT))
				3713	return SDValue();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3714
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3715	APInt d = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
Jay Foad	4e5ea55	2009-04-30 10:15:35 +0000	[diff] [blame]	3716	APInt::ms magics = d.magic();
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3717
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3718	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3719	// FIXME: We should support doing a MUL in a wider type
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3720	SDValue Q;
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3721	if (IsAfterLegalization ? isOperationLegal(ISD::MULHS, VT) :
				3722	isOperationLegalOrCustom(ISD::MULHS, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3723	Q = DAG.getNode(ISD::MULHS, dl, VT, N->getOperand(0),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3724	DAG.getConstant(magics.m, VT));
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3725	else if (IsAfterLegalization ? isOperationLegal(ISD::SMUL_LOHI, VT) :
				3726	isOperationLegalOrCustom(ISD::SMUL_LOHI, VT))
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3727	Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT),
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3728	N->getOperand(0),
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3729	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3730	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3731	return SDValue(); // No mulhs or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3732	// If d > 0 and m < 0, add the numerator
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3733	if (d.isStrictlyPositive() && magics.m.isNegative()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3734	Q = DAG.getNode(ISD::ADD, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3735	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3736	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3737	}
				3738	// If d < 0 and m > 0, subtract the numerator.
Eli Friedman	fc69cb4	2008-11-30 06:35:39 +0000	[diff] [blame]	3739	if (d.isNegative() && magics.m.isStrictlyPositive()) {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3740	Q = DAG.getNode(ISD::SUB, dl, VT, Q, N->getOperand(0));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3741	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3742	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3743	}
				3744	// Shift right algebraic if shift value is nonzero
				3745	if (magics.s > 0) {
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3746	Q = DAG.getNode(ISD::SRA, dl, VT, Q,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3747	DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3748	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3749	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3750	}
				3751	// Extract the sign bit and add it to the quotient
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3752	SDValue T =
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3753	DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(VT.getSizeInBits()-1,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3754	getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3755	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3756	Created->push_back(T.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3757	return DAG.getNode(ISD::ADD, dl, VT, Q, T);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3758	}
				3759
				3760	/// BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant,
				3761	/// return a DAG expression to select that will generate the same value by
				3762	/// multiplying by a magic number. See:
				3763	/// <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3764	SDValue TargetLowering::
				3765	BuildUDIV(SDNode *N, SelectionDAG &DAG, bool IsAfterLegalization,
Eric Christopher	9171fb9	2012-12-10 22:00:20 +0000	[diff] [blame]	3766	std::vector<SDNode> Created) const {
Owen Anderson	e50ed30	2009-08-10 22:56:29 +0000	[diff] [blame]	3767	EVT VT = N->getValueType(0);
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3768	DebugLoc dl = N->getDebugLoc();
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3769
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3770	// Check to see if we can do this.
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3771	// FIXME: We should be more aggressive here.
				3772	if (!isTypeLegal(VT))
				3773	return SDValue();
				3774
				3775	// FIXME: We should use a narrower constant when the upper
				3776	// bits are known to be zero.
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3777	const APInt &N1C = cast<ConstantSDNode>(N->getOperand(1))->getAPIntValue();
				3778	APInt::mu magics = N1C.magicu();
				3779
				3780	SDValue Q = N->getOperand(0);
				3781
				3782	// If the divisor is even, we can avoid using the expensive fixup by shifting
				3783	// the divided value upfront.
				3784	if (magics.a != 0 && !N1C[0]) {
				3785	unsigned Shift = N1C.countTrailingZeros();
				3786	Q = DAG.getNode(ISD::SRL, dl, VT, Q,
				3787	DAG.getConstant(Shift, getShiftAmountTy(Q.getValueType())));
				3788	if (Created)
				3789	Created->push_back(Q.getNode());
				3790
				3791	// Get magic number for the shifted divisor.
				3792	magics = N1C.lshr(Shift).magicu(Shift);
				3793	assert(magics.a == 0 && "Should use cheap fixup now");
				3794	}
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3795
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3796	// Multiply the numerator (operand 0) by the magic value
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3797	// FIXME: We should support doing a MUL in a wider type
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3798	if (IsAfterLegalization ? isOperationLegal(ISD::MULHU, VT) :
				3799	isOperationLegalOrCustom(ISD::MULHU, VT))
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3800	Q = DAG.getNode(ISD::MULHU, dl, VT, Q, DAG.getConstant(magics.m, VT));
Richard Osborne	19a4daf	2011-11-07 17:09:05 +0000	[diff] [blame]	3801	else if (IsAfterLegalization ? isOperationLegal(ISD::UMUL_LOHI, VT) :
				3802	isOperationLegalOrCustom(ISD::UMUL_LOHI, VT))
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3803	Q = SDValue(DAG.getNode(ISD::UMUL_LOHI, dl, DAG.getVTList(VT, VT), Q,
				3804	DAG.getConstant(magics.m, VT)).getNode(), 1);
Dan Gohman	525178c	2007-10-08 18:33:35 +0000	[diff] [blame]	3805	else
Dan Gohman	475871a	2008-07-27 21:46:04 +0000	[diff] [blame]	3806	return SDValue(); // No mulhu or equvialent
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3807	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3808	Created->push_back(Q.getNode());
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3809
				3810	if (magics.a == 0) {
Benjamin Kramer	1c10b8d	2011-03-17 20:39:14 +0000	[diff] [blame]	3811	assert(magics.s < N1C.getBitWidth() &&
Eli Friedman	201c977	2008-11-30 06:02:26 +0000	[diff] [blame]	3812	"We shouldn't generate an undefined shift!");
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3813	return DAG.getNode(ISD::SRL, dl, VT, Q,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3814	DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3815	} else {
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3816	SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3817	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3818	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3819	NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3820	DAG.getConstant(1, getShiftAmountTy(NPQ.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3821	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3822	Created->push_back(NPQ.getNode());
Dale Johannesen	ff97d4f	2009-02-03 00:47:48 +0000	[diff] [blame]	3823	NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q);
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3824	if (Created)
Gabor Greif	ba36cb5	2008-08-28 21:40:38 +0000	[diff] [blame]	3825	Created->push_back(NPQ.getNode());
Wesley Peck	bf17cfa	2010-11-23 03:31:01 +0000	[diff] [blame]	3826	return DAG.getNode(ISD::SRL, dl, VT, NPQ,
Owen Anderson	95771af	2011-02-25 21:41:48 +0000	[diff] [blame]	3827	DAG.getConstant(magics.s-1, getShiftAmountTy(NPQ.getValueType())));
Andrew Lenharth	dae9cbe	2006-05-16 17:42:15 +0000	[diff] [blame]	3828	}
				3829	}