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gerrit-public.fairphone.software / platform / external / llvm / 1997473cf72957d0e70322e2fe6fe2ab141c58a6 / lib / Target / X86 / X86RegisterInfo.cpp
  1. ce3b465 Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux by Anton Korobeynikov · 17 years ago
  2. 038082d Emit correct DWARF reg # for RA (return address) register by Anton Korobeynikov · 17 years ago
  3. 97de913 eliminateFrameIndex() change. by Evan Cheng · 17 years ago
  4. a24dddd Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add / sub instructions. by Evan Cheng · 17 years ago
  5. 7c6eefa do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 by Chris Lattner · 17 years ago
  6. ea84c5e support for >4G stack frames by Chris Lattner · 17 years ago
  7. 6180780 support >4G stack frames by Chris Lattner · 17 years ago
  8. b53e98e Add the PADDQ to the list. by Bill Wendling · 17 years ago
  9. d15dff2 rename X86FunctionInfo to X86MachineFunctionInfo to match the header file by Chris Lattner · 17 years ago
  10. 57fc00d Implemented correct stack probing on mingw/cygwin for dynamic alloca's. by Anton Korobeynikov · 17 years ago
  11. c9c9d2d Changed to new MMX_ recipes. by Bill Wendling · 17 years ago
  12. bf2c8b3 Added MRegisterInfo hook to re-materialize an instruction. by Evan Cheng · 18 years ago
  13. 2f88dcd Added "padd*" support for MMX. Added MMX move stuff to X86InstrInfo so that by Bill Wendling · 18 years ago
  14. 5e6df46 PEI now passes a RegScavenger ptr to eliminateFrameIndex. by Evan Cheng · 18 years ago
  15. 0fa1b6d By default, spills kills the register being stored. by Evan Cheng · 18 years ago
  16. 62819f3 Support to provide exception and selector registers. by Jim Laskey · 18 years ago
  17. b371f45 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. by Evan Cheng · 18 years ago
  18. a284cbf For PR1207: by Reid Spencer · 18 years ago
  19. eceada6 Added getReservedRegs(). by Evan Cheng · 18 years ago
  20. e078d1a Only gather frame info if debug or eh. by Jim Laskey · 18 years ago
  21. 072200c Landing pad-less eh for PPC. by Jim Laskey · 18 years ago
  22. 44c3b9f Change the MachineDebugInfo to MachineModuleInfo to better reflect usage by Jim Laskey · 18 years ago
  23. 1ee2925 Make LABEL a builtin opcode. by Jim Laskey · 18 years ago
  24. 0e41094 Call frames for intel. by Jim Laskey · 18 years ago
  25. 7ac947d 80 columns by Jim Laskey · 18 years ago
  26. 367372a PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary. by Evan Cheng · 18 years ago
  27. dc77540 hasFP() is now a virtual method of MRegisterInfo. by Evan Cheng · 18 years ago
  28. 2bd7b2b One more try... by Evan Cheng · 18 years ago
  29. 5ad334f Last check-in was bogus. There is no need to align the stack if the function is a leaf function (and without alloca). by Evan Cheng · 18 years ago
  30. 0327863 Backend is reponsible for aligning the stack. by Evan Cheng · 18 years ago
  31. 7f70559 * PIC codegen for X86/Linux has been implemented by Anton Korobeynikov · 18 years ago
  32. 317848f Really big cleanup. by Anton Korobeynikov · 18 years ago
  33. c2b861d Fix naming inconsistency. by Evan Cheng · 18 years ago
  34. 21b7612 f64 <-> i64 bit_convert using movq in 64-bit mode. by Evan Cheng · 18 years ago
  35. 0e8dbc6 Added MOVSS2DIrr and MOVDI2SSrr to foldMemeoryOperand(). by Evan Cheng · 18 years ago
  36. f5da133 What should be the last unnecessary <iostream>s in the library. by Bill Wendling · 18 years ago
  37. 51cdcd1 MI keeps a ptr of TargetInstrDescriptor, use it. by Evan Cheng · 18 years ago
  38. ba59a1e Match TargetInstrInfo changes. by Evan Cheng · 18 years ago
  39. c0f64ff Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead by Evan Cheng · 18 years ago
  40. 9dea41d Hopefully a good crack at making debugging work on intel -disable-fp-elim. by Jim Laskey · 18 years ago
  41. ebf01d6 Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64. by Evan Cheng · 18 years ago
  42. 6ce7dc2 Properly transfer kill / dead info. by Evan Cheng · 18 years ago
  43. 7ce4578 Matches MachineInstr changes. by Evan Cheng · 18 years ago
  44. 50b3b50 Fix a potential bug. by Evan Cheng · 18 years ago
  45. 438f7bc Add implicit def / use operands to MachineInstr. by Evan Cheng · 18 years ago
  46. 171d09e Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes. by Evan Cheng · 18 years ago
  47. a1fd650 Remove M_2_ADDR_FLAG. by Evan Cheng · 18 years ago
  48. bdd371c Dead code. by Evan Cheng · 18 years ago
  49. f10c17f Delete dead code; fix 80 col violations. by Evan Cheng · 18 years ago
  50. bcb9770 Added some eye-candy for Subtarget type checking by Anton Korobeynikov · 18 years ago
  51. 6f34b43 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex by Evan Cheng · 18 years ago
  52. 25ab690 Committing X86-64 support. by Evan Cheng · 18 years ago
  53. b14ca60 Some notes on better load folding we could do by Chris Lattner · 18 years ago
  54. 2f5993b Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll by Evan Cheng · 18 years ago
  55. 09e4606 Completely eliminate def&use operands. Now a register operand is EITHER a by Chris Lattner · 18 years ago
  56. 2926869 Fix a long-standing wart in the code generator: two-address instruction lowering by Chris Lattner · 18 years ago
  57. 5ea64fd Constify some methods. Patch provided by Anton Vayvod, thanks! by Chris Lattner · 18 years ago
  58. 3c62934 Missing a space. by Evan Cheng · 18 years ago
  59. 613f1f8 Tidy up a few things. by Jim Laskey · 18 years ago
  60. f19807c Reduce size of routine. Shrinks .o by 37%. by Jim Laskey · 18 years ago
  61. 09c5457 Add shift and rotate by 1 instructions / patterns. by Evan Cheng · 18 years ago
  62. 004fb92 Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. by Evan Cheng · 18 years ago
  63. e8bd0a3 Added X86FunctionInfo subclass of MachineFunction to record whether the by Evan Cheng · 18 years ago
  64. 3649b0e Cygwin support. Patch by Anton Korobeynikov! by Evan Cheng · 18 years ago
  65. 190717d Rename instructions for consistency sake. by Evan Cheng · 18 years ago
  66. 0f3ac8d getCalleeSaveRegs and getCalleeSaveRegClasses are no long TableGen'd. by Evan Cheng · 18 years ago
  67. 069287d X86 integer register classes naming changes. Make them consistent with FP, vector classes. by Evan Cheng · 18 years ago
  68. 98d0d7d More coverity fixes by Chris Lattner · 18 years ago
  69. 403be7e Fixing truncate. Previously we were emitting truncate from r16 to r8 as by Evan Cheng · 18 years ago
  70. 8f7f712 Better implementation of truncate. ISel matches it to a pseudo instruction by Evan Cheng · 18 years ago
  71. 8b915b4 Remove and simplify some more machineinstr/machineoperand stuff. by Chris Lattner · 18 years ago
  72. e53f4a0 Move some methods out of MachineInstr into MachineOperand by Chris Lattner · 18 years ago
  73. 63b3d71 There shalt be only one "immediate" operand type! by Chris Lattner · 18 years ago
  74. ea50fab Remove a bunch more SparcV9 specific stuff by Chris Lattner · 18 years ago
  75. ed1492e Use movaps instead of movapd for spill / restore. by Evan Cheng · 18 years ago
  76. 49bca85 MakeMIInst() should handle jump table index operands. by Evan Cheng · 18 years ago
  77. f0d4e3d - PEXTRW cannot take a memory location as its first source operand. by Evan Cheng · 18 years ago
  78. f463f51 SHUFP{S|D}, PSHUF* encoding bugs. Left out the mask immediate operand. by Evan Cheng · 18 years ago
  79. a52b214 Encoding bug: CMPPSrmi, CMPPDrmi dropped operand 2 (condtion immediate). by Evan Cheng · 18 years ago
  80. 51c9c43 Incorrect foldMemoryOperand entries by Evan Cheng · 18 years ago
  81. 800f12d Can't fold loads into alias vector SSE ops used for scalar operation. The load by Evan Cheng · 18 years ago
  82. 407428e Added SSE (and other) entries to foldMemoryOperand(). by Evan Cheng · 18 years ago
  83. d9245ca We were not adjusting the frame size to ensure proper alignment when alloca / by Evan Cheng · 18 years ago
  84. a964ccd Use movaps to do VR128 reg-to-reg copies for now. It's shorter and available for SSE1. by Evan Cheng · 18 years ago
  85. 4188699 Foundation for call frame information. by Jim Laskey · 18 years ago
  86. 8703be4 Minor fixes + naming changes. by Evan Cheng · 18 years ago
  87. a997918 Expose base register for DwarfWriter. Refactor code accordingly. by Jim Laskey · 18 years ago
  88. 414e682 Translate llvm target registers to dwarf register numbers properly. by Jim Laskey · 18 years ago
  89. f1d78e8 Add support to locate local variables in frames (early version.) by Jim Laskey · 19 years ago
  90. 2246f84 Use the generic vector register classes VR64 / VR128 rather than V4F32, by Evan Cheng · 19 years ago
  91. 8586b95 Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi. by Evan Cheng · 19 years ago
  92. 5bd4d48 Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g. ADD32ri8. by Evan Cheng · 19 years ago
  93. cb4a38e Fix an obvious bug exposed when we are doing ADD X, 4 ==> MOV32ri $X+4, ... by Evan Cheng · 19 years ago
  94. 933be33 Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64. by Evan Cheng · 19 years ago
  95. aea20f5 Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit by Evan Cheng · 19 years ago
  96. fe5cb19 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This by Evan Cheng · 19 years ago
  97. 19ade3b Use movaps / movapd to spill / restore V4F4 / V2F8 registers. by Evan Cheng · 19 years ago
  98. d51425a Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg by Evan Cheng · 19 years ago
  99. d77525d When rewriting frame instructions, emit the appropriate small-immediate by Chris Lattner · 19 years ago
  100. 4083960 Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :) by Chris Lattner · 19 years ago