1. 1cbf3ab Next round of PPC CR optimizations. For the following code: by Nate Begeman · 20 years ago
  2. ea96b5e silence a bogus warning by Chris Lattner · 20 years ago
  3. fda2b55 Fold setcc of MVT::i1 operands into logical operations by Chris Lattner · 20 years ago
  4. 4a44c8d Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c') by Chris Lattner · 20 years ago
  5. 7467c9b Another simple xform by Chris Lattner · 20 years ago
  6. 706aa96 Fold: by Chris Lattner · 20 years ago
  7. 36019aa Make the AND elimination operation recursive and significantly more powerful, by Chris Lattner · 20 years ago
  8. 16ac709 Change codegen for setcc to read the bit directly out of the condition by Nate Begeman · 20 years ago
  9. d91ff7c Add support for targets that require stubs for external functions. by Chris Lattner · 20 years ago
  10. 477d1de Handle ExternalSymbol operands in the PPC JIT by Chris Lattner · 20 years ago
  11. f8b0294 Make pattern isel default for ppc by Nate Begeman · 20 years ago
  12. 36d1273 a new simple pass, which will be extended to be more useful in the future. by Chris Lattner · 20 years ago
  13. 1e0d9bd fix calls by Andrew Lenharth · 20 years ago
  14. 3ae1829 a 21264 fix, and fix the operator precidence on an and -> zap check (should fix hundreds of test cases by Andrew Lenharth · 20 years ago
  15. 1ce0c01 print negative 64 bit immediates as negative numbers, makes things a little by Duraid Madina · 20 years ago
  16. 3eb7150 oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4 by Duraid Madina · 20 years ago
  17. 7bfba7d Implement multi-way branches through logical ops on condition registers. by Nate Begeman · 20 years ago
  18. 72ea281 Add a couple missing transforms in getSetCC that were triggering assertions by Nate Begeman · 20 years ago
  19. c4ccc2d we have zextloads, not sextloads! by Duraid Madina · 20 years ago
  20. ef7288c Add the necessary support to codegen condition register logical ops with by Nate Begeman · 20 years ago
  21. 1b7f7fb Start allocating condition registers. Almost all explicit uses of CR0 are by Nate Begeman · 20 years ago
  22. 3664cef Implement the fold shift X, zext(Y) -> shift X, Y at the target level, by Nate Begeman · 20 years ago
  23. eea805e Disbale the broken fold of shift + sz[ext] for now by Nate Begeman · 20 years ago
  24. 97e001d fix an infinite loop by Chris Lattner · 20 years ago
  25. fd8d389 fix some serious miscompiles on ia64, alpha, and ppc by Chris Lattner · 20 years ago
  26. 51679c4 avoid work when possible, perhaps fix the problem nate and andrew are seeing by Chris Lattner · 20 years ago
  27. c24b537 WOW, function calls still seem to work after this. by Andrew Lenharth · 20 years ago
  28. 556c44e prepare for func call optimization by Andrew Lenharth · 20 years ago
  29. ed09502 * add the shladd instruction * fold left shifts of 1, 2, 3 or 4 bits into adds by Duraid Madina · 20 years ago
  30. 4f7cba5 add matches for SxADDL and company, as well as simplify the SxADDQ code by Andrew Lenharth · 20 years ago
  31. e9c35e7 Implement expansion of unsigned i64 -> FP. by Chris Lattner · 20 years ago
  32. c02780e * if ANDing with a constant of the form: by Duraid Madina · 20 years ago
  33. 483f22d added all flavors of zap for anding by Andrew Lenharth · 20 years ago
  34. ffe284c Make expansion of uint->fp cast assert out instead of infinitely recurse. by Chris Lattner · 20 years ago
  35. 5bf2686 Fix some mysteriously missing {}'s which cause the miscompilation of by Chris Lattner · 20 years ago
  36. e666fcf add back the optimization that Nate added for shl X, (zext_inreg y) by Chris Lattner · 20 years ago
  37. 8a8dbfa Oops, remove these too. by Chris Lattner · 20 years ago
  38. 519f40b remove one more occurance of this that snuck in by Chris Lattner · 20 years ago
  39. 2942e9c Remove support for ZERO_EXTEND_INREG. This pessimizes code, genering stuff by Chris Lattner · 20 years ago
  40. 6ac614a Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causing by Chris Lattner · 20 years ago
  41. c951d87 Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit by Chris Lattner · 20 years ago
  42. 91302a1 Z_E_I is gone by Chris Lattner · 20 years ago
  43. 2399356 Instead of making ZERO_EXTEND_INREG nodes, use the helper method in by Chris Lattner · 20 years ago
  44. 0f2287b Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodes by Chris Lattner · 20 years ago
  45. db81eba Fold shift x, [sz]ext(y) -> shift x, y by Nate Begeman · 20 years ago
  46. b882752 Fold shift by size larger than type size to undef by Nate Begeman · 20 years ago
  47. 9765c25 Implement setcc op, -1 sequences by Nate Begeman · 20 years ago
  48. 1c51c6a promote extload i1 -> extload i8 by Chris Lattner · 20 years ago
  49. 3464547 add an argument to allow avoiding deleting phi nodes. by Chris Lattner · 20 years ago
  50. 151c80b Get rid of this for_each loop by Chris Lattner · 20 years ago
  51. e8fd25f * OK, after changing to use liveIn/liveOut instead of IDEFs, by Duraid Madina · 20 years ago
  52. 0b04b5d Get rid of idefs for arguments (oops) by Andrew Lenharth · 20 years ago
  53. e1c5a00 Get rid of idefs for arguments by Andrew Lenharth · 20 years ago
  54. 9c24ba6 Put out* into the allocation order, allowing the register allocator to by Chris Lattner · 20 years ago
  55. ea6f770 Make sure to realize that calls use their argument regs by Chris Lattner · 20 years ago
  56. ca494fd stop emitting IDEFs for args - change to using liveIn/liveOut by Duraid Madina · 20 years ago
  57. 7af0248 Initial support for allocation condition registers by Nate Begeman · 20 years ago
  58. af2e3e0 Fix a crash analyzing MultiSource/Benchmarks/MallocBench/gs by Chris Lattner · 20 years ago
  59. fd1f1ee Remove some redundant checks, add a couple of new ones. This allows us to by Chris Lattner · 20 years ago
  60. 5b95ed6 Emit comparisons against the sign bit better. Codegen this: by Chris Lattner · 20 years ago
  61. 08b698e Emit long comparison against -1 better. Instead of this (x86): by Chris Lattner · 20 years ago
  62. 3b2c1d9 canonicalize x <u 1 -> x == 0. On this testcase: by Chris Lattner · 20 years ago
  63. 9f833d3 Implement bitfield clears Implement divide by negative power of two by Nate Begeman · 20 years ago
  64. ef9531e Update PPC readme. Remove things that are done or aren't ppc specific by Nate Begeman · 20 years ago
  65. bd0781e Teach the dag mechanism that this: by Chris Lattner · 20 years ago
  66. ee27f57 Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have by Chris Lattner · 20 years ago
  67. 30e8243 IA64 supports this operation. by Chris Lattner · 20 years ago
  68. 5eef9f3 ORo sets CR0 by Chris Lattner · 20 years ago
  69. 6b4ea2c Revert the previous patch, which I didn't mean to check in. by Chris Lattner · 20 years ago
  70. 26d4fdb Fix a minor bug (ORo didn't mark that it set CR0). by Chris Lattner · 20 years ago
  71. 21478e5 hmm, should probably change addImm() to take 64-bit arguments one day anyway. by Duraid Madina · 20 years ago
  72. c7bd482 Add recording variants of ISD::AND and ISD::OR. This kills almost 1000 by Nate Begeman · 20 years ago
  73. 5ef2ec9 assorted fixes: by Duraid Madina · 20 years ago
  74. 01c5513 Eliminate tabs by Jeff Cohen · 20 years ago
  75. c7c1657 Fix libcall code to not pass a NULL Chain to LowerCallTo by Nate Begeman · 20 years ago
  76. 2bb6f41 Don't bother sign/zext_inreg'ing the result of an and operation if we know by Chris Lattner · 20 years ago
  77. 01ff721 Teach legalize to deal with targets that don't support some SEXTLOAD/ZEXTLOADs by Chris Lattner · 20 years ago
  78. 6841dec don't zextload fp values! by Chris Lattner · 20 years ago
  79. 709c806 Fix another fixme: factor out the constant fp generation code. by Nate Begeman · 20 years ago
  80. c5b1cd2 Fix 64 bit argument loading that straddles the args in regs / args on stack by Nate Begeman · 20 years ago
  81. 232ee95 Until we have a dag combiner, promote using zextload's instead of extloads. by Chris Lattner · 20 years ago
  82. 45278e3 Fold zext_inreg(zextload), likewise for sext's by Chris Lattner · 20 years ago
  83. edeecfc add a simple xform by Chris Lattner · 20 years ago
  84. 340f290 Remove unnecessary Implicit Defs. Since r0 is not in allocation, we do not by Nate Begeman · 20 years ago
  85. 27499e3 Make sure that BRCOND branches can be converted into long branches too. by Nate Begeman · 20 years ago
  86. a0e3e94 Don't hand ISD::CALL nodes off to SelectExprFP. This fixes siod. by Nate Begeman · 20 years ago
  87. dea29e2 Fix a thinko. If the operand is promoted, pass the promoted value into by Chris Lattner · 20 years ago
  88. 51d2ed9 rename getPPCOpcodeForSetCCNumber -> getPPCOpcodeForSetCCOpode to be more by Chris Lattner · 20 years ago
  89. 706471e fix ISD::BRCONDTWOWAY codegen to not deference the end() iterator by Nate Begeman · 20 years ago
  90. 9184bfb Fix CodeGen/Generic/2005-05-09-GlobalInPHI.ll, which was reduced from 254.gap. by Chris Lattner · 20 years ago
  91. a2daa8c add a little peephole optimization. This allows us to codegen: by Chris Lattner · 20 years ago
  92. 91277ea do not set the root to null if an argument is dead by Chris Lattner · 20 years ago
  93. cd08e4c Add rlwnm instruction for variable rotate by Nate Begeman · 20 years ago
  94. 27ee3a3 Fix a crash on 173.applu by asking for a constant bigger than 32-bits. by Chris Lattner · 20 years ago
  95. f429a3e Switch this instruction selector over to using liveins and liveouts, eliminating by Chris Lattner · 20 years ago
  96. 8e7d87b there is no need to remove this instruction, linscan does it already as it by Chris Lattner · 20 years ago
  97. 799a919 Adjust live intervals to support a livein set by Chris Lattner · 20 years ago
  98. 4c52f0e Use live out sets for return values instead of imp_defs, which is cleaner and faster. by Chris Lattner · 20 years ago
  99. d493b34 Consider the livein/out set for a function, allowing targets to not have to by Chris Lattner · 20 years ago
  100. e00e5de ok, the "ia64 has a boatload of registers" joke stopped being funny today ;) by Duraid Madina · 20 years ago